1 #ifndef __AHBC_ASPEED_H_INCLUDED
2 #define __AHBC_ASPEED_H_INCLUDED
3 
4 struct aspeed_ahbc_reg {
5 	u32 protection_key;	//0x00
6 	u32 reserved0[15];
7 	u32 cmd_recod;		//0x40
8 	u32 log_buff;		//0x44
9 	u32 polling_addr;	//0x48
10 	u32 hw_fifo_sts;	//0x4C
11 	u32 reserved1[3];
12 	u32 hw_fifo_merge;	//0x5C
13 	u32 hw_fifo_stage0;	//0x60
14 	u32 hw_fifo_stage1;	//0x64
15 	u32 hw_fifo_stage2;	//0x68
16 	u32 hw_fifo_stage3;	//0x6C
17 	u32 hw_fifo_stage4;	//0x70
18 	u32 hw_fifo_stage5;	//0x74
19 	u32 hw_fifo_stage6;	//0x78
20 	u32 hw_fifo_stage7;	//0x7C
21 	u32 priority_ctrl;	//0x80
22 	u32 ier;			//0x84
23 	u32 target_disable_ctrl;	//0x88
24 	u32 addr_remap;		//0x8C
25 	u32 wdt_count_sts;	//0x90
26 	u32 wdt_count_reload;	//0x94
27 };
28 
29 extern void aspeed_ahbc_remap_enable(struct aspeed_ahbc_reg *ahbc);
30 
31 #endif
32