1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2011
4  * eInfochips Ltd. <www.einfochips.com>
5  * Written-by: Ajay Bhargav <contact@8051projects.net>
6  *
7  * (C) Copyright 2010
8  * Marvell Semiconductor <www.marvell.com>
9  */
10 
11 #ifndef _ASM_ARCH_GPIO_H
12 #define _ASM_ARCH_GPIO_H
13 
14 #include <asm/types.h>
15 #include <asm/arch/armada100.h>
16 
17 #define GPIO_HIGH		1
18 #define GPIO_LOW		0
19 
20 #define GPIO_TO_REG(gp)		(gp >> 5)
21 #define GPIO_TO_BIT(gp)		(1 << (gp & 0x1F))
22 #define GPIO_VAL(gp, val)	((val >> (gp & 0x1F)) & 0x01)
23 
24 static inline void *get_gpio_base(int bank)
25 {
26 	const unsigned int offset[4] = {0, 4, 8, 0x100};
27 	/* gpio register bank offset - refer Appendix A.36 */
28 	return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
29 }
30 
31 #endif /* _ASM_ARCH_GPIO_H */
32