1 /*
2  * (C) Copyright 2011
3  * eInfochips Ltd. <www.einfochips.com>
4  * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
5  *
6  * (C) Copyright 2010
7  * Marvell Semiconductor <www.marvell.com>
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef _ASM_ARCH_GPIO_H
13 #define _ASM_ARCH_GPIO_H
14 
15 #include <asm/types.h>
16 #include <asm/arch/armada100.h>
17 
18 #define GPIO_HIGH		1
19 #define GPIO_LOW		0
20 
21 #define GPIO_TO_REG(gp)		(gp >> 5)
22 #define GPIO_TO_BIT(gp)		(1 << (gp & 0x1F))
23 #define GPIO_VAL(gp, val)	((val >> (gp & 0x1F)) & 0x01)
24 
25 static inline void *get_gpio_base(int bank)
26 {
27 	const unsigned int offset[4] = {0, 4, 8, 0x100};
28 	/* gpio register bank offset - refer Appendix A.36 */
29 	return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
30 }
31 
32 #endif /* _ASM_ARCH_GPIO_H */
33