1 /* 2 * mux_am43xx.h 3 * 4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef _MUX_AM43XX_H_ 10 #define _MUX_AM43XX_H_ 11 12 #include <common.h> 13 #include <asm/io.h> 14 15 #define MUX_CFG(value, offset) \ 16 __raw_writel(value, (CTRL_BASE + offset)); 17 18 /* PAD Control Fields */ 19 #define SLEWCTRL (0x1 << 19) 20 #define RXACTIVE (0x1 << 18) 21 #define PULLDOWN_EN (0x0 << 17) /* Pull Down Selection */ 22 #define PULLUP_EN (0x1 << 17) /* Pull Up Selection */ 23 #define PULLUDEN (0x0 << 16) /* Pull up/down enable */ 24 #define PULLUDDIS (0x1 << 16) /* Pull up/down disable */ 25 #define MODE(val) val /* used for Readability */ 26 27 /* 28 * PAD CONTROL OFFSETS 29 * Field names corresponds to the pad signal name 30 */ 31 struct pad_signals { 32 int gpmc_ad0; 33 int gpmc_ad1; 34 int gpmc_ad2; 35 int gpmc_ad3; 36 int gpmc_ad4; 37 int gpmc_ad5; 38 int gpmc_ad6; 39 int gpmc_ad7; 40 int gpmc_ad8; 41 int gpmc_ad9; 42 int gpmc_ad10; 43 int gpmc_ad11; 44 int gpmc_ad12; 45 int gpmc_ad13; 46 int gpmc_ad14; 47 int gpmc_ad15; 48 int gpmc_a0; 49 int gpmc_a1; 50 int gpmc_a2; 51 int gpmc_a3; 52 int gpmc_a4; 53 int gpmc_a5; 54 int gpmc_a6; 55 int gpmc_a7; 56 int gpmc_a8; 57 int gpmc_a9; 58 int gpmc_a10; 59 int gpmc_a11; 60 int gpmc_wait0; 61 int gpmc_wpn; 62 int gpmc_be1n; 63 int gpmc_csn0; 64 int gpmc_csn1; 65 int gpmc_csn2; 66 int gpmc_csn3; 67 int gpmc_clk; 68 int gpmc_advn_ale; 69 int gpmc_oen_ren; 70 int gpmc_wen; 71 int gpmc_be0n_cle; 72 int lcd_data0; 73 int lcd_data1; 74 int lcd_data2; 75 int lcd_data3; 76 int lcd_data4; 77 int lcd_data5; 78 int lcd_data6; 79 int lcd_data7; 80 int lcd_data8; 81 int lcd_data9; 82 int lcd_data10; 83 int lcd_data11; 84 int lcd_data12; 85 int lcd_data13; 86 int lcd_data14; 87 int lcd_data15; 88 int lcd_vsync; 89 int lcd_hsync; 90 int lcd_pclk; 91 int lcd_ac_bias_en; 92 int mmc0_dat3; 93 int mmc0_dat2; 94 int mmc0_dat1; 95 int mmc0_dat0; 96 int mmc0_clk; 97 int mmc0_cmd; 98 int mii1_col; 99 int mii1_crs; 100 int mii1_rxerr; 101 int mii1_txen; 102 int mii1_rxdv; 103 int mii1_txd3; 104 int mii1_txd2; 105 int mii1_txd1; 106 int mii1_txd0; 107 int mii1_txclk; 108 int mii1_rxclk; 109 int mii1_rxd3; 110 int mii1_rxd2; 111 int mii1_rxd1; 112 int mii1_rxd0; 113 int rmii1_refclk; 114 int mdio_data; 115 int mdio_clk; 116 int spi0_sclk; 117 int spi0_d0; 118 int spi0_d1; 119 int spi0_cs0; 120 int spi0_cs1; 121 int ecap0_in_pwm0_out; 122 int uart0_ctsn; 123 int uart0_rtsn; 124 int uart0_rxd; 125 int uart0_txd; 126 int uart1_ctsn; 127 int uart1_rtsn; 128 int uart1_rxd; 129 int uart1_txd; 130 int i2c0_sda; 131 int i2c0_scl; 132 int mcasp0_aclkx; 133 int mcasp0_fsx; 134 int mcasp0_axr0; 135 int mcasp0_ahclkr; 136 int mcasp0_aclkr; 137 int mcasp0_fsr; 138 int mcasp0_axr1; 139 int mcasp0_ahclkx; 140 int xdma_event_intr0; 141 int xdma_event_intr1; 142 int nresetin_out; 143 int porz; 144 int nnmi; 145 int osc0_in; 146 int osc0_out; 147 int rsvd1; 148 int tms; 149 int tdi; 150 int tdo; 151 int tck; 152 int ntrst; 153 int emu0; 154 int emu1; 155 int osc1_in; 156 int osc1_out; 157 int pmic_power_en; 158 int rtc_porz; 159 int rsvd2; 160 int ext_wakeup; 161 int enz_kaldo_1p8v; 162 int usb0_dm; 163 int usb0_dp; 164 int usb0_ce; 165 int usb0_id; 166 int usb0_vbus; 167 int usb0_drvvbus; 168 int usb1_dm; 169 int usb1_dp; 170 int usb1_ce; 171 int usb1_id; 172 int usb1_vbus; 173 int usb1_drvvbus; 174 int ddr_resetn; 175 int ddr_csn0; 176 int ddr_cke; 177 int ddr_ck; 178 int ddr_nck; 179 int ddr_casn; 180 int ddr_rasn; 181 int ddr_wen; 182 int ddr_ba0; 183 int ddr_ba1; 184 int ddr_ba2; 185 }; 186 187 #endif /* _MUX_AM43XX_H_ */ 188