1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments, <www.ti.com>
4  *
5  * Author
6  *		Mansoor Ahamed <mansoor.ahamed@ti.com>
7  *
8  * Initial Code from:
9  *		Richard Woodruff <r-woodruff2@ti.com>
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 
14 #ifndef _MEM_H_
15 #define _MEM_H_
16 
17 /*
18  * GPMC settings -
19  * Definitions is as per the following format
20  * #define <PART>_GPMC_CONFIG<x> <value>
21  * Where:
22  * PART is the part name e.g. STNOR - Intel Strata Flash
23  * x is GPMC config registers from 1 to 6 (there will be 6 macros)
24  * Value is corresponding value
25  *
26  * For every valid PRCM configuration there should be only one definition of
27  * the same. if values are independent of the board, this definition will be
28  * present in this file if values are dependent on the board, then this should
29  * go into corresponding mem-boardName.h file
30  *
31  * Currently valid part Names are (PART):
32  * M_NAND - Micron NAND
33  * STNOR - STMicrolelctronics M29W128GL
34  */
35 #define GPMC_SIZE_256M		0x0
36 #define GPMC_SIZE_128M		0x8
37 #define GPMC_SIZE_64M		0xC
38 #define GPMC_SIZE_32M		0xE
39 #define GPMC_SIZE_16M		0xF
40 
41 #define M_NAND_GPMC_CONFIG1	0x00000800
42 #define M_NAND_GPMC_CONFIG2	0x001e1e00
43 #define M_NAND_GPMC_CONFIG3	0x001e1e00
44 #define M_NAND_GPMC_CONFIG4	0x16051807
45 #define M_NAND_GPMC_CONFIG5	0x00151e1e
46 #define M_NAND_GPMC_CONFIG6	0x16000f80
47 #define M_NAND_GPMC_CONFIG7	0x00000008
48 
49 #define STNOR_GPMC_CONFIG1	0x00001200
50 #define STNOR_GPMC_CONFIG2	0x00101000
51 #define STNOR_GPMC_CONFIG3	0x00030301
52 #define STNOR_GPMC_CONFIG4	0x10041004
53 #define STNOR_GPMC_CONFIG5	0x000C1010
54 #define STNOR_GPMC_CONFIG6	0x08070280
55 #define STNOR_GPMC_CONFIG7	0x00000F48
56 
57 /* max number of GPMC Chip Selects */
58 #define GPMC_MAX_CS		8
59 /* max number of GPMC regs */
60 #define GPMC_MAX_REG		7
61 
62 #define PISMO1_NOR		1
63 #define PISMO1_NAND		2
64 #define PISMO2_CS0		3
65 #define PISMO2_CS1		4
66 #define PISMO1_ONENAND		5
67 #define DBG_MPDB		6
68 #define PISMO2_NAND_CS0		7
69 #define PISMO2_NAND_CS1		8
70 
71 /* make it readable for the gpmc_init */
72 #define PISMO1_NOR_BASE	FLASH_BASE
73 #define PISMO1_NAND_BASE	CONFIG_SYS_NAND_BASE
74 #define PISMO1_NAND_SIZE	GPMC_SIZE_256M
75 
76 #endif /* endif _MEM_H_ */
77