1*8eb16b7fSIlya Yanok /* 2*8eb16b7fSIlya Yanok * (C) Copyright 2006-2008 3*8eb16b7fSIlya Yanok * Texas Instruments, <www.ti.com> 4*8eb16b7fSIlya Yanok * 5*8eb16b7fSIlya Yanok * Author 6*8eb16b7fSIlya Yanok * Mansoor Ahamed <mansoor.ahamed@ti.com> 7*8eb16b7fSIlya Yanok * 8*8eb16b7fSIlya Yanok * Initial Code from: 9*8eb16b7fSIlya Yanok * Richard Woodruff <r-woodruff2@ti.com> 10*8eb16b7fSIlya Yanok * 11*8eb16b7fSIlya Yanok * See file CREDITS for list of people who contributed to this 12*8eb16b7fSIlya Yanok * project. 13*8eb16b7fSIlya Yanok * 14*8eb16b7fSIlya Yanok * This program is free software; you can redistribute it and/or 15*8eb16b7fSIlya Yanok * modify it under the terms of the GNU General Public License as 16*8eb16b7fSIlya Yanok * published by the Free Software Foundation; either version 2 of 17*8eb16b7fSIlya Yanok * the License, or (at your option) any later version. 18*8eb16b7fSIlya Yanok * 19*8eb16b7fSIlya Yanok * This program is distributed in the hope that it will be useful, 20*8eb16b7fSIlya Yanok * but WITHOUT ANY WARRANTY; without even the implied warranty of 21*8eb16b7fSIlya Yanok * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22*8eb16b7fSIlya Yanok * GNU General Public License for more details. 23*8eb16b7fSIlya Yanok * 24*8eb16b7fSIlya Yanok * You should have received a copy of the GNU General Public License 25*8eb16b7fSIlya Yanok * along with this program; if not, write to the Free Software 26*8eb16b7fSIlya Yanok * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 27*8eb16b7fSIlya Yanok * MA 02111-1307 USA 28*8eb16b7fSIlya Yanok */ 29*8eb16b7fSIlya Yanok 30*8eb16b7fSIlya Yanok #ifndef _MEM_H_ 31*8eb16b7fSIlya Yanok #define _MEM_H_ 32*8eb16b7fSIlya Yanok 33*8eb16b7fSIlya Yanok /* 34*8eb16b7fSIlya Yanok * GPMC settings - 35*8eb16b7fSIlya Yanok * Definitions is as per the following format 36*8eb16b7fSIlya Yanok * #define <PART>_GPMC_CONFIG<x> <value> 37*8eb16b7fSIlya Yanok * Where: 38*8eb16b7fSIlya Yanok * PART is the part name e.g. STNOR - Intel Strata Flash 39*8eb16b7fSIlya Yanok * x is GPMC config registers from 1 to 6 (there will be 6 macros) 40*8eb16b7fSIlya Yanok * Value is corresponding value 41*8eb16b7fSIlya Yanok * 42*8eb16b7fSIlya Yanok * For every valid PRCM configuration there should be only one definition of 43*8eb16b7fSIlya Yanok * the same. if values are independent of the board, this definition will be 44*8eb16b7fSIlya Yanok * present in this file if values are dependent on the board, then this should 45*8eb16b7fSIlya Yanok * go into corresponding mem-boardName.h file 46*8eb16b7fSIlya Yanok * 47*8eb16b7fSIlya Yanok * Currently valid part Names are (PART): 48*8eb16b7fSIlya Yanok * M_NAND - Micron NAND 49*8eb16b7fSIlya Yanok */ 50*8eb16b7fSIlya Yanok #define GPMC_SIZE_256M 0x0 51*8eb16b7fSIlya Yanok #define GPMC_SIZE_128M 0x8 52*8eb16b7fSIlya Yanok #define GPMC_SIZE_64M 0xC 53*8eb16b7fSIlya Yanok #define GPMC_SIZE_32M 0xE 54*8eb16b7fSIlya Yanok #define GPMC_SIZE_16M 0xF 55*8eb16b7fSIlya Yanok 56*8eb16b7fSIlya Yanok #define M_NAND_GPMC_CONFIG1 0x00000800 57*8eb16b7fSIlya Yanok #define M_NAND_GPMC_CONFIG2 0x001e1e00 58*8eb16b7fSIlya Yanok #define M_NAND_GPMC_CONFIG3 0x001e1e00 59*8eb16b7fSIlya Yanok #define M_NAND_GPMC_CONFIG4 0x16051807 60*8eb16b7fSIlya Yanok #define M_NAND_GPMC_CONFIG5 0x00151e1e 61*8eb16b7fSIlya Yanok #define M_NAND_GPMC_CONFIG6 0x16000f80 62*8eb16b7fSIlya Yanok #define M_NAND_GPMC_CONFIG7 0x00000008 63*8eb16b7fSIlya Yanok 64*8eb16b7fSIlya Yanok /* max number of GPMC Chip Selects */ 65*8eb16b7fSIlya Yanok #define GPMC_MAX_CS 8 66*8eb16b7fSIlya Yanok /* max number of GPMC regs */ 67*8eb16b7fSIlya Yanok #define GPMC_MAX_REG 7 68*8eb16b7fSIlya Yanok 69*8eb16b7fSIlya Yanok #define PISMO1_NOR 1 70*8eb16b7fSIlya Yanok #define PISMO1_NAND 2 71*8eb16b7fSIlya Yanok #define PISMO2_CS0 3 72*8eb16b7fSIlya Yanok #define PISMO2_CS1 4 73*8eb16b7fSIlya Yanok #define PISMO1_ONENAND 5 74*8eb16b7fSIlya Yanok #define DBG_MPDB 6 75*8eb16b7fSIlya Yanok #define PISMO2_NAND_CS0 7 76*8eb16b7fSIlya Yanok #define PISMO2_NAND_CS1 8 77*8eb16b7fSIlya Yanok 78*8eb16b7fSIlya Yanok /* make it readable for the gpmc_init */ 79*8eb16b7fSIlya Yanok #define PISMO1_NOR_BASE FLASH_BASE 80*8eb16b7fSIlya Yanok #define PISMO1_NAND_BASE CONFIG_SYS_NAND_BASE 81*8eb16b7fSIlya Yanok #define PISMO1_NAND_SIZE GPMC_SIZE_256M 82*8eb16b7fSIlya Yanok 83*8eb16b7fSIlya Yanok #endif /* endif _MEM_H_ */ 84