1 /* 2 * hardware.h 3 * 4 * hardware specific header 5 * 6 * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __AM33XX_HARDWARE_H 12 #define __AM33XX_HARDWARE_H 13 14 #include <config.h> 15 #include <asm/arch/omap.h> 16 #ifdef CONFIG_AM33XX 17 #include <asm/arch/hardware_am33xx.h> 18 #elif defined(CONFIG_TI816X) 19 #include <asm/arch/hardware_ti816x.h> 20 #elif defined(CONFIG_TI814X) 21 #include <asm/arch/hardware_ti814x.h> 22 #elif defined(CONFIG_AM43XX) 23 #include <asm/arch/hardware_am43xx.h> 24 #endif 25 26 /* 27 * Common hardware definitions 28 */ 29 30 /* DM Timer base addresses */ 31 #define DM_TIMER0_BASE 0x4802C000 32 #define DM_TIMER1_BASE 0x4802E000 33 #define DM_TIMER2_BASE 0x48040000 34 #define DM_TIMER3_BASE 0x48042000 35 #define DM_TIMER4_BASE 0x48044000 36 #define DM_TIMER5_BASE 0x48046000 37 #define DM_TIMER6_BASE 0x48048000 38 #define DM_TIMER7_BASE 0x4804A000 39 40 /* GPIO Base address */ 41 #define GPIO0_BASE 0x48032000 42 #define GPIO1_BASE 0x4804C000 43 44 /* BCH Error Location Module */ 45 #define ELM_BASE 0x48080000 46 47 /* EMIF Base address */ 48 #define EMIF4_0_CFG_BASE 0x4C000000 49 #define EMIF4_1_CFG_BASE 0x4D000000 50 51 /* PLL related registers */ 52 #define CM_DPLL 0x44E00500 53 #define CM_DEVICE 0x44E00700 54 #define CM_RTC 0x44E00800 55 #define CM_CEFUSE 0x44E00A00 56 #define PRM_DEVICE 0x44E00F00 57 58 /* DDR Base address */ 59 #define DDR_CTRL_ADDR 0x44E10E04 60 #define DDR_CONTROL_BASE_ADDR 0x44E11404 61 62 /* UART */ 63 #define DEFAULT_UART_BASE UART0_BASE 64 65 /* GPMC Base address */ 66 #define GPMC_BASE 0x50000000 67 68 /* CPSW Config space */ 69 #define CPSW_BASE 0x4A100000 70 71 int clk_get(int clk); 72 #endif /* __AM33XX_HARDWARE_H */ 73