1 /* 2 * clocks_am33xx.h 3 * 4 * AM33xx clock define 5 * 6 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef _CLOCKS_AM33XX_H_ 12 #define _CLOCKS_AM33XX_H_ 13 14 /* MAIN PLL Fdll supported frequencies */ 15 #define MPUPLL_M_1000 1000 16 #define MPUPLL_M_800 800 17 #define MPUPLL_M_720 720 18 #define MPUPLL_M_600 600 19 #define MPUPLL_M_550 550 20 #define MPUPLL_M_300 300 21 22 /* MAIN PLL Fdll = 550 MHz, by default */ 23 #ifndef CONFIG_SYS_MPUCLK 24 #define CONFIG_SYS_MPUCLK MPUPLL_M_550 25 #endif 26 27 #define UART_RESET (0x1 << 1) 28 #define UART_CLK_RUNNING_MASK 0x1 29 #define UART_SMART_IDLE_EN (0x1 << 0x3) 30 31 #define CM_DLL_CTRL_NO_OVERRIDE 0x0 32 #define CM_DLL_READYST 0x4 33 34 extern void enable_dmm_clocks(void); 35 extern const struct dpll_params dpll_core_opp100; 36 extern struct dpll_params dpll_mpu_opp100; 37 38 #endif /* endif _CLOCKS_AM33XX_H_ */ 39