1*dcf846d5STENART Antoine /*
2*dcf846d5STENART Antoine  * ti81xx.h
3*dcf846d5STENART Antoine  *
4*dcf846d5STENART Antoine  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
5*dcf846d5STENART Antoine  * Antoine Tenart, <atenart@adeneo-embedded.com>
6*dcf846d5STENART Antoine  *
7*dcf846d5STENART Antoine  * This file is released under the terms of GPL v2 and any later version.
8*dcf846d5STENART Antoine  * See the file COPYING in the root directory of the source tree for details.
9*dcf846d5STENART Antoine  */
10*dcf846d5STENART Antoine 
11*dcf846d5STENART Antoine #ifndef _CLOCK_TI81XX_H_
12*dcf846d5STENART Antoine #define _CLOCK_TI81XX_H_
13*dcf846d5STENART Antoine 
14*dcf846d5STENART Antoine #define PRCM_MOD_EN     0x2
15*dcf846d5STENART Antoine 
16*dcf846d5STENART Antoine #define CM_DEFAULT_BASE (PRCM_BASE + 0x0500)
17*dcf846d5STENART Antoine #define CM_ALWON_BASE   (PRCM_BASE + 0x1400)
18*dcf846d5STENART Antoine 
19*dcf846d5STENART Antoine struct cm_def {
20*dcf846d5STENART Antoine 	unsigned int resv0[2];
21*dcf846d5STENART Antoine 	unsigned int l3fastclkstctrl;
22*dcf846d5STENART Antoine 	unsigned int resv1[1];
23*dcf846d5STENART Antoine 	unsigned int pciclkstctrl;
24*dcf846d5STENART Antoine 	unsigned int resv2[1];
25*dcf846d5STENART Antoine 	unsigned int ducaticlkstctrl;
26*dcf846d5STENART Antoine 	unsigned int resv3[1];
27*dcf846d5STENART Antoine 	unsigned int emif0clkctrl;
28*dcf846d5STENART Antoine 	unsigned int emif1clkctrl;
29*dcf846d5STENART Antoine 	unsigned int dmmclkctrl;
30*dcf846d5STENART Antoine 	unsigned int fwclkctrl;
31*dcf846d5STENART Antoine 	unsigned int resv4[10];
32*dcf846d5STENART Antoine 	unsigned int usbclkctrl;
33*dcf846d5STENART Antoine 	unsigned int resv5[1];
34*dcf846d5STENART Antoine 	unsigned int sataclkctrl;
35*dcf846d5STENART Antoine 	unsigned int resv6[4];
36*dcf846d5STENART Antoine 	unsigned int ducaticlkctrl;
37*dcf846d5STENART Antoine 	unsigned int pciclkctrl;
38*dcf846d5STENART Antoine };
39*dcf846d5STENART Antoine 
40*dcf846d5STENART Antoine struct cm_alwon {
41*dcf846d5STENART Antoine 	unsigned int l3slowclkstctrl;
42*dcf846d5STENART Antoine 	unsigned int ethclkstctrl;
43*dcf846d5STENART Antoine 	unsigned int l3medclkstctrl;
44*dcf846d5STENART Antoine 	unsigned int mmu_clkstctrl;
45*dcf846d5STENART Antoine 	unsigned int mmucfg_clkstctrl;
46*dcf846d5STENART Antoine 	unsigned int ocmc0clkstctrl;
47*dcf846d5STENART Antoine #if defined(CONFIG_TI814X)
48*dcf846d5STENART Antoine 	unsigned int vcpclkstctrl;
49*dcf846d5STENART Antoine #elif defined(CONFIG_TI816X)
50*dcf846d5STENART Antoine 	unsigned int ocmc1clkstctrl;
51*dcf846d5STENART Antoine #endif
52*dcf846d5STENART Antoine 	unsigned int mpuclkstctrl;
53*dcf846d5STENART Antoine 	unsigned int sysclk4clkstctrl;
54*dcf846d5STENART Antoine 	unsigned int sysclk5clkstctrl;
55*dcf846d5STENART Antoine 	unsigned int sysclk6clkstctrl;
56*dcf846d5STENART Antoine 	unsigned int rtcclkstctrl;
57*dcf846d5STENART Antoine 	unsigned int l3fastclkstctrl;
58*dcf846d5STENART Antoine 	unsigned int resv0[67];
59*dcf846d5STENART Antoine 	unsigned int mcasp0clkctrl;
60*dcf846d5STENART Antoine 	unsigned int mcasp1clkctrl;
61*dcf846d5STENART Antoine 	unsigned int mcasp2clkctrl;
62*dcf846d5STENART Antoine 	unsigned int mcbspclkctrl;
63*dcf846d5STENART Antoine 	unsigned int uart0clkctrl;
64*dcf846d5STENART Antoine 	unsigned int uart1clkctrl;
65*dcf846d5STENART Antoine 	unsigned int uart2clkctrl;
66*dcf846d5STENART Antoine 	unsigned int gpio0clkctrl;
67*dcf846d5STENART Antoine 	unsigned int gpio1clkctrl;
68*dcf846d5STENART Antoine 	unsigned int i2c0clkctrl;
69*dcf846d5STENART Antoine 	unsigned int i2c1clkctrl;
70*dcf846d5STENART Antoine #if defined(CONFIG_TI814X)
71*dcf846d5STENART Antoine 	unsigned int mcasp345clkctrl;
72*dcf846d5STENART Antoine 	unsigned int atlclkctrl;
73*dcf846d5STENART Antoine 	unsigned int mlbclkctrl;
74*dcf846d5STENART Antoine 	unsigned int pataclkctrl;
75*dcf846d5STENART Antoine 	unsigned int resv1[1];
76*dcf846d5STENART Antoine 	unsigned int uart3clkctrl;
77*dcf846d5STENART Antoine 	unsigned int uart4clkctrl;
78*dcf846d5STENART Antoine 	unsigned int uart5clkctrl;
79*dcf846d5STENART Antoine #elif defined(CONFIG_TI816X)
80*dcf846d5STENART Antoine 	unsigned int resv1[1];
81*dcf846d5STENART Antoine 	unsigned int timer1clkctrl;
82*dcf846d5STENART Antoine 	unsigned int timer2clkctrl;
83*dcf846d5STENART Antoine 	unsigned int timer3clkctrl;
84*dcf846d5STENART Antoine 	unsigned int timer4clkctrl;
85*dcf846d5STENART Antoine 	unsigned int timer5clkctrl;
86*dcf846d5STENART Antoine 	unsigned int timer6clkctrl;
87*dcf846d5STENART Antoine 	unsigned int timer7clkctrl;
88*dcf846d5STENART Antoine #endif
89*dcf846d5STENART Antoine 	unsigned int wdtimerclkctrl;
90*dcf846d5STENART Antoine 	unsigned int spiclkctrl;
91*dcf846d5STENART Antoine 	unsigned int mailboxclkctrl;
92*dcf846d5STENART Antoine 	unsigned int spinboxclkctrl;
93*dcf846d5STENART Antoine 	unsigned int mmudataclkctrl;
94*dcf846d5STENART Antoine 	unsigned int resv2[2];
95*dcf846d5STENART Antoine 	unsigned int mmucfgclkctrl;
96*dcf846d5STENART Antoine #if defined(CONFIG_TI814X)
97*dcf846d5STENART Antoine 	unsigned int resv3[2];
98*dcf846d5STENART Antoine #elif defined(CONFIG_TI816X)
99*dcf846d5STENART Antoine 	unsigned int resv3[1];
100*dcf846d5STENART Antoine 	unsigned int sdioclkctrl;
101*dcf846d5STENART Antoine #endif
102*dcf846d5STENART Antoine 	unsigned int ocmc0clkctrl;
103*dcf846d5STENART Antoine #if defined(CONFIG_TI814X)
104*dcf846d5STENART Antoine 	unsigned int vcpclkctrl;
105*dcf846d5STENART Antoine #elif defined(CONFIG_TI816X)
106*dcf846d5STENART Antoine 	unsigned int ocmc1clkctrl;
107*dcf846d5STENART Antoine #endif
108*dcf846d5STENART Antoine 	unsigned int resv4[2];
109*dcf846d5STENART Antoine 	unsigned int controlclkctrl;
110*dcf846d5STENART Antoine 	unsigned int resv5[2];
111*dcf846d5STENART Antoine 	unsigned int gpmcclkctrl;
112*dcf846d5STENART Antoine 	unsigned int ethernet0clkctrl;
113*dcf846d5STENART Antoine 	unsigned int ethernet1clkctrl;
114*dcf846d5STENART Antoine 	unsigned int mpuclkctrl;
115*dcf846d5STENART Antoine #if defined(CONFIG_TI814X)
116*dcf846d5STENART Antoine 	unsigned int debugssclkctrl;
117*dcf846d5STENART Antoine #elif defined(CONFIG_TI816X)
118*dcf846d5STENART Antoine 	unsigned int resv6[1];
119*dcf846d5STENART Antoine #endif
120*dcf846d5STENART Antoine 	unsigned int l3clkctrl;
121*dcf846d5STENART Antoine 	unsigned int l4hsclkctrl;
122*dcf846d5STENART Antoine 	unsigned int l4lsclkctrl;
123*dcf846d5STENART Antoine 	unsigned int rtcclkctrl;
124*dcf846d5STENART Antoine 	unsigned int tpccclkctrl;
125*dcf846d5STENART Antoine 	unsigned int tptc0clkctrl;
126*dcf846d5STENART Antoine 	unsigned int tptc1clkctrl;
127*dcf846d5STENART Antoine 	unsigned int tptc2clkctrl;
128*dcf846d5STENART Antoine 	unsigned int tptc3clkctrl;
129*dcf846d5STENART Antoine #if defined(CONFIG_TI814X)
130*dcf846d5STENART Antoine 	unsigned int resv6[4];
131*dcf846d5STENART Antoine 	unsigned int dcan01clkctrl;
132*dcf846d5STENART Antoine 	unsigned int mmchs0clkctrl;
133*dcf846d5STENART Antoine 	unsigned int mmchs1clkctrl;
134*dcf846d5STENART Antoine 	unsigned int mmchs2clkctrl;
135*dcf846d5STENART Antoine 	unsigned int custefuseclkctrl;
136*dcf846d5STENART Antoine #elif defined(CONFIG_TI816X)
137*dcf846d5STENART Antoine 	unsigned int sr0clkctrl;
138*dcf846d5STENART Antoine 	unsigned int sr1clkctrl;
139*dcf846d5STENART Antoine #endif
140*dcf846d5STENART Antoine };
141*dcf846d5STENART Antoine 
142*dcf846d5STENART Antoine #endif /* _CLOCK_TI81XX_H_ */
143