1/*
2 * dts file for Xilinx ZynqMP ZCU102 RevB
3 *
4 * (C) Copyright 2016, Xilinx, Inc.
5 *
6 * Michal Simek <michal.simek@xilinx.com>
7 *
8 * SPDX-License-Identifier:	GPL-2.0+
9 */
10
11#include "zynqmp-zcu102-revA.dts"
12
13/ {
14	model = "ZynqMP ZCU102 RevB";
15};
16
17&gem3 {
18	phy-handle = <&phyc>;
19	phyc: phy@c {
20		reg = <0xc>;
21		ti,rx-internal-delay = <0x8>;
22		ti,tx-internal-delay = <0xa>;
23		ti,fifo-depth = <0x1>;
24	};
25	/* Cleanup from RevA */
26	/delete-node/ phy@21;
27};
28
29/* Different qspi 512Mbit version */
30
31/* Fix collision with u61 */
32&i2c0 {
33	i2cswitch@75 {
34		i2c@2 {
35			max15303@1b { /* u8 */
36				compatible = "max15303";
37				reg = <0x1b>;
38			};
39			/delete-node/ max15303@20;
40		};
41	};
42};
43