1/*
2 * dts file for Xilinx ZynqMP zc1751-xm019-dc5
3 *
4 * (C) Copyright 2015, Xilinx, Inc.
5 *
6 * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
7 * Michal Simek <michal.simek@xilinx.com>
8 *
9 * SPDX-License-Identifier:	GPL-2.0+
10 */
11
12/dts-v1/;
13
14#include "zynqmp.dtsi"
15#include "zynqmp-clk.dtsi"
16/ {
17	model = "ZynqMP zc1751-xm019-dc5 RevA";
18	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
19
20	aliases {
21		ethernet0 = &gem1;
22		gpio0 = &gpio;
23		i2c0 = &i2c0;
24		i2c1 = &i2c1;
25		mmc0 = &sdhci0;
26		serial0 = &uart0;
27		serial1 = &uart1;
28	};
29
30	chosen {
31		bootargs = "earlycon";
32		stdout-path = "serial0:115200n8";
33	};
34
35	memory@0 {
36		device_type = "memory";
37		reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
38	};
39};
40
41/* fpd_dma clk 667MHz, lpd_dma 500MHz */
42&fpd_dma_chan1 {
43	status = "okay";
44};
45
46&fpd_dma_chan2 {
47	status = "okay";
48};
49
50&fpd_dma_chan3 {
51	status = "okay";
52};
53
54&fpd_dma_chan4 {
55	status = "okay";
56};
57
58&fpd_dma_chan5 {
59	status = "okay";
60};
61
62&fpd_dma_chan6 {
63	status = "okay";
64};
65
66&fpd_dma_chan7 {
67	status = "okay";
68};
69
70&fpd_dma_chan8 {
71	status = "okay";
72};
73
74&gem1 {
75	status = "okay";
76	phy-handle = <&phy0>;
77	phy-mode = "rgmii-id";
78	phy0: phy@0 {
79		reg = <0>;
80	};
81};
82
83&gpio {
84	status = "okay";
85};
86
87/* FIXME: Add device */
88&i2c0 {
89	status = "okay";
90};
91
92/* FIXME: Add device */
93&i2c1 {
94	status = "okay";
95};
96
97&sdhci0 {
98	status = "okay";
99};
100
101&uart0 {
102	status = "okay";
103};
104
105&uart1 {
106	status = "okay";
107};
108
109&watchdog0 {
110	status = "okay";
111};
112