1/* 2 * dts file for Xilinx ZynqMP zc1751-xm016-dc2 3 * 4 * (C) Copyright 2015, Xilinx, Inc. 5 * 6 * Michal Simek <michal.simek@xilinx.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11/dts-v1/; 12 13#include "zynqmp.dtsi" 14#include "zynqmp-clk.dtsi" 15 16/ { 17 model = "ZynqMP zc1751-xm016-dc2 RevA"; 18 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; 19 20 aliases { 21 can0 = &can0; 22 can1 = &can1; 23 ethernet0 = &gem2; 24 gpio0 = &gpio; 25 i2c0 = &i2c0; 26 rtc0 = &rtc; 27 serial0 = &uart0; 28 serial1 = &uart1; 29 spi0 = &spi0; 30 spi1 = &spi1; 31 usb0 = &usb1; 32 }; 33 34 chosen { 35 bootargs = "earlycon"; 36 stdout-path = "serial0:115200n8"; 37 }; 38 39 memory@0 { 40 device_type = "memory"; 41 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 42 }; 43}; 44 45&can0 { 46 status = "okay"; 47}; 48 49&can1 { 50 status = "okay"; 51}; 52 53/* fpd_dma clk 667MHz, lpd_dma 500MHz */ 54&fpd_dma_chan1 { 55 status = "okay"; 56}; 57 58&fpd_dma_chan2 { 59 status = "okay"; 60}; 61 62&fpd_dma_chan3 { 63 status = "okay"; 64}; 65 66&fpd_dma_chan4 { 67 status = "okay"; 68}; 69 70&fpd_dma_chan5 { 71 status = "okay"; 72}; 73 74&fpd_dma_chan6 { 75 status = "okay"; 76}; 77 78&fpd_dma_chan7 { 79 status = "okay"; 80}; 81 82&fpd_dma_chan8 { 83 status = "okay"; 84}; 85 86&gem2 { 87 status = "okay"; 88 phy-handle = <&phy0>; 89 phy-mode = "rgmii-id"; 90 phy0: phy@5 { 91 reg = <5>; 92 ti,rx-internal-delay = <0x8>; 93 ti,tx-internal-delay = <0xa>; 94 ti,fifo-depth = <0x1>; 95 }; 96}; 97 98&gpio { 99 status = "okay"; 100}; 101 102&i2c0 { 103 status = "okay"; 104 clock-frequency = <400000>; 105 106 tca6416_u26: gpio@20 { 107 compatible = "ti,tca6416"; 108 reg = <0x20>; 109 gpio-controller; 110 #gpio-cells = <2>; 111 /* IRQ not connected */ 112 }; 113 114 rtc@68 { 115 compatible = "dallas,ds1339"; 116 reg = <0x68>; 117 }; 118}; 119 120&nand0 { 121 status = "okay"; 122 arasan,has-mdma; 123 num-cs = <2>; 124 125 partition@0 { /* for testing purpose */ 126 label = "nand-fsbl-uboot"; 127 reg = <0x0 0x0 0x400000>; 128 }; 129 partition@1 { /* for testing purpose */ 130 label = "nand-linux"; 131 reg = <0x0 0x400000 0x1400000>; 132 }; 133 partition@2 { /* for testing purpose */ 134 label = "nand-device-tree"; 135 reg = <0x0 0x1800000 0x400000>; 136 }; 137 partition@3 { /* for testing purpose */ 138 label = "nand-rootfs"; 139 reg = <0x0 0x1C00000 0x1400000>; 140 }; 141 partition@4 { /* for testing purpose */ 142 label = "nand-bitstream"; 143 reg = <0x0 0x3000000 0x400000>; 144 }; 145 partition@5 { /* for testing purpose */ 146 label = "nand-misc"; 147 reg = <0x0 0x3400000 0xFCC00000>; 148 }; 149 150 partition@6 { /* for testing purpose */ 151 label = "nand1-fsbl-uboot"; 152 reg = <0x1 0x0 0x400000>; 153 }; 154 partition@7 { /* for testing purpose */ 155 label = "nand1-linux"; 156 reg = <0x1 0x400000 0x1400000>; 157 }; 158 partition@8 { /* for testing purpose */ 159 label = "nand1-device-tree"; 160 reg = <0x1 0x1800000 0x400000>; 161 }; 162 partition@9 { /* for testing purpose */ 163 label = "nand1-rootfs"; 164 reg = <0x1 0x1C00000 0x1400000>; 165 }; 166 partition@10 { /* for testing purpose */ 167 label = "nand1-bitstream"; 168 reg = <0x1 0x3000000 0x400000>; 169 }; 170 partition@11 { /* for testing purpose */ 171 label = "nand1-misc"; 172 reg = <0x1 0x3400000 0xFCC00000>; 173 }; 174}; 175 176&rtc { 177 status = "okay"; 178}; 179 180&spi0 { 181 status = "okay"; 182 num-cs = <1>; 183 spi0_flash0: spi0_flash0@0 { 184 compatible = "m25p80"; 185 #address-cells = <1>; 186 #size-cells = <1>; 187 spi-max-frequency = <50000000>; 188 reg = <0>; 189 190 spi0_flash0@0 { 191 label = "spi0_flash0"; 192 reg = <0x0 0x100000>; 193 }; 194 }; 195}; 196 197&spi1 { 198 status = "okay"; 199 num-cs = <1>; 200 spi1_flash0: spi1_flash0@0 { 201 compatible = "mtd_dataflash"; 202 #address-cells = <1>; 203 #size-cells = <1>; 204 spi-max-frequency = <20000000>; 205 reg = <0>; 206 207 spi1_flash0@0 { 208 label = "spi1_flash0"; 209 reg = <0x0 0x84000>; 210 }; 211 }; 212}; 213 214/* ULPI SMSC USB3320 */ 215&usb1 { 216 status = "okay"; 217}; 218 219&dwc3_1 { 220 status = "okay"; 221 dr_mode = "host"; 222}; 223 224&uart0 { 225 status = "okay"; 226}; 227 228&uart1 { 229 status = "okay"; 230}; 231