1/*
2 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
3 *
4 * (C) Copyright 2015, Xilinx, Inc.
5 *
6 * Michal Simek <michal.simek@xilinx.com>
7 *
8 * SPDX-License-Identifier:	GPL-2.0+
9 */
10
11/dts-v1/;
12
13#include "zynqmp.dtsi"
14#include "zynqmp-clk.dtsi"
15
16/ {
17	model = "ZynqMP zc1751-xm016-dc2 RevA";
18	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
19
20	aliases {
21		can0 = &can0;
22		can1 = &can1;
23		ethernet0 = &gem2;
24		gpio0 = &gpio;
25		i2c0 = &i2c0;
26		rtc0 = &rtc;
27		serial0 = &uart0;
28		serial1 = &uart1;
29		spi0 = &spi0;
30		spi1 = &spi1;
31		usb0 = &usb1;
32	};
33
34	chosen {
35		bootargs = "earlycon";
36		stdout-path = "serial0:115200n8";
37	};
38
39	memory@0 {
40		device_type = "memory";
41		reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
42	};
43};
44
45&can0 {
46	status = "okay";
47};
48
49&can1 {
50	status = "okay";
51};
52
53/* fpd_dma clk 667MHz, lpd_dma 500MHz */
54&fpd_dma_chan1 {
55	status = "okay";
56	xlnx,include-sg; /* for testing purpose */
57	xlnx,overfetch; /* for testing purpose */
58	xlnx,ratectrl = <0>; /* for testing purpose */
59	xlnx,src-issue = <31>;
60};
61
62&fpd_dma_chan2 {
63	status = "okay";
64	xlnx,ratectrl = <100>; /* for testing purpose */
65	xlnx,src-issue = <4>; /* for testing purpose */
66};
67
68&fpd_dma_chan3 {
69	status = "okay";
70};
71
72&fpd_dma_chan4 {
73	status = "okay";
74	xlnx,include-sg; /* for testing purpose */
75};
76
77&fpd_dma_chan5 {
78	status = "okay";
79};
80
81&fpd_dma_chan6 {
82	status = "okay";
83	xlnx,include-sg; /* for testing purpose */
84};
85
86&fpd_dma_chan7 {
87	status = "okay";
88};
89
90&fpd_dma_chan8 {
91	status = "okay";
92	xlnx,include-sg; /* for testing purpose */
93};
94
95&gem2 {
96	status = "okay";
97	phy-handle = <&phy0>;
98	phy-mode = "rgmii-id";
99	phy0: phy@5 {
100		reg = <5>;
101		ti,rx-internal-delay = <0x8>;
102		ti,tx-internal-delay = <0xa>;
103		ti,fifo-depth = <0x1>;
104	};
105};
106
107&gpio {
108	status = "okay";
109};
110
111&i2c0 {
112	status = "okay";
113	clock-frequency = <400000>;
114
115	tca6416_u26: gpio@20 {
116		compatible = "ti,tca6416";
117		reg = <0x20>;
118		gpio-controller;
119		#gpio-cells = <2>;
120		/* IRQ not connected */
121	};
122
123	rtc@68 {
124		compatible = "dallas,ds1339";
125		reg = <0x68>;
126	};
127};
128
129&nand0 {
130	status = "okay";
131	arasan,has-mdma;
132	num-cs = <2>;
133
134	partition@0 {	/* for testing purpose */
135		label = "nand-fsbl-uboot";
136		reg = <0x0 0x0 0x400000>;
137	};
138	partition@1 {	/* for testing purpose */
139		label = "nand-linux";
140		reg = <0x0 0x400000 0x1400000>;
141	};
142	partition@2 {	/* for testing purpose */
143		label = "nand-device-tree";
144		reg = <0x0 0x1800000 0x400000>;
145	};
146	partition@3 {	/* for testing purpose */
147		label = "nand-rootfs";
148		reg = <0x0 0x1C00000 0x1400000>;
149	};
150	partition@4 {	/* for testing purpose */
151		label = "nand-bitstream";
152		reg = <0x0 0x3000000 0x400000>;
153	};
154	partition@5 {	/* for testing purpose */
155		label = "nand-misc";
156		reg = <0x0 0x3400000 0xFCC00000>;
157	};
158
159	partition@6 {	/* for testing purpose */
160		label = "nand1-fsbl-uboot";
161		reg = <0x1 0x0 0x400000>;
162	};
163	partition@7 {	/* for testing purpose */
164		label = "nand1-linux";
165		reg = <0x1 0x400000 0x1400000>;
166	};
167	partition@8 {	/* for testing purpose */
168		label = "nand1-device-tree";
169		reg = <0x1 0x1800000 0x400000>;
170	};
171	partition@9 {	/* for testing purpose */
172		label = "nand1-rootfs";
173		reg = <0x1 0x1C00000 0x1400000>;
174	};
175	partition@10 {	/* for testing purpose */
176		label = "nand1-bitstream";
177		reg = <0x1 0x3000000 0x400000>;
178	};
179	partition@11 {	/* for testing purpose */
180		label = "nand1-misc";
181		reg = <0x1 0x3400000 0xFCC00000>;
182	};
183};
184
185&rtc {
186	status = "okay";
187};
188
189&spi0 {
190	status = "okay";
191	num-cs = <1>;
192	spi0_flash0: spi0_flash0@0 {
193		compatible = "m25p80";
194		#address-cells = <1>;
195		#size-cells = <1>;
196		spi-max-frequency = <50000000>;
197		reg = <0>;
198
199		spi0_flash0@0 {
200			label = "spi0_flash0";
201			reg = <0x0 0x100000>;
202		};
203	};
204};
205
206&spi1 {
207	status = "okay";
208	num-cs = <1>;
209	spi1_flash0: spi1_flash0@0 {
210		compatible = "mtd_dataflash";
211		#address-cells = <1>;
212		#size-cells = <1>;
213		spi-max-frequency = <20000000>;
214		reg = <0>;
215
216		spi1_flash0@0 {
217			label = "spi1_flash0";
218			reg = <0x0 0x84000>;
219		};
220	};
221};
222
223/* ULPI SMSC USB3320 */
224&usb1 {
225	status = "okay";
226};
227
228&dwc3_1 {
229	status = "okay";
230	dr_mode = "host";
231};
232
233&uart0 {
234	status = "okay";
235};
236
237&uart1 {
238	status = "okay";
239};
240