1*85231c08SMichal Simek// SPDX-License-Identifier: GPL-2.0+ 2*85231c08SMichal Simek/* 3*85231c08SMichal Simek * dts file for Xilinx ZynqMP ZC1254 4*85231c08SMichal Simek * 5*85231c08SMichal Simek * (C) Copyright 2015 - 2018, Xilinx, Inc. 6*85231c08SMichal Simek * 7*85231c08SMichal Simek * Michal Simek <michal.simek@xilinx.com> 8*85231c08SMichal Simek * Siva Durga Prasad Paladugu <sivadur@xilinx.com> 9*85231c08SMichal Simek */ 10*85231c08SMichal Simek 11*85231c08SMichal Simek/dts-v1/; 12*85231c08SMichal Simek 13*85231c08SMichal Simek#include "zynqmp.dtsi" 14*85231c08SMichal Simek#include "zynqmp-clk-ccf.dtsi" 15*85231c08SMichal Simek 16*85231c08SMichal Simek/ { 17*85231c08SMichal Simek model = "ZynqMP ZC1254 RevA"; 18*85231c08SMichal Simek compatible = "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254", "xlnx,zynqmp"; 19*85231c08SMichal Simek 20*85231c08SMichal Simek aliases { 21*85231c08SMichal Simek serial0 = &uart0; 22*85231c08SMichal Simek serial1 = &dcc; 23*85231c08SMichal Simek spi0 = &qspi; 24*85231c08SMichal Simek }; 25*85231c08SMichal Simek 26*85231c08SMichal Simek chosen { 27*85231c08SMichal Simek bootargs = "earlycon"; 28*85231c08SMichal Simek stdout-path = "serial0:115200n8"; 29*85231c08SMichal Simek }; 30*85231c08SMichal Simek 31*85231c08SMichal Simek memory@0 { 32*85231c08SMichal Simek device_type = "memory"; 33*85231c08SMichal Simek reg = <0x0 0x0 0x0 0x80000000>; 34*85231c08SMichal Simek }; 35*85231c08SMichal Simek}; 36*85231c08SMichal Simek 37*85231c08SMichal Simek&dcc { 38*85231c08SMichal Simek status = "okay"; 39*85231c08SMichal Simek}; 40*85231c08SMichal Simek 41*85231c08SMichal Simek&qspi { 42*85231c08SMichal Simek status = "okay"; 43*85231c08SMichal Simek flash@0 { 44*85231c08SMichal Simek compatible = "m25p80"; /* 32MB */ 45*85231c08SMichal Simek #address-cells = <1>; 46*85231c08SMichal Simek #size-cells = <1>; 47*85231c08SMichal Simek reg = <0x0>; 48*85231c08SMichal Simek spi-tx-bus-width = <1>; 49*85231c08SMichal Simek spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ 50*85231c08SMichal Simek spi-max-frequency = <108000000>; /* Based on DC1 spec */ 51*85231c08SMichal Simek partition@qspi-fsbl-uboot { /* for testing purpose */ 52*85231c08SMichal Simek label = "qspi-fsbl-uboot"; 53*85231c08SMichal Simek reg = <0x0 0x100000>; 54*85231c08SMichal Simek }; 55*85231c08SMichal Simek partition@qspi-linux { /* for testing purpose */ 56*85231c08SMichal Simek label = "qspi-linux"; 57*85231c08SMichal Simek reg = <0x100000 0x500000>; 58*85231c08SMichal Simek }; 59*85231c08SMichal Simek partition@qspi-device-tree { /* for testing purpose */ 60*85231c08SMichal Simek label = "qspi-device-tree"; 61*85231c08SMichal Simek reg = <0x600000 0x20000>; 62*85231c08SMichal Simek }; 63*85231c08SMichal Simek partition@qspi-rootfs { /* for testing purpose */ 64*85231c08SMichal Simek label = "qspi-rootfs"; 65*85231c08SMichal Simek reg = <0x620000 0x5E0000>; 66*85231c08SMichal Simek }; 67*85231c08SMichal Simek }; 68*85231c08SMichal Simek}; 69*85231c08SMichal Simek 70*85231c08SMichal Simek&uart0 { 71*85231c08SMichal Simek status = "okay"; 72*85231c08SMichal Simek}; 73