xref: /openbmc/u-boot/arch/arm/dts/zynq-zybo.dts (revision ca6c5e03) 
1/*
2 * Digilent ZYBO board DTS
3 *
4 *  Copyright (C) 2011 - 2015 Xilinx
5 *  Copyright (C) 2012 National Instruments Corp.
6 *
7 * SPDX-License-Identifier:	GPL-2.0+
8 */
9/dts-v1/;
10#include "zynq-7000.dtsi"
11
12/ {
13	model = "Zynq ZYBO Development Board";
14	compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
15
16	aliases {
17		ethernet0 = &gem0;
18		serial0 = &uart1;
19		spi0 = &qspi;
20		mmc0 = &sdhci0;
21	};
22
23	memory {
24		device_type = "memory";
25		reg = <0x0 0x20000000>;
26	};
27
28	chosen {
29		bootargs = "";
30		stdout-path = "serial0:115200n8";
31	};
32
33	usb_phy0: phy0 {
34		compatible = "usb-nop-xceiv";
35		#phy-cells = <0>;
36		reset-gpios = <&gpio0 46 1>;
37	};
38};
39
40&clkc {
41	ps-clk-frequency = <50000000>;
42};
43
44&gem0 {
45	status = "okay";
46	phy-mode = "rgmii-id";
47	phy-handle = <&ethernet_phy>;
48
49	ethernet_phy: ethernet-phy@0 {
50		reg = <0>;
51	};
52};
53
54&qspi {
55	u-boot,dm-pre-reloc;
56	status = "okay";
57};
58
59&sdhci0 {
60	u-boot,dm-pre-reloc;
61	status = "okay";
62};
63
64&uart1 {
65	u-boot,dm-pre-reloc;
66	status = "okay";
67};
68
69&usb0 {
70	status = "okay";
71	dr_mode = "host";
72	usb-phy = <&usb_phy0>;
73};
74