xref: /openbmc/u-boot/arch/arm/dts/zynq-zybo.dts (revision 3949d2a7) 
1/*
2 * Digilent ZYBO board DTS
3 *
4 *  Copyright (C) 2011 - 2015 Xilinx
5 *  Copyright (C) 2012 National Instruments Corp.
6 *
7 * SPDX-License-Identifier:	GPL-2.0+
8 */
9/dts-v1/;
10#include "zynq-7000.dtsi"
11
12/ {
13	model = "Zynq ZYBO Development Board";
14	compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
15
16	aliases {
17		ethernet0 = &gem0;
18		serial0 = &uart1;
19		spi0 = &qspi;
20		mmc0 = &sdhci0;
21	};
22
23	memory@0 {
24		device_type = "memory";
25		reg = <0x0 0x20000000>;
26	};
27
28	chosen {
29		bootargs = "";
30		stdout-path = "serial0:115200n8";
31	};
32
33	usb_phy0: phy0 {
34		#phy-cells = <0>;
35		compatible = "usb-nop-xceiv";
36		reset-gpios = <&gpio0 46 1>;
37	};
38};
39
40&clkc {
41	ps-clk-frequency = <50000000>;
42};
43
44&gem0 {
45	status = "okay";
46	phy-mode = "rgmii-id";
47	phy-handle = <&ethernet_phy>;
48
49	ethernet_phy: ethernet-phy@0 {
50		reg = <0>;
51		device_type = "ethernet-phy";
52	};
53};
54
55&qspi {
56	u-boot,dm-pre-reloc;
57	status = "okay";
58};
59
60&sdhci0 {
61	u-boot,dm-pre-reloc;
62	status = "okay";
63};
64
65&uart1 {
66	u-boot,dm-pre-reloc;
67	status = "okay";
68};
69
70&usb0 {
71	status = "okay";
72	dr_mode = "host";
73	usb-phy = <&usb_phy0>;
74};
75