xref: /openbmc/u-boot/arch/arm/dts/zynq-zybo.dts (revision 999667ca)
19757b65bSPeter Crosthwaite/*
29757b65bSPeter Crosthwaite * Digilent ZYBO board DTS
39757b65bSPeter Crosthwaite *
4*999667caSMichal Simek *  Copyright (C) 2011 - 2015 Xilinx
5*999667caSMichal Simek *  Copyright (C) 2012 National Instruments Corp.
69757b65bSPeter Crosthwaite *
79757b65bSPeter Crosthwaite * SPDX-License-Identifier:	GPL-2.0+
89757b65bSPeter Crosthwaite */
99757b65bSPeter Crosthwaite/dts-v1/;
109757b65bSPeter Crosthwaite#include "zynq-7000.dtsi"
119757b65bSPeter Crosthwaite
129757b65bSPeter Crosthwaite/ {
13*999667caSMichal Simek	model = "Zynq ZYBO Development Board";
14*999667caSMichal Simek	compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
159757b65bSPeter Crosthwaite
169757b65bSPeter Crosthwaite	aliases {
17*999667caSMichal Simek		ethernet0 = &gem0;
189757b65bSPeter Crosthwaite		serial0 = &uart1;
199757b65bSPeter Crosthwaite	};
209757b65bSPeter Crosthwaite
219757b65bSPeter Crosthwaite	memory {
229757b65bSPeter Crosthwaite		device_type = "memory";
23*999667caSMichal Simek		reg = <0x0 0x20000000>;
249757b65bSPeter Crosthwaite	};
25*999667caSMichal Simek
26*999667caSMichal Simek	chosen {
27*999667caSMichal Simek		bootargs = "earlyprintk";
28*999667caSMichal Simek		stdout-path = "serial0:115200n8";
29*999667caSMichal Simek	};
30*999667caSMichal Simek
31*999667caSMichal Simek};
32*999667caSMichal Simek
33*999667caSMichal Simek&clkc {
34*999667caSMichal Simek	ps-clk-frequency = <50000000>;
35*999667caSMichal Simek};
36*999667caSMichal Simek
37*999667caSMichal Simek&gem0 {
38*999667caSMichal Simek	status = "okay";
39*999667caSMichal Simek	phy-mode = "rgmii-id";
40*999667caSMichal Simek	phy-handle = <&ethernet_phy>;
41*999667caSMichal Simek
42*999667caSMichal Simek	ethernet_phy: ethernet-phy@0 {
43*999667caSMichal Simek		reg = <0>;
44*999667caSMichal Simek	};
45*999667caSMichal Simek};
46*999667caSMichal Simek
47*999667caSMichal Simek&sdhci0 {
48*999667caSMichal Simek	status = "okay";
49*999667caSMichal Simek};
50*999667caSMichal Simek
51*999667caSMichal Simek&uart1 {
52*999667caSMichal Simek	status = "okay";
539757b65bSPeter Crosthwaite};
54