19757b65bSPeter Crosthwaite/* 29757b65bSPeter Crosthwaite * Digilent ZYBO board DTS 39757b65bSPeter Crosthwaite * 4999667caSMichal Simek * Copyright (C) 2011 - 2015 Xilinx 5999667caSMichal Simek * Copyright (C) 2012 National Instruments Corp. 69757b65bSPeter Crosthwaite * 79757b65bSPeter Crosthwaite * SPDX-License-Identifier: GPL-2.0+ 89757b65bSPeter Crosthwaite */ 99757b65bSPeter Crosthwaite/dts-v1/; 109757b65bSPeter Crosthwaite#include "zynq-7000.dtsi" 119757b65bSPeter Crosthwaite 129757b65bSPeter Crosthwaite/ { 13999667caSMichal Simek model = "Zynq ZYBO Development Board"; 14999667caSMichal Simek compatible = "digilent,zynq-zybo", "xlnx,zynq-7000"; 159757b65bSPeter Crosthwaite 169757b65bSPeter Crosthwaite aliases { 17999667caSMichal Simek ethernet0 = &gem0; 189757b65bSPeter Crosthwaite serial0 = &uart1; 19*8647219bSMichal Simek mmc0 = &sdhci0; 209757b65bSPeter Crosthwaite }; 219757b65bSPeter Crosthwaite 229757b65bSPeter Crosthwaite memory { 239757b65bSPeter Crosthwaite device_type = "memory"; 24999667caSMichal Simek reg = <0x0 0x20000000>; 259757b65bSPeter Crosthwaite }; 26999667caSMichal Simek 27999667caSMichal Simek chosen { 28999667caSMichal Simek bootargs = "earlyprintk"; 29999667caSMichal Simek stdout-path = "serial0:115200n8"; 30999667caSMichal Simek }; 31999667caSMichal Simek 32999667caSMichal Simek}; 33999667caSMichal Simek 34999667caSMichal Simek&clkc { 35999667caSMichal Simek ps-clk-frequency = <50000000>; 36999667caSMichal Simek}; 37999667caSMichal Simek 38999667caSMichal Simek&gem0 { 39999667caSMichal Simek status = "okay"; 40999667caSMichal Simek phy-mode = "rgmii-id"; 41999667caSMichal Simek phy-handle = <ðernet_phy>; 42999667caSMichal Simek 43999667caSMichal Simek ethernet_phy: ethernet-phy@0 { 44999667caSMichal Simek reg = <0>; 45999667caSMichal Simek }; 46999667caSMichal Simek}; 47999667caSMichal Simek 48999667caSMichal Simek&sdhci0 { 49*8647219bSMichal Simek u-boot,dm-pre-reloc; 50999667caSMichal Simek status = "okay"; 51999667caSMichal Simek}; 52999667caSMichal Simek 53999667caSMichal Simek&uart1 { 54035c6b27SSimon Glass u-boot,dm-pre-reloc; 55999667caSMichal Simek status = "okay"; 569757b65bSPeter Crosthwaite}; 57