xref: /openbmc/u-boot/arch/arm/dts/zynq-zturn.dts (revision ee943655)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 *  Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com>
4 *  Copyright (C) 2017 Alexander Graf <agraf@suse.de>
5 *
6 *  Based on zynq-zed.dts which is:
7 *  Copyright (C) 2011 - 2014 Xilinx
8 *  Copyright (C) 2012 National Instruments Corp.
9 *
10 */
11
12/dts-v1/;
13/include/ "zynq-7000.dtsi"
14
15/ {
16	model = "Zynq Z-Turn MYIR Board";
17	compatible = "myir,zynq-zturn", "xlnx,zynq-7000";
18
19	aliases {
20		ethernet0 = &gem0;
21		serial0 = &uart1;
22		serial1 = &uart0;
23		mmc0 = &sdhci0;
24	};
25
26	memory@0 {
27		device_type = "memory";
28		reg = <0x0 0x40000000>;
29	};
30
31	chosen {
32		stdout-path = "serial0:115200n8";
33	};
34
35	gpio-leds {
36		compatible = "gpio-leds";
37		usr-led1 {
38			label = "usr-led1";
39			gpios = <&gpio0 0x0 0x1>;
40			default-state = "off";
41		};
42
43		usr-led2 {
44			label = "usr-led2";
45			gpios = <&gpio0 0x9 0x1>;
46			default-state = "off";
47		};
48	};
49
50	gpio-keys {
51		compatible = "gpio-keys";
52		#address-cells = <1>;
53		#size-cells = <0>;
54		autorepeat;
55		K1 {
56			label = "K1";
57			gpios = <&gpio0 0x32 0x1>;
58			linux,code = <0x66>;
59			gpio-key,wakeup;
60			autorepeat;
61		};
62	};
63};
64
65&clkc {
66	ps-clk-frequency = <33333333>;
67};
68
69&qspi {
70	u-boot,dm-pre-reloc;
71	status = "okay";
72};
73
74&gem0 {
75	status = "okay";
76	phy-mode = "rgmii-id";
77	phy-handle = <&ethernet_phy>;
78
79	ethernet_phy: ethernet-phy@0 {
80		reg = <0x0>;
81	};
82};
83
84&sdhci0 {
85	u-boot,dm-pre-reloc;
86	status = "okay";
87};
88
89&uart0 {
90	u-boot,dm-pre-reloc;
91	status = "okay";
92};
93
94&uart1 {
95	u-boot,dm-pre-reloc;
96	status = "okay";
97};
98
99&usb0 {
100	status = "okay";
101	dr_mode = "host";
102};
103
104&can0 {
105	status = "okay";
106};
107
108&i2c0 {
109	status = "okay";
110	clock-frequency = <400000>;
111
112	stlm75@49 {
113		status = "okay";
114		compatible = "lm75";
115		reg = <0x49>;
116	};
117
118	accelerometer@53 {
119		compatible = "adi,adxl345", "adxl345", "adi,adxl34x", "adxl34x";
120		reg = <0x53>;
121		interrupt-parent = <&intc>;
122		interrupts = <0x0 0x1e 0x4>;
123	};
124};
125