15ab502cbSMasahiro Yamada/* 25ab502cbSMasahiro Yamada * Xilinx ZC770 XM012 board DTS 35ab502cbSMasahiro Yamada * 4*5c45b166SMichal Simek * Copyright (C) 2013 - 2015 Xilinx, Inc. 55ab502cbSMasahiro Yamada * 65ab502cbSMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 75ab502cbSMasahiro Yamada */ 85ab502cbSMasahiro Yamada/dts-v1/; 95ab502cbSMasahiro Yamada#include "zynq-7000.dtsi" 105ab502cbSMasahiro Yamada 115ab502cbSMasahiro Yamada/ { 125ab502cbSMasahiro Yamada compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; 13*5c45b166SMichal Simek model = "Xilinx Zynq"; 147d34c5deSMasahiro Yamada 159f9d41baSMasahiro Yamada aliases { 16*5c45b166SMichal Simek i2c0 = &i2c0; 17*5c45b166SMichal Simek i2c1 = &i2c1; 189f9d41baSMasahiro Yamada serial0 = &uart1; 19*5c45b166SMichal Simek spi0 = &spi1; 209f9d41baSMasahiro Yamada }; 219f9d41baSMasahiro Yamada 22*5c45b166SMichal Simek chosen { 23*5c45b166SMichal Simek bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk"; 24*5c45b166SMichal Simek linux,stdout-path = &uart1; 25*5c45b166SMichal Simek stdout-path = &uart1; 267d34c5deSMasahiro Yamada }; 27*5c45b166SMichal Simek 28*5c45b166SMichal Simek memory@0 { 29*5c45b166SMichal Simek device_type = "memory"; 30*5c45b166SMichal Simek reg = <0x0 0x40000000>; 31*5c45b166SMichal Simek }; 32*5c45b166SMichal Simek}; 33*5c45b166SMichal Simek 34*5c45b166SMichal Simek&spi1 { 35*5c45b166SMichal Simek status = "okay"; 36*5c45b166SMichal Simek num-cs = <4>; 37*5c45b166SMichal Simek is-decoded-cs = <0>; 38*5c45b166SMichal Simek}; 39*5c45b166SMichal Simek 40*5c45b166SMichal Simek&can1 { 41*5c45b166SMichal Simek status = "okay"; 42*5c45b166SMichal Simek}; 43*5c45b166SMichal Simek 44*5c45b166SMichal Simek&i2c0 { 45*5c45b166SMichal Simek status = "okay"; 46*5c45b166SMichal Simek clock-frequency = <400000>; 47*5c45b166SMichal Simek 48*5c45b166SMichal Simek m24c02_eeprom@52 { 49*5c45b166SMichal Simek compatible = "at,24c02"; 50*5c45b166SMichal Simek reg = <0x52>; 51*5c45b166SMichal Simek }; 52*5c45b166SMichal Simek}; 53*5c45b166SMichal Simek 54*5c45b166SMichal Simek&i2c1 { 55*5c45b166SMichal Simek status = "okay"; 56*5c45b166SMichal Simek clock-frequency = <400000>; 57*5c45b166SMichal Simek 58*5c45b166SMichal Simek m24c02_eeprom@52 { 59*5c45b166SMichal Simek compatible = "at,24c02"; 60*5c45b166SMichal Simek reg = <0x52>; 61*5c45b166SMichal Simek }; 62*5c45b166SMichal Simek}; 63*5c45b166SMichal Simek 64*5c45b166SMichal Simek&uart1 { 65*5c45b166SMichal Simek status = "okay"; 665ab502cbSMasahiro Yamada}; 67