15ab502cbSMasahiro Yamada/* 25ab502cbSMasahiro Yamada * Xilinx ZC770 XM012 board DTS 35ab502cbSMasahiro Yamada * 45c45b166SMichal Simek * Copyright (C) 2013 - 2015 Xilinx, Inc. 55ab502cbSMasahiro Yamada * 65ab502cbSMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 75ab502cbSMasahiro Yamada */ 85ab502cbSMasahiro Yamada/dts-v1/; 95ab502cbSMasahiro Yamada#include "zynq-7000.dtsi" 105ab502cbSMasahiro Yamada 115ab502cbSMasahiro Yamada/ { 125ab502cbSMasahiro Yamada compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; 135c45b166SMichal Simek model = "Xilinx Zynq"; 147d34c5deSMasahiro Yamada 159f9d41baSMasahiro Yamada aliases { 165c45b166SMichal Simek i2c0 = &i2c0; 175c45b166SMichal Simek i2c1 = &i2c1; 189f9d41baSMasahiro Yamada serial0 = &uart1; 195c45b166SMichal Simek spi0 = &spi1; 209f9d41baSMasahiro Yamada }; 219f9d41baSMasahiro Yamada 225c45b166SMichal Simek chosen { 23*4691941bSMichal Simek bootargs = "root=/dev/ram rw earlyprintk"; 24*4691941bSMichal Simek stdout-path = "serial0:115200n8"; 257d34c5deSMasahiro Yamada }; 265c45b166SMichal Simek 27f0600af2SMichal Simek memory { 285c45b166SMichal Simek device_type = "memory"; 295c45b166SMichal Simek reg = <0x0 0x40000000>; 305c45b166SMichal Simek }; 315c45b166SMichal Simek}; 325c45b166SMichal Simek 335c45b166SMichal Simek&spi1 { 345c45b166SMichal Simek status = "okay"; 355c45b166SMichal Simek num-cs = <4>; 365c45b166SMichal Simek is-decoded-cs = <0>; 375c45b166SMichal Simek}; 385c45b166SMichal Simek 395c45b166SMichal Simek&can1 { 405c45b166SMichal Simek status = "okay"; 415c45b166SMichal Simek}; 425c45b166SMichal Simek 435c45b166SMichal Simek&i2c0 { 445c45b166SMichal Simek status = "okay"; 455c45b166SMichal Simek clock-frequency = <400000>; 465c45b166SMichal Simek 475c45b166SMichal Simek m24c02_eeprom@52 { 485c45b166SMichal Simek compatible = "at,24c02"; 495c45b166SMichal Simek reg = <0x52>; 505c45b166SMichal Simek }; 515c45b166SMichal Simek}; 525c45b166SMichal Simek 535c45b166SMichal Simek&i2c1 { 545c45b166SMichal Simek status = "okay"; 555c45b166SMichal Simek clock-frequency = <400000>; 565c45b166SMichal Simek 575c45b166SMichal Simek m24c02_eeprom@52 { 585c45b166SMichal Simek compatible = "at,24c02"; 595c45b166SMichal Simek reg = <0x52>; 605c45b166SMichal Simek }; 615c45b166SMichal Simek}; 625c45b166SMichal Simek 635c45b166SMichal Simek&uart1 { 64035c6b27SSimon Glass u-boot,dm-pre-reloc; 655c45b166SMichal Simek status = "okay"; 665ab502cbSMasahiro Yamada}; 67