1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Xilinx ZC770 XM010 board DTS
4 *
5 * Copyright (C) 2013-2018 Xilinx, Inc.
6 */
7/dts-v1/;
8#include "zynq-7000.dtsi"
9
10/ {
11	compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
12	model = "Xilinx Zynq";
13
14	aliases {
15		ethernet0 = &gem0;
16		i2c0 = &i2c0;
17		serial0 = &uart1;
18		spi0 = &qspi;
19		spi1 = &spi1;
20	};
21
22	chosen {
23		bootargs = "";
24		stdout-path = "serial0:115200n8";
25	};
26
27	memory@0 {
28		device_type = "memory";
29		reg = <0x0 0x40000000>;
30	};
31
32	usb_phy0: phy0 {
33		compatible = "usb-nop-xceiv";
34		#phy-cells = <0>;
35	};
36};
37
38&can0 {
39	status = "okay";
40};
41
42&gem0 {
43	status = "okay";
44	phy-mode = "rgmii-id";
45	phy-handle = <&ethernet_phy>;
46
47	ethernet_phy: ethernet-phy@7 {
48		reg = <7>;
49		device_type = "ethernet-phy";
50	};
51};
52
53&i2c0 {
54	status = "okay";
55	clock-frequency = <400000>;
56
57	eeprom: eeprom@52 {
58		compatible = "atmel,24c02";
59		reg = <0x52>;
60	};
61
62};
63
64&qspi {
65	status = "okay";
66};
67
68&sdhci0 {
69	status = "okay";
70};
71
72&spi1 {
73	status = "okay";
74	num-cs = <4>;
75	is-decoded-cs = <0>;
76	flash@0 {
77		compatible = "sst25wf080", "jedec,spi-nor";
78		reg = <1>;
79		spi-max-frequency = <1000000>;
80		partitions {
81			compatible = "fixed-partitions";
82			#address-cells = <1>;
83			#size-cells = <1>;
84			partition@0 {
85				label = "data";
86				reg = <0x0 0x100000>;
87			};
88		};
89	};
90};
91
92&uart1 {
93	u-boot,dm-pre-reloc;
94	status = "okay";
95};
96
97&usb0 {
98	status = "okay";
99	dr_mode = "host";
100	usb-phy = <&usb_phy0>;
101};
102