xref: /openbmc/u-boot/arch/arm/dts/usb_a9263.dts (revision d1e15041)
1*fdc77189SWenyou.Yang@microchip.com/*
2*fdc77189SWenyou.Yang@microchip.com * usb_a9263.dts - Device Tree file for Caloa USB A9293 board
3*fdc77189SWenyou.Yang@microchip.com *
4*fdc77189SWenyou.Yang@microchip.com *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5*fdc77189SWenyou.Yang@microchip.com *
6*fdc77189SWenyou.Yang@microchip.com * Licensed under GPLv2 only
7*fdc77189SWenyou.Yang@microchip.com */
8*fdc77189SWenyou.Yang@microchip.com/dts-v1/;
9*fdc77189SWenyou.Yang@microchip.com#include "at91sam9263.dtsi"
10*fdc77189SWenyou.Yang@microchip.com
11*fdc77189SWenyou.Yang@microchip.com/ {
12*fdc77189SWenyou.Yang@microchip.com	model = "Calao USB A9263";
13*fdc77189SWenyou.Yang@microchip.com	compatible = "atmel,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";
14*fdc77189SWenyou.Yang@microchip.com
15*fdc77189SWenyou.Yang@microchip.com	chosen {
16*fdc77189SWenyou.Yang@microchip.com		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
17*fdc77189SWenyou.Yang@microchip.com	};
18*fdc77189SWenyou.Yang@microchip.com
19*fdc77189SWenyou.Yang@microchip.com	memory {
20*fdc77189SWenyou.Yang@microchip.com		reg = <0x20000000 0x4000000>;
21*fdc77189SWenyou.Yang@microchip.com	};
22*fdc77189SWenyou.Yang@microchip.com
23*fdc77189SWenyou.Yang@microchip.com	clocks {
24*fdc77189SWenyou.Yang@microchip.com		slow_xtal {
25*fdc77189SWenyou.Yang@microchip.com			clock-frequency = <32768>;
26*fdc77189SWenyou.Yang@microchip.com		};
27*fdc77189SWenyou.Yang@microchip.com
28*fdc77189SWenyou.Yang@microchip.com		main_xtal {
29*fdc77189SWenyou.Yang@microchip.com			clock-frequency = <12000000>;
30*fdc77189SWenyou.Yang@microchip.com		};
31*fdc77189SWenyou.Yang@microchip.com	};
32*fdc77189SWenyou.Yang@microchip.com
33*fdc77189SWenyou.Yang@microchip.com	ahb {
34*fdc77189SWenyou.Yang@microchip.com		apb {
35*fdc77189SWenyou.Yang@microchip.com			dbgu: serial@ffffee00 {
36*fdc77189SWenyou.Yang@microchip.com				status = "okay";
37*fdc77189SWenyou.Yang@microchip.com			};
38*fdc77189SWenyou.Yang@microchip.com
39*fdc77189SWenyou.Yang@microchip.com			macb0: ethernet@fffbc000 {
40*fdc77189SWenyou.Yang@microchip.com				phy-mode = "rmii";
41*fdc77189SWenyou.Yang@microchip.com				status = "okay";
42*fdc77189SWenyou.Yang@microchip.com			};
43*fdc77189SWenyou.Yang@microchip.com
44*fdc77189SWenyou.Yang@microchip.com			usb1: gadget@fff78000 {
45*fdc77189SWenyou.Yang@microchip.com				atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
46*fdc77189SWenyou.Yang@microchip.com				status = "okay";
47*fdc77189SWenyou.Yang@microchip.com			};
48*fdc77189SWenyou.Yang@microchip.com
49*fdc77189SWenyou.Yang@microchip.com			spi0: spi@fffa4000 {
50*fdc77189SWenyou.Yang@microchip.com				cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>;
51*fdc77189SWenyou.Yang@microchip.com				status = "okay";
52*fdc77189SWenyou.Yang@microchip.com				mtd_dataflash@0 {
53*fdc77189SWenyou.Yang@microchip.com					compatible = "atmel,at45", "atmel,dataflash";
54*fdc77189SWenyou.Yang@microchip.com					reg = <0>;
55*fdc77189SWenyou.Yang@microchip.com					spi-max-frequency = <15000000>;
56*fdc77189SWenyou.Yang@microchip.com				};
57*fdc77189SWenyou.Yang@microchip.com			};
58*fdc77189SWenyou.Yang@microchip.com
59*fdc77189SWenyou.Yang@microchip.com			shdwc@fffffd10 {
60*fdc77189SWenyou.Yang@microchip.com				atmel,wakeup-counter = <10>;
61*fdc77189SWenyou.Yang@microchip.com				atmel,wakeup-rtt-timer;
62*fdc77189SWenyou.Yang@microchip.com			};
63*fdc77189SWenyou.Yang@microchip.com		};
64*fdc77189SWenyou.Yang@microchip.com
65*fdc77189SWenyou.Yang@microchip.com		nand0: nand@40000000 {
66*fdc77189SWenyou.Yang@microchip.com			nand-bus-width = <8>;
67*fdc77189SWenyou.Yang@microchip.com			nand-ecc-mode = "soft";
68*fdc77189SWenyou.Yang@microchip.com			nand-on-flash-bbt;
69*fdc77189SWenyou.Yang@microchip.com			status = "okay";
70*fdc77189SWenyou.Yang@microchip.com
71*fdc77189SWenyou.Yang@microchip.com			at91bootstrap@0 {
72*fdc77189SWenyou.Yang@microchip.com				label = "at91bootstrap";
73*fdc77189SWenyou.Yang@microchip.com				reg = <0x0 0x20000>;
74*fdc77189SWenyou.Yang@microchip.com			};
75*fdc77189SWenyou.Yang@microchip.com
76*fdc77189SWenyou.Yang@microchip.com			barebox@20000 {
77*fdc77189SWenyou.Yang@microchip.com				label = "barebox";
78*fdc77189SWenyou.Yang@microchip.com				reg = <0x20000 0x40000>;
79*fdc77189SWenyou.Yang@microchip.com			};
80*fdc77189SWenyou.Yang@microchip.com
81*fdc77189SWenyou.Yang@microchip.com			bareboxenv@60000 {
82*fdc77189SWenyou.Yang@microchip.com				label = "bareboxenv";
83*fdc77189SWenyou.Yang@microchip.com				reg = <0x60000 0x20000>;
84*fdc77189SWenyou.Yang@microchip.com			};
85*fdc77189SWenyou.Yang@microchip.com
86*fdc77189SWenyou.Yang@microchip.com			bareboxenv2@80000 {
87*fdc77189SWenyou.Yang@microchip.com				label = "bareboxenv2";
88*fdc77189SWenyou.Yang@microchip.com				reg = <0x80000 0x20000>;
89*fdc77189SWenyou.Yang@microchip.com			};
90*fdc77189SWenyou.Yang@microchip.com
91*fdc77189SWenyou.Yang@microchip.com			oftree@80000 {
92*fdc77189SWenyou.Yang@microchip.com				label = "oftree";
93*fdc77189SWenyou.Yang@microchip.com				reg = <0xa0000 0x20000>;
94*fdc77189SWenyou.Yang@microchip.com			};
95*fdc77189SWenyou.Yang@microchip.com
96*fdc77189SWenyou.Yang@microchip.com			kernel@a0000 {
97*fdc77189SWenyou.Yang@microchip.com				label = "kernel";
98*fdc77189SWenyou.Yang@microchip.com				reg = <0xc0000 0x400000>;
99*fdc77189SWenyou.Yang@microchip.com			};
100*fdc77189SWenyou.Yang@microchip.com
101*fdc77189SWenyou.Yang@microchip.com			rootfs@4a0000 {
102*fdc77189SWenyou.Yang@microchip.com				label = "rootfs";
103*fdc77189SWenyou.Yang@microchip.com				reg = <0x4c0000 0x7800000>;
104*fdc77189SWenyou.Yang@microchip.com			};
105*fdc77189SWenyou.Yang@microchip.com
106*fdc77189SWenyou.Yang@microchip.com			data@7ca0000 {
107*fdc77189SWenyou.Yang@microchip.com				label = "data";
108*fdc77189SWenyou.Yang@microchip.com				reg = <0x7cc0000 0x8340000>;
109*fdc77189SWenyou.Yang@microchip.com			};
110*fdc77189SWenyou.Yang@microchip.com		};
111*fdc77189SWenyou.Yang@microchip.com
112*fdc77189SWenyou.Yang@microchip.com		usb0: ohci@00a00000 {
113*fdc77189SWenyou.Yang@microchip.com			num-ports = <2>;
114*fdc77189SWenyou.Yang@microchip.com			status = "okay";
115*fdc77189SWenyou.Yang@microchip.com		};
116*fdc77189SWenyou.Yang@microchip.com	};
117*fdc77189SWenyou.Yang@microchip.com
118*fdc77189SWenyou.Yang@microchip.com	leds {
119*fdc77189SWenyou.Yang@microchip.com		compatible = "gpio-leds";
120*fdc77189SWenyou.Yang@microchip.com
121*fdc77189SWenyou.Yang@microchip.com		user_led {
122*fdc77189SWenyou.Yang@microchip.com			label = "user_led";
123*fdc77189SWenyou.Yang@microchip.com			gpios = <&pioB 21 GPIO_ACTIVE_HIGH>;
124*fdc77189SWenyou.Yang@microchip.com			linux,default-trigger = "heartbeat";
125*fdc77189SWenyou.Yang@microchip.com		};
126*fdc77189SWenyou.Yang@microchip.com	};
127*fdc77189SWenyou.Yang@microchip.com
128*fdc77189SWenyou.Yang@microchip.com	gpio_keys {
129*fdc77189SWenyou.Yang@microchip.com		compatible = "gpio-keys";
130*fdc77189SWenyou.Yang@microchip.com
131*fdc77189SWenyou.Yang@microchip.com		user_pb {
132*fdc77189SWenyou.Yang@microchip.com			label = "user_pb";
133*fdc77189SWenyou.Yang@microchip.com			gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
134*fdc77189SWenyou.Yang@microchip.com			linux,code = <28>;
135*fdc77189SWenyou.Yang@microchip.com			wakeup-source;
136*fdc77189SWenyou.Yang@microchip.com		};
137*fdc77189SWenyou.Yang@microchip.com	};
138*fdc77189SWenyou.Yang@microchip.com
139*fdc77189SWenyou.Yang@microchip.com	i2c-gpio-0 {
140*fdc77189SWenyou.Yang@microchip.com		status = "okay";
141*fdc77189SWenyou.Yang@microchip.com	};
142*fdc77189SWenyou.Yang@microchip.com};
143