161e6cc0aSMasahiro Yamada/* 261e6cc0aSMasahiro Yamada * Device Tree Source for UniPhier PXs3 SoC 361e6cc0aSMasahiro Yamada * 461e6cc0aSMasahiro Yamada * Copyright (C) 2017 Socionext Inc. 561e6cc0aSMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 661e6cc0aSMasahiro Yamada * 731c86aa7SMasahiro Yamada * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 861e6cc0aSMasahiro Yamada */ 961e6cc0aSMasahiro Yamada 10*b443fb42SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 11*b443fb42SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 12*b443fb42SMasahiro Yamada 1331c86aa7SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 1461e6cc0aSMasahiro Yamada 1561e6cc0aSMasahiro Yamada/ { 1661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3"; 1761e6cc0aSMasahiro Yamada #address-cells = <2>; 1861e6cc0aSMasahiro Yamada #size-cells = <2>; 1961e6cc0aSMasahiro Yamada interrupt-parent = <&gic>; 2061e6cc0aSMasahiro Yamada 2161e6cc0aSMasahiro Yamada cpus { 2261e6cc0aSMasahiro Yamada #address-cells = <2>; 2361e6cc0aSMasahiro Yamada #size-cells = <0>; 2461e6cc0aSMasahiro Yamada 2561e6cc0aSMasahiro Yamada cpu-map { 2661e6cc0aSMasahiro Yamada cluster0 { 2761e6cc0aSMasahiro Yamada core0 { 2861e6cc0aSMasahiro Yamada cpu = <&cpu0>; 2961e6cc0aSMasahiro Yamada }; 3061e6cc0aSMasahiro Yamada core1 { 3161e6cc0aSMasahiro Yamada cpu = <&cpu1>; 3261e6cc0aSMasahiro Yamada }; 3361e6cc0aSMasahiro Yamada core2 { 3461e6cc0aSMasahiro Yamada cpu = <&cpu2>; 3561e6cc0aSMasahiro Yamada }; 3661e6cc0aSMasahiro Yamada core3 { 3761e6cc0aSMasahiro Yamada cpu = <&cpu3>; 3861e6cc0aSMasahiro Yamada }; 3961e6cc0aSMasahiro Yamada }; 4061e6cc0aSMasahiro Yamada }; 4161e6cc0aSMasahiro Yamada 4261e6cc0aSMasahiro Yamada cpu0: cpu@0 { 4361e6cc0aSMasahiro Yamada device_type = "cpu"; 4461e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 4561e6cc0aSMasahiro Yamada reg = <0 0x000>; 4631c86aa7SMasahiro Yamada clocks = <&sys_clk 33>; 4761e6cc0aSMasahiro Yamada enable-method = "psci"; 4831c86aa7SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 4961e6cc0aSMasahiro Yamada }; 5061e6cc0aSMasahiro Yamada 5161e6cc0aSMasahiro Yamada cpu1: cpu@1 { 5261e6cc0aSMasahiro Yamada device_type = "cpu"; 5361e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 5461e6cc0aSMasahiro Yamada reg = <0 0x001>; 5531c86aa7SMasahiro Yamada clocks = <&sys_clk 33>; 5661e6cc0aSMasahiro Yamada enable-method = "psci"; 5731c86aa7SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 5861e6cc0aSMasahiro Yamada }; 5961e6cc0aSMasahiro Yamada 6061e6cc0aSMasahiro Yamada cpu2: cpu@2 { 6161e6cc0aSMasahiro Yamada device_type = "cpu"; 6261e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 6361e6cc0aSMasahiro Yamada reg = <0 0x002>; 6431c86aa7SMasahiro Yamada clocks = <&sys_clk 33>; 6561e6cc0aSMasahiro Yamada enable-method = "psci"; 6631c86aa7SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 6761e6cc0aSMasahiro Yamada }; 6861e6cc0aSMasahiro Yamada 6961e6cc0aSMasahiro Yamada cpu3: cpu@3 { 7061e6cc0aSMasahiro Yamada device_type = "cpu"; 7161e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 7261e6cc0aSMasahiro Yamada reg = <0 0x003>; 7331c86aa7SMasahiro Yamada clocks = <&sys_clk 33>; 7461e6cc0aSMasahiro Yamada enable-method = "psci"; 7531c86aa7SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 7631c86aa7SMasahiro Yamada }; 7731c86aa7SMasahiro Yamada }; 7831c86aa7SMasahiro Yamada 79*b443fb42SMasahiro Yamada cluster0_opp: opp-table { 8031c86aa7SMasahiro Yamada compatible = "operating-points-v2"; 8131c86aa7SMasahiro Yamada opp-shared; 8231c86aa7SMasahiro Yamada 8331c86aa7SMasahiro Yamada opp-250000000 { 8431c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 8531c86aa7SMasahiro Yamada clock-latency-ns = <300>; 8631c86aa7SMasahiro Yamada }; 8731c86aa7SMasahiro Yamada opp-325000000 { 8831c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <325000000>; 8931c86aa7SMasahiro Yamada clock-latency-ns = <300>; 9031c86aa7SMasahiro Yamada }; 9131c86aa7SMasahiro Yamada opp-500000000 { 9231c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 9331c86aa7SMasahiro Yamada clock-latency-ns = <300>; 9431c86aa7SMasahiro Yamada }; 9531c86aa7SMasahiro Yamada opp-650000000 { 9631c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <650000000>; 9731c86aa7SMasahiro Yamada clock-latency-ns = <300>; 9831c86aa7SMasahiro Yamada }; 9931c86aa7SMasahiro Yamada opp-666667000 { 10031c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 10131c86aa7SMasahiro Yamada clock-latency-ns = <300>; 10231c86aa7SMasahiro Yamada }; 10331c86aa7SMasahiro Yamada opp-866667000 { 10431c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <866667000>; 10531c86aa7SMasahiro Yamada clock-latency-ns = <300>; 10631c86aa7SMasahiro Yamada }; 10731c86aa7SMasahiro Yamada opp-1000000000 { 10831c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 10931c86aa7SMasahiro Yamada clock-latency-ns = <300>; 11031c86aa7SMasahiro Yamada }; 11131c86aa7SMasahiro Yamada opp-1300000000 { 11231c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <1300000000>; 11331c86aa7SMasahiro Yamada clock-latency-ns = <300>; 11461e6cc0aSMasahiro Yamada }; 11561e6cc0aSMasahiro Yamada }; 11661e6cc0aSMasahiro Yamada 11761e6cc0aSMasahiro Yamada psci { 11861e6cc0aSMasahiro Yamada compatible = "arm,psci-1.0"; 11961e6cc0aSMasahiro Yamada method = "smc"; 12061e6cc0aSMasahiro Yamada }; 12161e6cc0aSMasahiro Yamada 12261e6cc0aSMasahiro Yamada clocks { 12361e6cc0aSMasahiro Yamada refclk: ref { 12461e6cc0aSMasahiro Yamada compatible = "fixed-clock"; 12561e6cc0aSMasahiro Yamada #clock-cells = <0>; 12661e6cc0aSMasahiro Yamada clock-frequency = <25000000>; 12761e6cc0aSMasahiro Yamada }; 12861e6cc0aSMasahiro Yamada }; 12961e6cc0aSMasahiro Yamada 130*b443fb42SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 131*b443fb42SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 132*b443fb42SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>; 133*b443fb42SMasahiro Yamada }; 134*b443fb42SMasahiro Yamada 13561e6cc0aSMasahiro Yamada timer { 13661e6cc0aSMasahiro Yamada compatible = "arm,armv8-timer"; 13761e6cc0aSMasahiro Yamada interrupts = <1 13 4>, 13861e6cc0aSMasahiro Yamada <1 14 4>, 13961e6cc0aSMasahiro Yamada <1 11 4>, 14061e6cc0aSMasahiro Yamada <1 10 4>; 14161e6cc0aSMasahiro Yamada }; 14261e6cc0aSMasahiro Yamada 1437ad79c12SMasahiro Yamada soc@0 { 14461e6cc0aSMasahiro Yamada compatible = "simple-bus"; 14561e6cc0aSMasahiro Yamada #address-cells = <1>; 14661e6cc0aSMasahiro Yamada #size-cells = <1>; 14761e6cc0aSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 14861e6cc0aSMasahiro Yamada 14961e6cc0aSMasahiro Yamada serial0: serial@54006800 { 15061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 15161e6cc0aSMasahiro Yamada status = "disabled"; 15261e6cc0aSMasahiro Yamada reg = <0x54006800 0x40>; 15361e6cc0aSMasahiro Yamada interrupts = <0 33 4>; 15461e6cc0aSMasahiro Yamada pinctrl-names = "default"; 15561e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 15661e6cc0aSMasahiro Yamada clocks = <&peri_clk 0>; 15761e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 158*b443fb42SMasahiro Yamada resets = <&peri_rst 0>; 15961e6cc0aSMasahiro Yamada }; 16061e6cc0aSMasahiro Yamada 16161e6cc0aSMasahiro Yamada serial1: serial@54006900 { 16261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 16361e6cc0aSMasahiro Yamada status = "disabled"; 16461e6cc0aSMasahiro Yamada reg = <0x54006900 0x40>; 16561e6cc0aSMasahiro Yamada interrupts = <0 35 4>; 16661e6cc0aSMasahiro Yamada pinctrl-names = "default"; 16761e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 16861e6cc0aSMasahiro Yamada clocks = <&peri_clk 1>; 16961e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 170*b443fb42SMasahiro Yamada resets = <&peri_rst 1>; 17161e6cc0aSMasahiro Yamada }; 17261e6cc0aSMasahiro Yamada 17361e6cc0aSMasahiro Yamada serial2: serial@54006a00 { 17461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 17561e6cc0aSMasahiro Yamada status = "disabled"; 17661e6cc0aSMasahiro Yamada reg = <0x54006a00 0x40>; 17761e6cc0aSMasahiro Yamada interrupts = <0 37 4>; 17861e6cc0aSMasahiro Yamada pinctrl-names = "default"; 17961e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 18061e6cc0aSMasahiro Yamada clocks = <&peri_clk 2>; 18161e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 182*b443fb42SMasahiro Yamada resets = <&peri_rst 2>; 18361e6cc0aSMasahiro Yamada }; 18461e6cc0aSMasahiro Yamada 18561e6cc0aSMasahiro Yamada serial3: serial@54006b00 { 18661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 18761e6cc0aSMasahiro Yamada status = "disabled"; 18861e6cc0aSMasahiro Yamada reg = <0x54006b00 0x40>; 18961e6cc0aSMasahiro Yamada interrupts = <0 177 4>; 19061e6cc0aSMasahiro Yamada pinctrl-names = "default"; 19161e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 19261e6cc0aSMasahiro Yamada clocks = <&peri_clk 3>; 19361e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 194*b443fb42SMasahiro Yamada resets = <&peri_rst 3>; 19561e6cc0aSMasahiro Yamada }; 19661e6cc0aSMasahiro Yamada 19731c86aa7SMasahiro Yamada gpio: gpio@55000000 { 1980f72b74bSMasahiro Yamada compatible = "socionext,uniphier-gpio"; 19931c86aa7SMasahiro Yamada reg = <0x55000000 0x200>; 20031c86aa7SMasahiro Yamada interrupt-parent = <&aidet>; 20131c86aa7SMasahiro Yamada interrupt-controller; 20231c86aa7SMasahiro Yamada #interrupt-cells = <2>; 20331c86aa7SMasahiro Yamada gpio-controller; 20431c86aa7SMasahiro Yamada #gpio-cells = <2>; 20531c86aa7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 20631c86aa7SMasahiro Yamada <&pinctrl 96 0 0>, 20731c86aa7SMasahiro Yamada <&pinctrl 160 0 0>; 20831c86aa7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 20931c86aa7SMasahiro Yamada "gpio_range1", 21031c86aa7SMasahiro Yamada "gpio_range2"; 2110f72b74bSMasahiro Yamada ngpios = <286>; 212*b443fb42SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 213*b443fb42SMasahiro Yamada <21 217 3>; 21431c86aa7SMasahiro Yamada }; 21531c86aa7SMasahiro Yamada 21661e6cc0aSMasahiro Yamada i2c0: i2c@58780000 { 21761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 21861e6cc0aSMasahiro Yamada status = "disabled"; 21961e6cc0aSMasahiro Yamada reg = <0x58780000 0x80>; 22061e6cc0aSMasahiro Yamada #address-cells = <1>; 22161e6cc0aSMasahiro Yamada #size-cells = <0>; 22261e6cc0aSMasahiro Yamada interrupts = <0 41 4>; 22361e6cc0aSMasahiro Yamada pinctrl-names = "default"; 22461e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 22561e6cc0aSMasahiro Yamada clocks = <&peri_clk 4>; 226*b443fb42SMasahiro Yamada resets = <&peri_rst 4>; 22761e6cc0aSMasahiro Yamada clock-frequency = <100000>; 22861e6cc0aSMasahiro Yamada }; 22961e6cc0aSMasahiro Yamada 23061e6cc0aSMasahiro Yamada i2c1: i2c@58781000 { 23161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 23261e6cc0aSMasahiro Yamada status = "disabled"; 23361e6cc0aSMasahiro Yamada reg = <0x58781000 0x80>; 23461e6cc0aSMasahiro Yamada #address-cells = <1>; 23561e6cc0aSMasahiro Yamada #size-cells = <0>; 23661e6cc0aSMasahiro Yamada interrupts = <0 42 4>; 23761e6cc0aSMasahiro Yamada pinctrl-names = "default"; 23861e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 23961e6cc0aSMasahiro Yamada clocks = <&peri_clk 5>; 240*b443fb42SMasahiro Yamada resets = <&peri_rst 5>; 24161e6cc0aSMasahiro Yamada clock-frequency = <100000>; 24261e6cc0aSMasahiro Yamada }; 24361e6cc0aSMasahiro Yamada 24461e6cc0aSMasahiro Yamada i2c2: i2c@58782000 { 24561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 24661e6cc0aSMasahiro Yamada status = "disabled"; 24761e6cc0aSMasahiro Yamada reg = <0x58782000 0x80>; 24861e6cc0aSMasahiro Yamada #address-cells = <1>; 24961e6cc0aSMasahiro Yamada #size-cells = <0>; 25061e6cc0aSMasahiro Yamada interrupts = <0 43 4>; 25131c86aa7SMasahiro Yamada pinctrl-names = "default"; 25231c86aa7SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c2>; 25361e6cc0aSMasahiro Yamada clocks = <&peri_clk 6>; 254*b443fb42SMasahiro Yamada resets = <&peri_rst 6>; 25561e6cc0aSMasahiro Yamada clock-frequency = <100000>; 25661e6cc0aSMasahiro Yamada }; 25761e6cc0aSMasahiro Yamada 25861e6cc0aSMasahiro Yamada i2c3: i2c@58783000 { 25961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 26061e6cc0aSMasahiro Yamada status = "disabled"; 26161e6cc0aSMasahiro Yamada reg = <0x58783000 0x80>; 26261e6cc0aSMasahiro Yamada #address-cells = <1>; 26361e6cc0aSMasahiro Yamada #size-cells = <0>; 26461e6cc0aSMasahiro Yamada interrupts = <0 44 4>; 26561e6cc0aSMasahiro Yamada pinctrl-names = "default"; 26661e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 26761e6cc0aSMasahiro Yamada clocks = <&peri_clk 7>; 268*b443fb42SMasahiro Yamada resets = <&peri_rst 7>; 26961e6cc0aSMasahiro Yamada clock-frequency = <100000>; 27061e6cc0aSMasahiro Yamada }; 27161e6cc0aSMasahiro Yamada 27261e6cc0aSMasahiro Yamada /* chip-internal connection for HDMI */ 27361e6cc0aSMasahiro Yamada i2c6: i2c@58786000 { 27461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 27561e6cc0aSMasahiro Yamada reg = <0x58786000 0x80>; 27661e6cc0aSMasahiro Yamada #address-cells = <1>; 27761e6cc0aSMasahiro Yamada #size-cells = <0>; 27861e6cc0aSMasahiro Yamada interrupts = <0 26 4>; 27961e6cc0aSMasahiro Yamada clocks = <&peri_clk 10>; 280*b443fb42SMasahiro Yamada resets = <&peri_rst 10>; 28161e6cc0aSMasahiro Yamada clock-frequency = <400000>; 28261e6cc0aSMasahiro Yamada }; 28361e6cc0aSMasahiro Yamada 28461e6cc0aSMasahiro Yamada system_bus: system-bus@58c00000 { 28561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 28661e6cc0aSMasahiro Yamada status = "disabled"; 28761e6cc0aSMasahiro Yamada reg = <0x58c00000 0x400>; 28861e6cc0aSMasahiro Yamada #address-cells = <2>; 28961e6cc0aSMasahiro Yamada #size-cells = <1>; 29061e6cc0aSMasahiro Yamada pinctrl-names = "default"; 29161e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 29261e6cc0aSMasahiro Yamada }; 29361e6cc0aSMasahiro Yamada 294abb6ac25SMasahiro Yamada smpctrl@59801000 { 29561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 29661e6cc0aSMasahiro Yamada reg = <0x59801000 0x400>; 29761e6cc0aSMasahiro Yamada }; 29861e6cc0aSMasahiro Yamada 29961e6cc0aSMasahiro Yamada sdctrl@59810000 { 30061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sdctrl", 30161e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 30231c86aa7SMasahiro Yamada reg = <0x59810000 0x400>; 30361e6cc0aSMasahiro Yamada 30461e6cc0aSMasahiro Yamada sd_clk: clock { 30561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-clock"; 30661e6cc0aSMasahiro Yamada #clock-cells = <1>; 30761e6cc0aSMasahiro Yamada }; 30861e6cc0aSMasahiro Yamada 30961e6cc0aSMasahiro Yamada sd_rst: reset { 31061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-reset"; 31161e6cc0aSMasahiro Yamada #reset-cells = <1>; 31261e6cc0aSMasahiro Yamada }; 31361e6cc0aSMasahiro Yamada }; 31461e6cc0aSMasahiro Yamada 31561e6cc0aSMasahiro Yamada perictrl@59820000 { 31661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-perictrl", 31761e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 31861e6cc0aSMasahiro Yamada reg = <0x59820000 0x200>; 31961e6cc0aSMasahiro Yamada 32061e6cc0aSMasahiro Yamada peri_clk: clock { 32161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-clock"; 32261e6cc0aSMasahiro Yamada #clock-cells = <1>; 32361e6cc0aSMasahiro Yamada }; 32461e6cc0aSMasahiro Yamada 32561e6cc0aSMasahiro Yamada peri_rst: reset { 32661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-reset"; 32761e6cc0aSMasahiro Yamada #reset-cells = <1>; 32861e6cc0aSMasahiro Yamada }; 32961e6cc0aSMasahiro Yamada }; 33061e6cc0aSMasahiro Yamada 33161e6cc0aSMasahiro Yamada emmc: sdhc@5a000000 { 33261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 33361e6cc0aSMasahiro Yamada reg = <0x5a000000 0x400>; 33461e6cc0aSMasahiro Yamada interrupts = <0 78 4>; 33561e6cc0aSMasahiro Yamada pinctrl-names = "default"; 33661e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_emmc_1v8>; 33761e6cc0aSMasahiro Yamada clocks = <&sys_clk 4>; 338*b443fb42SMasahiro Yamada resets = <&sys_rst 4>; 33961e6cc0aSMasahiro Yamada bus-width = <8>; 34061e6cc0aSMasahiro Yamada mmc-ddr-1_8v; 34161e6cc0aSMasahiro Yamada mmc-hs200-1_8v; 342*b443fb42SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 34331c86aa7SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 34431c86aa7SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 34531c86aa7SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 34631c86aa7SMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 34731c86aa7SMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 34861e6cc0aSMasahiro Yamada }; 34961e6cc0aSMasahiro Yamada 35061e6cc0aSMasahiro Yamada sd: sdhc@5a400000 { 35161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 35261e6cc0aSMasahiro Yamada status = "disabled"; 35361e6cc0aSMasahiro Yamada reg = <0x5a400000 0x800>; 35461e6cc0aSMasahiro Yamada interrupts = <0 76 4>; 35561e6cc0aSMasahiro Yamada pinctrl-names = "default"; 35661e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 35761e6cc0aSMasahiro Yamada clocks = <&sd_clk 0>; 35861e6cc0aSMasahiro Yamada reset-names = "host"; 35961e6cc0aSMasahiro Yamada resets = <&sd_rst 0>; 36061e6cc0aSMasahiro Yamada bus-width = <4>; 36161e6cc0aSMasahiro Yamada cap-sd-highspeed; 36261e6cc0aSMasahiro Yamada }; 36361e6cc0aSMasahiro Yamada 36461e6cc0aSMasahiro Yamada soc-glue@5f800000 { 36561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-soc-glue", 36661e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 36761e6cc0aSMasahiro Yamada reg = <0x5f800000 0x2000>; 36861e6cc0aSMasahiro Yamada 36961e6cc0aSMasahiro Yamada pinctrl: pinctrl { 37061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-pinctrl"; 37161e6cc0aSMasahiro Yamada }; 37261e6cc0aSMasahiro Yamada }; 37361e6cc0aSMasahiro Yamada 374*b443fb42SMasahiro Yamada soc-glue@5f900000 { 375*b443fb42SMasahiro Yamada compatible = "socionext,uniphier-pxs3-soc-glue-debug", 376*b443fb42SMasahiro Yamada "simple-mfd"; 377*b443fb42SMasahiro Yamada #address-cells = <1>; 378*b443fb42SMasahiro Yamada #size-cells = <1>; 379*b443fb42SMasahiro Yamada ranges = <0 0x5f900000 0x2000>; 380*b443fb42SMasahiro Yamada 381*b443fb42SMasahiro Yamada efuse@100 { 382*b443fb42SMasahiro Yamada compatible = "socionext,uniphier-efuse"; 383*b443fb42SMasahiro Yamada reg = <0x100 0x28>; 384*b443fb42SMasahiro Yamada }; 385*b443fb42SMasahiro Yamada 386*b443fb42SMasahiro Yamada efuse@200 { 387*b443fb42SMasahiro Yamada compatible = "socionext,uniphier-efuse"; 388*b443fb42SMasahiro Yamada reg = <0x200 0x68>; 389*b443fb42SMasahiro Yamada }; 390*b443fb42SMasahiro Yamada }; 391*b443fb42SMasahiro Yamada 39231c86aa7SMasahiro Yamada aidet: aidet@5fc20000 { 39331c86aa7SMasahiro Yamada compatible = "socionext,uniphier-pxs3-aidet"; 39461e6cc0aSMasahiro Yamada reg = <0x5fc20000 0x200>; 39531c86aa7SMasahiro Yamada interrupt-controller; 39631c86aa7SMasahiro Yamada #interrupt-cells = <2>; 39761e6cc0aSMasahiro Yamada }; 39861e6cc0aSMasahiro Yamada 39961e6cc0aSMasahiro Yamada gic: interrupt-controller@5fe00000 { 40061e6cc0aSMasahiro Yamada compatible = "arm,gic-v3"; 40161e6cc0aSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 40261e6cc0aSMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 40361e6cc0aSMasahiro Yamada interrupt-controller; 40461e6cc0aSMasahiro Yamada #interrupt-cells = <3>; 40561e6cc0aSMasahiro Yamada interrupts = <1 9 4>; 40661e6cc0aSMasahiro Yamada }; 40761e6cc0aSMasahiro Yamada 40861e6cc0aSMasahiro Yamada sysctrl@61840000 { 40961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sysctrl", 41061e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 41161e6cc0aSMasahiro Yamada reg = <0x61840000 0x10000>; 41261e6cc0aSMasahiro Yamada 41361e6cc0aSMasahiro Yamada sys_clk: clock { 41461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-clock"; 41561e6cc0aSMasahiro Yamada #clock-cells = <1>; 41661e6cc0aSMasahiro Yamada }; 41761e6cc0aSMasahiro Yamada 41861e6cc0aSMasahiro Yamada sys_rst: reset { 41961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-reset"; 42061e6cc0aSMasahiro Yamada #reset-cells = <1>; 42161e6cc0aSMasahiro Yamada }; 42231c86aa7SMasahiro Yamada 42331c86aa7SMasahiro Yamada watchdog { 42431c86aa7SMasahiro Yamada compatible = "socionext,uniphier-wdt"; 42531c86aa7SMasahiro Yamada }; 42631c86aa7SMasahiro Yamada }; 42731c86aa7SMasahiro Yamada 42831c86aa7SMasahiro Yamada usb0: usb@65b00000 { 42931c86aa7SMasahiro Yamada compatible = "socionext,uniphier-pxs3-dwc3"; 43031c86aa7SMasahiro Yamada status = "disabled"; 43131c86aa7SMasahiro Yamada reg = <0x65b00000 0x1000>; 43231c86aa7SMasahiro Yamada #address-cells = <1>; 43331c86aa7SMasahiro Yamada #size-cells = <1>; 43431c86aa7SMasahiro Yamada ranges; 43531c86aa7SMasahiro Yamada pinctrl-names = "default"; 43631c86aa7SMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; 43731c86aa7SMasahiro Yamada dwc3@65a00000 { 43831c86aa7SMasahiro Yamada compatible = "snps,dwc3"; 43931c86aa7SMasahiro Yamada reg = <0x65a00000 0x10000>; 44031c86aa7SMasahiro Yamada interrupts = <0 134 4>; 44131c86aa7SMasahiro Yamada dr_mode = "host"; 44231c86aa7SMasahiro Yamada tx-fifo-resize; 44331c86aa7SMasahiro Yamada }; 44431c86aa7SMasahiro Yamada }; 44531c86aa7SMasahiro Yamada 44631c86aa7SMasahiro Yamada usb1: usb@65d00000 { 44731c86aa7SMasahiro Yamada compatible = "socionext,uniphier-pxs3-dwc3"; 44831c86aa7SMasahiro Yamada status = "disabled"; 44931c86aa7SMasahiro Yamada reg = <0x65d00000 0x1000>; 45031c86aa7SMasahiro Yamada #address-cells = <1>; 45131c86aa7SMasahiro Yamada #size-cells = <1>; 45231c86aa7SMasahiro Yamada ranges; 45331c86aa7SMasahiro Yamada pinctrl-names = "default"; 45431c86aa7SMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; 45531c86aa7SMasahiro Yamada dwc3@65c00000 { 45631c86aa7SMasahiro Yamada compatible = "snps,dwc3"; 45731c86aa7SMasahiro Yamada reg = <0x65c00000 0x10000>; 45831c86aa7SMasahiro Yamada interrupts = <0 137 4>; 45931c86aa7SMasahiro Yamada dr_mode = "host"; 46031c86aa7SMasahiro Yamada tx-fifo-resize; 46131c86aa7SMasahiro Yamada }; 46261e6cc0aSMasahiro Yamada }; 46361e6cc0aSMasahiro Yamada 46461e6cc0aSMasahiro Yamada nand: nand@68000000 { 46531c86aa7SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 46661e6cc0aSMasahiro Yamada status = "disabled"; 46761e6cc0aSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 46861e6cc0aSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 46961e6cc0aSMasahiro Yamada interrupts = <0 65 4>; 47061e6cc0aSMasahiro Yamada pinctrl-names = "default"; 47161e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 47261e6cc0aSMasahiro Yamada clocks = <&sys_clk 2>; 473*b443fb42SMasahiro Yamada resets = <&sys_rst 2>; 47461e6cc0aSMasahiro Yamada }; 47561e6cc0aSMasahiro Yamada }; 47661e6cc0aSMasahiro Yamada}; 47761e6cc0aSMasahiro Yamada 47831c86aa7SMasahiro Yamada#include "uniphier-pinctrl.dtsi" 479