161e6cc0aSMasahiro Yamada/* 261e6cc0aSMasahiro Yamada * Device Tree Source for UniPhier PXs3 SoC 361e6cc0aSMasahiro Yamada * 461e6cc0aSMasahiro Yamada * Copyright (C) 2017 Socionext Inc. 561e6cc0aSMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 661e6cc0aSMasahiro Yamada * 7*abb6ac25SMasahiro Yamada * This file is dual-licensed: you can use it either under the terms 8*abb6ac25SMasahiro Yamada * of the GPL or the X11 license, at your option. Note that this dual 9*abb6ac25SMasahiro Yamada * licensing only applies to this file, and not this project as a 10*abb6ac25SMasahiro Yamada * whole. 11*abb6ac25SMasahiro Yamada * 12*abb6ac25SMasahiro Yamada * a) This file is free software; you can redistribute it and/or 13*abb6ac25SMasahiro Yamada * modify it under the terms of the GNU General Public License as 14*abb6ac25SMasahiro Yamada * published by the Free Software Foundation; either version 2 of the 15*abb6ac25SMasahiro Yamada * License, or (at your option) any later version. 16*abb6ac25SMasahiro Yamada * 17*abb6ac25SMasahiro Yamada * This file is distributed in the hope that it will be useful, 18*abb6ac25SMasahiro Yamada * but WITHOUT ANY WARRANTY; without even the implied warranty of 19*abb6ac25SMasahiro Yamada * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20*abb6ac25SMasahiro Yamada * GNU General Public License for more details. 21*abb6ac25SMasahiro Yamada * 22*abb6ac25SMasahiro Yamada * Or, alternatively, 23*abb6ac25SMasahiro Yamada * 24*abb6ac25SMasahiro Yamada * b) Permission is hereby granted, free of charge, to any person 25*abb6ac25SMasahiro Yamada * obtaining a copy of this software and associated documentation 26*abb6ac25SMasahiro Yamada * files (the "Software"), to deal in the Software without 27*abb6ac25SMasahiro Yamada * restriction, including without limitation the rights to use, 28*abb6ac25SMasahiro Yamada * copy, modify, merge, publish, distribute, sublicense, and/or 29*abb6ac25SMasahiro Yamada * sell copies of the Software, and to permit persons to whom the 30*abb6ac25SMasahiro Yamada * Software is furnished to do so, subject to the following 31*abb6ac25SMasahiro Yamada * conditions: 32*abb6ac25SMasahiro Yamada * 33*abb6ac25SMasahiro Yamada * The above copyright notice and this permission notice shall be 34*abb6ac25SMasahiro Yamada * included in all copies or substantial portions of the Software. 35*abb6ac25SMasahiro Yamada * 36*abb6ac25SMasahiro Yamada * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 37*abb6ac25SMasahiro Yamada * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 38*abb6ac25SMasahiro Yamada * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 39*abb6ac25SMasahiro Yamada * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 40*abb6ac25SMasahiro Yamada * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 41*abb6ac25SMasahiro Yamada * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 42*abb6ac25SMasahiro Yamada * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 43*abb6ac25SMasahiro Yamada * OTHER DEALINGS IN THE SOFTWARE. 4461e6cc0aSMasahiro Yamada */ 4561e6cc0aSMasahiro Yamada 4661e6cc0aSMasahiro Yamada/memreserve/ 0x80000000 0x00080000; 4761e6cc0aSMasahiro Yamada 4861e6cc0aSMasahiro Yamada/ { 4961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3"; 5061e6cc0aSMasahiro Yamada #address-cells = <2>; 5161e6cc0aSMasahiro Yamada #size-cells = <2>; 5261e6cc0aSMasahiro Yamada interrupt-parent = <&gic>; 5361e6cc0aSMasahiro Yamada 5461e6cc0aSMasahiro Yamada cpus { 5561e6cc0aSMasahiro Yamada #address-cells = <2>; 5661e6cc0aSMasahiro Yamada #size-cells = <0>; 5761e6cc0aSMasahiro Yamada 5861e6cc0aSMasahiro Yamada cpu-map { 5961e6cc0aSMasahiro Yamada cluster0 { 6061e6cc0aSMasahiro Yamada core0 { 6161e6cc0aSMasahiro Yamada cpu = <&cpu0>; 6261e6cc0aSMasahiro Yamada }; 6361e6cc0aSMasahiro Yamada core1 { 6461e6cc0aSMasahiro Yamada cpu = <&cpu1>; 6561e6cc0aSMasahiro Yamada }; 6661e6cc0aSMasahiro Yamada core2 { 6761e6cc0aSMasahiro Yamada cpu = <&cpu2>; 6861e6cc0aSMasahiro Yamada }; 6961e6cc0aSMasahiro Yamada core3 { 7061e6cc0aSMasahiro Yamada cpu = <&cpu3>; 7161e6cc0aSMasahiro Yamada }; 7261e6cc0aSMasahiro Yamada }; 7361e6cc0aSMasahiro Yamada }; 7461e6cc0aSMasahiro Yamada 7561e6cc0aSMasahiro Yamada cpu0: cpu@0 { 7661e6cc0aSMasahiro Yamada device_type = "cpu"; 7761e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 7861e6cc0aSMasahiro Yamada reg = <0 0x000>; 7961e6cc0aSMasahiro Yamada enable-method = "psci"; 8061e6cc0aSMasahiro Yamada }; 8161e6cc0aSMasahiro Yamada 8261e6cc0aSMasahiro Yamada cpu1: cpu@1 { 8361e6cc0aSMasahiro Yamada device_type = "cpu"; 8461e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 8561e6cc0aSMasahiro Yamada reg = <0 0x001>; 8661e6cc0aSMasahiro Yamada enable-method = "psci"; 8761e6cc0aSMasahiro Yamada }; 8861e6cc0aSMasahiro Yamada 8961e6cc0aSMasahiro Yamada cpu2: cpu@2 { 9061e6cc0aSMasahiro Yamada device_type = "cpu"; 9161e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 9261e6cc0aSMasahiro Yamada reg = <0 0x002>; 9361e6cc0aSMasahiro Yamada enable-method = "psci"; 9461e6cc0aSMasahiro Yamada }; 9561e6cc0aSMasahiro Yamada 9661e6cc0aSMasahiro Yamada cpu3: cpu@3 { 9761e6cc0aSMasahiro Yamada device_type = "cpu"; 9861e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 9961e6cc0aSMasahiro Yamada reg = <0 0x003>; 10061e6cc0aSMasahiro Yamada enable-method = "psci"; 10161e6cc0aSMasahiro Yamada }; 10261e6cc0aSMasahiro Yamada }; 10361e6cc0aSMasahiro Yamada 10461e6cc0aSMasahiro Yamada psci { 10561e6cc0aSMasahiro Yamada compatible = "arm,psci-1.0"; 10661e6cc0aSMasahiro Yamada method = "smc"; 10761e6cc0aSMasahiro Yamada }; 10861e6cc0aSMasahiro Yamada 10961e6cc0aSMasahiro Yamada clocks { 11061e6cc0aSMasahiro Yamada refclk: ref { 11161e6cc0aSMasahiro Yamada compatible = "fixed-clock"; 11261e6cc0aSMasahiro Yamada #clock-cells = <0>; 11361e6cc0aSMasahiro Yamada clock-frequency = <25000000>; 11461e6cc0aSMasahiro Yamada }; 11561e6cc0aSMasahiro Yamada }; 11661e6cc0aSMasahiro Yamada 11761e6cc0aSMasahiro Yamada timer { 11861e6cc0aSMasahiro Yamada compatible = "arm,armv8-timer"; 11961e6cc0aSMasahiro Yamada interrupts = <1 13 4>, 12061e6cc0aSMasahiro Yamada <1 14 4>, 12161e6cc0aSMasahiro Yamada <1 11 4>, 12261e6cc0aSMasahiro Yamada <1 10 4>; 12361e6cc0aSMasahiro Yamada }; 12461e6cc0aSMasahiro Yamada 1257ad79c12SMasahiro Yamada soc@0 { 12661e6cc0aSMasahiro Yamada compatible = "simple-bus"; 12761e6cc0aSMasahiro Yamada #address-cells = <1>; 12861e6cc0aSMasahiro Yamada #size-cells = <1>; 12961e6cc0aSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 13061e6cc0aSMasahiro Yamada 13161e6cc0aSMasahiro Yamada serial0: serial@54006800 { 13261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 13361e6cc0aSMasahiro Yamada status = "disabled"; 13461e6cc0aSMasahiro Yamada reg = <0x54006800 0x40>; 13561e6cc0aSMasahiro Yamada interrupts = <0 33 4>; 13661e6cc0aSMasahiro Yamada pinctrl-names = "default"; 13761e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 13861e6cc0aSMasahiro Yamada clocks = <&peri_clk 0>; 13961e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 14061e6cc0aSMasahiro Yamada }; 14161e6cc0aSMasahiro Yamada 14261e6cc0aSMasahiro Yamada serial1: serial@54006900 { 14361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 14461e6cc0aSMasahiro Yamada status = "disabled"; 14561e6cc0aSMasahiro Yamada reg = <0x54006900 0x40>; 14661e6cc0aSMasahiro Yamada interrupts = <0 35 4>; 14761e6cc0aSMasahiro Yamada pinctrl-names = "default"; 14861e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 14961e6cc0aSMasahiro Yamada clocks = <&peri_clk 1>; 15061e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 15161e6cc0aSMasahiro Yamada }; 15261e6cc0aSMasahiro Yamada 15361e6cc0aSMasahiro Yamada serial2: serial@54006a00 { 15461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 15561e6cc0aSMasahiro Yamada status = "disabled"; 15661e6cc0aSMasahiro Yamada reg = <0x54006a00 0x40>; 15761e6cc0aSMasahiro Yamada interrupts = <0 37 4>; 15861e6cc0aSMasahiro Yamada pinctrl-names = "default"; 15961e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 16061e6cc0aSMasahiro Yamada clocks = <&peri_clk 2>; 16161e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 16261e6cc0aSMasahiro Yamada }; 16361e6cc0aSMasahiro Yamada 16461e6cc0aSMasahiro Yamada serial3: serial@54006b00 { 16561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 16661e6cc0aSMasahiro Yamada status = "disabled"; 16761e6cc0aSMasahiro Yamada reg = <0x54006b00 0x40>; 16861e6cc0aSMasahiro Yamada interrupts = <0 177 4>; 16961e6cc0aSMasahiro Yamada pinctrl-names = "default"; 17061e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 17161e6cc0aSMasahiro Yamada clocks = <&peri_clk 3>; 17261e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 17361e6cc0aSMasahiro Yamada }; 17461e6cc0aSMasahiro Yamada 17561e6cc0aSMasahiro Yamada i2c0: i2c@58780000 { 17661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 17761e6cc0aSMasahiro Yamada status = "disabled"; 17861e6cc0aSMasahiro Yamada reg = <0x58780000 0x80>; 17961e6cc0aSMasahiro Yamada #address-cells = <1>; 18061e6cc0aSMasahiro Yamada #size-cells = <0>; 18161e6cc0aSMasahiro Yamada interrupts = <0 41 4>; 18261e6cc0aSMasahiro Yamada pinctrl-names = "default"; 18361e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 18461e6cc0aSMasahiro Yamada clocks = <&peri_clk 4>; 18561e6cc0aSMasahiro Yamada clock-frequency = <100000>; 18661e6cc0aSMasahiro Yamada }; 18761e6cc0aSMasahiro Yamada 18861e6cc0aSMasahiro Yamada i2c1: i2c@58781000 { 18961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 19061e6cc0aSMasahiro Yamada status = "disabled"; 19161e6cc0aSMasahiro Yamada reg = <0x58781000 0x80>; 19261e6cc0aSMasahiro Yamada #address-cells = <1>; 19361e6cc0aSMasahiro Yamada #size-cells = <0>; 19461e6cc0aSMasahiro Yamada interrupts = <0 42 4>; 19561e6cc0aSMasahiro Yamada pinctrl-names = "default"; 19661e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 19761e6cc0aSMasahiro Yamada clocks = <&peri_clk 5>; 19861e6cc0aSMasahiro Yamada clock-frequency = <100000>; 19961e6cc0aSMasahiro Yamada }; 20061e6cc0aSMasahiro Yamada 20161e6cc0aSMasahiro Yamada i2c2: i2c@58782000 { 20261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 20361e6cc0aSMasahiro Yamada status = "disabled"; 20461e6cc0aSMasahiro Yamada reg = <0x58782000 0x80>; 20561e6cc0aSMasahiro Yamada #address-cells = <1>; 20661e6cc0aSMasahiro Yamada #size-cells = <0>; 20761e6cc0aSMasahiro Yamada interrupts = <0 43 4>; 20861e6cc0aSMasahiro Yamada clocks = <&peri_clk 6>; 20961e6cc0aSMasahiro Yamada clock-frequency = <100000>; 21061e6cc0aSMasahiro Yamada }; 21161e6cc0aSMasahiro Yamada 21261e6cc0aSMasahiro Yamada i2c3: i2c@58783000 { 21361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 21461e6cc0aSMasahiro Yamada status = "disabled"; 21561e6cc0aSMasahiro Yamada reg = <0x58783000 0x80>; 21661e6cc0aSMasahiro Yamada #address-cells = <1>; 21761e6cc0aSMasahiro Yamada #size-cells = <0>; 21861e6cc0aSMasahiro Yamada interrupts = <0 44 4>; 21961e6cc0aSMasahiro Yamada pinctrl-names = "default"; 22061e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 22161e6cc0aSMasahiro Yamada clocks = <&peri_clk 7>; 22261e6cc0aSMasahiro Yamada clock-frequency = <100000>; 22361e6cc0aSMasahiro Yamada }; 22461e6cc0aSMasahiro Yamada 22561e6cc0aSMasahiro Yamada /* chip-internal connection for HDMI */ 22661e6cc0aSMasahiro Yamada i2c6: i2c@58786000 { 22761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 22861e6cc0aSMasahiro Yamada reg = <0x58786000 0x80>; 22961e6cc0aSMasahiro Yamada #address-cells = <1>; 23061e6cc0aSMasahiro Yamada #size-cells = <0>; 23161e6cc0aSMasahiro Yamada interrupts = <0 26 4>; 23261e6cc0aSMasahiro Yamada clocks = <&peri_clk 10>; 23361e6cc0aSMasahiro Yamada clock-frequency = <400000>; 23461e6cc0aSMasahiro Yamada }; 23561e6cc0aSMasahiro Yamada 23661e6cc0aSMasahiro Yamada system_bus: system-bus@58c00000 { 23761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 23861e6cc0aSMasahiro Yamada status = "disabled"; 23961e6cc0aSMasahiro Yamada reg = <0x58c00000 0x400>; 24061e6cc0aSMasahiro Yamada #address-cells = <2>; 24161e6cc0aSMasahiro Yamada #size-cells = <1>; 24261e6cc0aSMasahiro Yamada pinctrl-names = "default"; 24361e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 24461e6cc0aSMasahiro Yamada }; 24561e6cc0aSMasahiro Yamada 246*abb6ac25SMasahiro Yamada smpctrl@59801000 { 24761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 24861e6cc0aSMasahiro Yamada reg = <0x59801000 0x400>; 24961e6cc0aSMasahiro Yamada }; 25061e6cc0aSMasahiro Yamada 25161e6cc0aSMasahiro Yamada sdctrl@59810000 { 25261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sdctrl", 25361e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 25461e6cc0aSMasahiro Yamada reg = <0x59810000 0x800>; 25561e6cc0aSMasahiro Yamada 25661e6cc0aSMasahiro Yamada sd_clk: clock { 25761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-clock"; 25861e6cc0aSMasahiro Yamada #clock-cells = <1>; 25961e6cc0aSMasahiro Yamada }; 26061e6cc0aSMasahiro Yamada 26161e6cc0aSMasahiro Yamada sd_rst: reset { 26261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-reset"; 26361e6cc0aSMasahiro Yamada #reset-cells = <1>; 26461e6cc0aSMasahiro Yamada }; 26561e6cc0aSMasahiro Yamada }; 26661e6cc0aSMasahiro Yamada 26761e6cc0aSMasahiro Yamada perictrl@59820000 { 26861e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-perictrl", 26961e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 27061e6cc0aSMasahiro Yamada reg = <0x59820000 0x200>; 27161e6cc0aSMasahiro Yamada 27261e6cc0aSMasahiro Yamada peri_clk: clock { 27361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-clock"; 27461e6cc0aSMasahiro Yamada #clock-cells = <1>; 27561e6cc0aSMasahiro Yamada }; 27661e6cc0aSMasahiro Yamada 27761e6cc0aSMasahiro Yamada peri_rst: reset { 27861e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-reset"; 27961e6cc0aSMasahiro Yamada #reset-cells = <1>; 28061e6cc0aSMasahiro Yamada }; 28161e6cc0aSMasahiro Yamada }; 28261e6cc0aSMasahiro Yamada 28361e6cc0aSMasahiro Yamada emmc: sdhc@5a000000 { 28461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 28561e6cc0aSMasahiro Yamada status = "disabled"; 28661e6cc0aSMasahiro Yamada reg = <0x5a000000 0x400>; 28761e6cc0aSMasahiro Yamada interrupts = <0 78 4>; 28861e6cc0aSMasahiro Yamada pinctrl-names = "default"; 28961e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_emmc_1v8>; 29061e6cc0aSMasahiro Yamada clocks = <&sys_clk 4>; 29161e6cc0aSMasahiro Yamada bus-width = <8>; 29261e6cc0aSMasahiro Yamada mmc-ddr-1_8v; 29361e6cc0aSMasahiro Yamada mmc-hs200-1_8v; 29461e6cc0aSMasahiro Yamada }; 29561e6cc0aSMasahiro Yamada 29661e6cc0aSMasahiro Yamada sd: sdhc@5a400000 { 29761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 29861e6cc0aSMasahiro Yamada status = "disabled"; 29961e6cc0aSMasahiro Yamada reg = <0x5a400000 0x800>; 30061e6cc0aSMasahiro Yamada interrupts = <0 76 4>; 30161e6cc0aSMasahiro Yamada pinctrl-names = "default"; 30261e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 30361e6cc0aSMasahiro Yamada clocks = <&sd_clk 0>; 30461e6cc0aSMasahiro Yamada reset-names = "host"; 30561e6cc0aSMasahiro Yamada resets = <&sd_rst 0>; 30661e6cc0aSMasahiro Yamada bus-width = <4>; 30761e6cc0aSMasahiro Yamada cap-sd-highspeed; 30861e6cc0aSMasahiro Yamada }; 30961e6cc0aSMasahiro Yamada 31061e6cc0aSMasahiro Yamada soc-glue@5f800000 { 31161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-soc-glue", 31261e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 31361e6cc0aSMasahiro Yamada reg = <0x5f800000 0x2000>; 31461e6cc0aSMasahiro Yamada 31561e6cc0aSMasahiro Yamada pinctrl: pinctrl { 31661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-pinctrl"; 31761e6cc0aSMasahiro Yamada }; 31861e6cc0aSMasahiro Yamada }; 31961e6cc0aSMasahiro Yamada 32061e6cc0aSMasahiro Yamada aidet@5fc20000 { 32161e6cc0aSMasahiro Yamada compatible = "simple-mfd", "syscon"; 32261e6cc0aSMasahiro Yamada reg = <0x5fc20000 0x200>; 32361e6cc0aSMasahiro Yamada }; 32461e6cc0aSMasahiro Yamada 32561e6cc0aSMasahiro Yamada gic: interrupt-controller@5fe00000 { 32661e6cc0aSMasahiro Yamada compatible = "arm,gic-v3"; 32761e6cc0aSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 32861e6cc0aSMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 32961e6cc0aSMasahiro Yamada interrupt-controller; 33061e6cc0aSMasahiro Yamada #interrupt-cells = <3>; 33161e6cc0aSMasahiro Yamada interrupts = <1 9 4>; 33261e6cc0aSMasahiro Yamada }; 33361e6cc0aSMasahiro Yamada 33461e6cc0aSMasahiro Yamada sysctrl@61840000 { 33561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sysctrl", 33661e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 33761e6cc0aSMasahiro Yamada reg = <0x61840000 0x10000>; 33861e6cc0aSMasahiro Yamada 33961e6cc0aSMasahiro Yamada sys_clk: clock { 34061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-clock"; 34161e6cc0aSMasahiro Yamada #clock-cells = <1>; 34261e6cc0aSMasahiro Yamada }; 34361e6cc0aSMasahiro Yamada 34461e6cc0aSMasahiro Yamada sys_rst: reset { 34561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-reset"; 34661e6cc0aSMasahiro Yamada #reset-cells = <1>; 34761e6cc0aSMasahiro Yamada }; 34861e6cc0aSMasahiro Yamada }; 34961e6cc0aSMasahiro Yamada 35061e6cc0aSMasahiro Yamada nand: nand@68000000 { 35161e6cc0aSMasahiro Yamada compatible = "socionext,denali-nand-v5b"; 35261e6cc0aSMasahiro Yamada status = "disabled"; 35361e6cc0aSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 35461e6cc0aSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 35561e6cc0aSMasahiro Yamada interrupts = <0 65 4>; 35661e6cc0aSMasahiro Yamada pinctrl-names = "default"; 35761e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 35861e6cc0aSMasahiro Yamada clocks = <&sys_clk 2>; 35961e6cc0aSMasahiro Yamada nand-ecc-strength = <8>; 36061e6cc0aSMasahiro Yamada }; 36161e6cc0aSMasahiro Yamada }; 36261e6cc0aSMasahiro Yamada}; 36361e6cc0aSMasahiro Yamada 36461e6cc0aSMasahiro Yamada/include/ "uniphier-pinctrl.dtsi" 365