161e6cc0aSMasahiro Yamada/* 261e6cc0aSMasahiro Yamada * Device Tree Source for UniPhier PXs3 SoC 361e6cc0aSMasahiro Yamada * 461e6cc0aSMasahiro Yamada * Copyright (C) 2017 Socionext Inc. 561e6cc0aSMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 661e6cc0aSMasahiro Yamada * 761e6cc0aSMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ X11 861e6cc0aSMasahiro Yamada */ 961e6cc0aSMasahiro Yamada 1061e6cc0aSMasahiro Yamada/memreserve/ 0x80000000 0x00080000; 1161e6cc0aSMasahiro Yamada 1261e6cc0aSMasahiro Yamada/ { 1361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3"; 1461e6cc0aSMasahiro Yamada #address-cells = <2>; 1561e6cc0aSMasahiro Yamada #size-cells = <2>; 1661e6cc0aSMasahiro Yamada interrupt-parent = <&gic>; 1761e6cc0aSMasahiro Yamada 1861e6cc0aSMasahiro Yamada cpus { 1961e6cc0aSMasahiro Yamada #address-cells = <2>; 2061e6cc0aSMasahiro Yamada #size-cells = <0>; 2161e6cc0aSMasahiro Yamada 2261e6cc0aSMasahiro Yamada cpu-map { 2361e6cc0aSMasahiro Yamada cluster0 { 2461e6cc0aSMasahiro Yamada core0 { 2561e6cc0aSMasahiro Yamada cpu = <&cpu0>; 2661e6cc0aSMasahiro Yamada }; 2761e6cc0aSMasahiro Yamada core1 { 2861e6cc0aSMasahiro Yamada cpu = <&cpu1>; 2961e6cc0aSMasahiro Yamada }; 3061e6cc0aSMasahiro Yamada core2 { 3161e6cc0aSMasahiro Yamada cpu = <&cpu2>; 3261e6cc0aSMasahiro Yamada }; 3361e6cc0aSMasahiro Yamada core3 { 3461e6cc0aSMasahiro Yamada cpu = <&cpu3>; 3561e6cc0aSMasahiro Yamada }; 3661e6cc0aSMasahiro Yamada }; 3761e6cc0aSMasahiro Yamada }; 3861e6cc0aSMasahiro Yamada 3961e6cc0aSMasahiro Yamada cpu0: cpu@0 { 4061e6cc0aSMasahiro Yamada device_type = "cpu"; 4161e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 4261e6cc0aSMasahiro Yamada reg = <0 0x000>; 4361e6cc0aSMasahiro Yamada enable-method = "psci"; 4461e6cc0aSMasahiro Yamada }; 4561e6cc0aSMasahiro Yamada 4661e6cc0aSMasahiro Yamada cpu1: cpu@1 { 4761e6cc0aSMasahiro Yamada device_type = "cpu"; 4861e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 4961e6cc0aSMasahiro Yamada reg = <0 0x001>; 5061e6cc0aSMasahiro Yamada enable-method = "psci"; 5161e6cc0aSMasahiro Yamada }; 5261e6cc0aSMasahiro Yamada 5361e6cc0aSMasahiro Yamada cpu2: cpu@2 { 5461e6cc0aSMasahiro Yamada device_type = "cpu"; 5561e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 5661e6cc0aSMasahiro Yamada reg = <0 0x002>; 5761e6cc0aSMasahiro Yamada enable-method = "psci"; 5861e6cc0aSMasahiro Yamada }; 5961e6cc0aSMasahiro Yamada 6061e6cc0aSMasahiro Yamada cpu3: cpu@3 { 6161e6cc0aSMasahiro Yamada device_type = "cpu"; 6261e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 6361e6cc0aSMasahiro Yamada reg = <0 0x003>; 6461e6cc0aSMasahiro Yamada enable-method = "psci"; 6561e6cc0aSMasahiro Yamada }; 6661e6cc0aSMasahiro Yamada }; 6761e6cc0aSMasahiro Yamada 6861e6cc0aSMasahiro Yamada psci { 6961e6cc0aSMasahiro Yamada compatible = "arm,psci-1.0"; 7061e6cc0aSMasahiro Yamada method = "smc"; 7161e6cc0aSMasahiro Yamada }; 7261e6cc0aSMasahiro Yamada 7361e6cc0aSMasahiro Yamada clocks { 7461e6cc0aSMasahiro Yamada refclk: ref { 7561e6cc0aSMasahiro Yamada compatible = "fixed-clock"; 7661e6cc0aSMasahiro Yamada #clock-cells = <0>; 7761e6cc0aSMasahiro Yamada clock-frequency = <25000000>; 7861e6cc0aSMasahiro Yamada }; 7961e6cc0aSMasahiro Yamada }; 8061e6cc0aSMasahiro Yamada 8161e6cc0aSMasahiro Yamada timer { 8261e6cc0aSMasahiro Yamada compatible = "arm,armv8-timer"; 8361e6cc0aSMasahiro Yamada interrupts = <1 13 4>, 8461e6cc0aSMasahiro Yamada <1 14 4>, 8561e6cc0aSMasahiro Yamada <1 11 4>, 8661e6cc0aSMasahiro Yamada <1 10 4>; 8761e6cc0aSMasahiro Yamada }; 8861e6cc0aSMasahiro Yamada 89*7ad79c12SMasahiro Yamada soc@0 { 9061e6cc0aSMasahiro Yamada compatible = "simple-bus"; 9161e6cc0aSMasahiro Yamada #address-cells = <1>; 9261e6cc0aSMasahiro Yamada #size-cells = <1>; 9361e6cc0aSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 9461e6cc0aSMasahiro Yamada 9561e6cc0aSMasahiro Yamada serial0: serial@54006800 { 9661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 9761e6cc0aSMasahiro Yamada status = "disabled"; 9861e6cc0aSMasahiro Yamada reg = <0x54006800 0x40>; 9961e6cc0aSMasahiro Yamada interrupts = <0 33 4>; 10061e6cc0aSMasahiro Yamada pinctrl-names = "default"; 10161e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 10261e6cc0aSMasahiro Yamada clocks = <&peri_clk 0>; 10361e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 10461e6cc0aSMasahiro Yamada }; 10561e6cc0aSMasahiro Yamada 10661e6cc0aSMasahiro Yamada serial1: serial@54006900 { 10761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 10861e6cc0aSMasahiro Yamada status = "disabled"; 10961e6cc0aSMasahiro Yamada reg = <0x54006900 0x40>; 11061e6cc0aSMasahiro Yamada interrupts = <0 35 4>; 11161e6cc0aSMasahiro Yamada pinctrl-names = "default"; 11261e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 11361e6cc0aSMasahiro Yamada clocks = <&peri_clk 1>; 11461e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 11561e6cc0aSMasahiro Yamada }; 11661e6cc0aSMasahiro Yamada 11761e6cc0aSMasahiro Yamada serial2: serial@54006a00 { 11861e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 11961e6cc0aSMasahiro Yamada status = "disabled"; 12061e6cc0aSMasahiro Yamada reg = <0x54006a00 0x40>; 12161e6cc0aSMasahiro Yamada interrupts = <0 37 4>; 12261e6cc0aSMasahiro Yamada pinctrl-names = "default"; 12361e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 12461e6cc0aSMasahiro Yamada clocks = <&peri_clk 2>; 12561e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 12661e6cc0aSMasahiro Yamada }; 12761e6cc0aSMasahiro Yamada 12861e6cc0aSMasahiro Yamada serial3: serial@54006b00 { 12961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 13061e6cc0aSMasahiro Yamada status = "disabled"; 13161e6cc0aSMasahiro Yamada reg = <0x54006b00 0x40>; 13261e6cc0aSMasahiro Yamada interrupts = <0 177 4>; 13361e6cc0aSMasahiro Yamada pinctrl-names = "default"; 13461e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 13561e6cc0aSMasahiro Yamada clocks = <&peri_clk 3>; 13661e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 13761e6cc0aSMasahiro Yamada }; 13861e6cc0aSMasahiro Yamada 13961e6cc0aSMasahiro Yamada i2c0: i2c@58780000 { 14061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 14161e6cc0aSMasahiro Yamada status = "disabled"; 14261e6cc0aSMasahiro Yamada reg = <0x58780000 0x80>; 14361e6cc0aSMasahiro Yamada #address-cells = <1>; 14461e6cc0aSMasahiro Yamada #size-cells = <0>; 14561e6cc0aSMasahiro Yamada interrupts = <0 41 4>; 14661e6cc0aSMasahiro Yamada pinctrl-names = "default"; 14761e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 14861e6cc0aSMasahiro Yamada clocks = <&peri_clk 4>; 14961e6cc0aSMasahiro Yamada clock-frequency = <100000>; 15061e6cc0aSMasahiro Yamada }; 15161e6cc0aSMasahiro Yamada 15261e6cc0aSMasahiro Yamada i2c1: i2c@58781000 { 15361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 15461e6cc0aSMasahiro Yamada status = "disabled"; 15561e6cc0aSMasahiro Yamada reg = <0x58781000 0x80>; 15661e6cc0aSMasahiro Yamada #address-cells = <1>; 15761e6cc0aSMasahiro Yamada #size-cells = <0>; 15861e6cc0aSMasahiro Yamada interrupts = <0 42 4>; 15961e6cc0aSMasahiro Yamada pinctrl-names = "default"; 16061e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 16161e6cc0aSMasahiro Yamada clocks = <&peri_clk 5>; 16261e6cc0aSMasahiro Yamada clock-frequency = <100000>; 16361e6cc0aSMasahiro Yamada }; 16461e6cc0aSMasahiro Yamada 16561e6cc0aSMasahiro Yamada i2c2: i2c@58782000 { 16661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 16761e6cc0aSMasahiro Yamada status = "disabled"; 16861e6cc0aSMasahiro Yamada reg = <0x58782000 0x80>; 16961e6cc0aSMasahiro Yamada #address-cells = <1>; 17061e6cc0aSMasahiro Yamada #size-cells = <0>; 17161e6cc0aSMasahiro Yamada interrupts = <0 43 4>; 17261e6cc0aSMasahiro Yamada clocks = <&peri_clk 6>; 17361e6cc0aSMasahiro Yamada clock-frequency = <100000>; 17461e6cc0aSMasahiro Yamada }; 17561e6cc0aSMasahiro Yamada 17661e6cc0aSMasahiro Yamada i2c3: i2c@58783000 { 17761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 17861e6cc0aSMasahiro Yamada status = "disabled"; 17961e6cc0aSMasahiro Yamada reg = <0x58783000 0x80>; 18061e6cc0aSMasahiro Yamada #address-cells = <1>; 18161e6cc0aSMasahiro Yamada #size-cells = <0>; 18261e6cc0aSMasahiro Yamada interrupts = <0 44 4>; 18361e6cc0aSMasahiro Yamada pinctrl-names = "default"; 18461e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 18561e6cc0aSMasahiro Yamada clocks = <&peri_clk 7>; 18661e6cc0aSMasahiro Yamada clock-frequency = <100000>; 18761e6cc0aSMasahiro Yamada }; 18861e6cc0aSMasahiro Yamada 18961e6cc0aSMasahiro Yamada /* chip-internal connection for HDMI */ 19061e6cc0aSMasahiro Yamada i2c6: i2c@58786000 { 19161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 19261e6cc0aSMasahiro Yamada reg = <0x58786000 0x80>; 19361e6cc0aSMasahiro Yamada #address-cells = <1>; 19461e6cc0aSMasahiro Yamada #size-cells = <0>; 19561e6cc0aSMasahiro Yamada interrupts = <0 26 4>; 19661e6cc0aSMasahiro Yamada clocks = <&peri_clk 10>; 19761e6cc0aSMasahiro Yamada clock-frequency = <400000>; 19861e6cc0aSMasahiro Yamada }; 19961e6cc0aSMasahiro Yamada 20061e6cc0aSMasahiro Yamada system_bus: system-bus@58c00000 { 20161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 20261e6cc0aSMasahiro Yamada status = "disabled"; 20361e6cc0aSMasahiro Yamada reg = <0x58c00000 0x400>; 20461e6cc0aSMasahiro Yamada #address-cells = <2>; 20561e6cc0aSMasahiro Yamada #size-cells = <1>; 20661e6cc0aSMasahiro Yamada pinctrl-names = "default"; 20761e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 20861e6cc0aSMasahiro Yamada }; 20961e6cc0aSMasahiro Yamada 21061e6cc0aSMasahiro Yamada smpctrl@59800000 { 21161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 21261e6cc0aSMasahiro Yamada reg = <0x59801000 0x400>; 21361e6cc0aSMasahiro Yamada }; 21461e6cc0aSMasahiro Yamada 21561e6cc0aSMasahiro Yamada sdctrl@59810000 { 21661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sdctrl", 21761e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 21861e6cc0aSMasahiro Yamada reg = <0x59810000 0x800>; 21961e6cc0aSMasahiro Yamada 22061e6cc0aSMasahiro Yamada sd_clk: clock { 22161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-clock"; 22261e6cc0aSMasahiro Yamada #clock-cells = <1>; 22361e6cc0aSMasahiro Yamada }; 22461e6cc0aSMasahiro Yamada 22561e6cc0aSMasahiro Yamada sd_rst: reset { 22661e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-reset"; 22761e6cc0aSMasahiro Yamada #reset-cells = <1>; 22861e6cc0aSMasahiro Yamada }; 22961e6cc0aSMasahiro Yamada }; 23061e6cc0aSMasahiro Yamada 23161e6cc0aSMasahiro Yamada perictrl@59820000 { 23261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-perictrl", 23361e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 23461e6cc0aSMasahiro Yamada reg = <0x59820000 0x200>; 23561e6cc0aSMasahiro Yamada 23661e6cc0aSMasahiro Yamada peri_clk: clock { 23761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-clock"; 23861e6cc0aSMasahiro Yamada #clock-cells = <1>; 23961e6cc0aSMasahiro Yamada }; 24061e6cc0aSMasahiro Yamada 24161e6cc0aSMasahiro Yamada peri_rst: reset { 24261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-reset"; 24361e6cc0aSMasahiro Yamada #reset-cells = <1>; 24461e6cc0aSMasahiro Yamada }; 24561e6cc0aSMasahiro Yamada }; 24661e6cc0aSMasahiro Yamada 24761e6cc0aSMasahiro Yamada emmc: sdhc@5a000000 { 24861e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 24961e6cc0aSMasahiro Yamada status = "disabled"; 25061e6cc0aSMasahiro Yamada reg = <0x5a000000 0x400>; 25161e6cc0aSMasahiro Yamada interrupts = <0 78 4>; 25261e6cc0aSMasahiro Yamada pinctrl-names = "default"; 25361e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_emmc_1v8>; 25461e6cc0aSMasahiro Yamada clocks = <&sys_clk 4>; 25561e6cc0aSMasahiro Yamada bus-width = <8>; 25661e6cc0aSMasahiro Yamada mmc-ddr-1_8v; 25761e6cc0aSMasahiro Yamada mmc-hs200-1_8v; 25861e6cc0aSMasahiro Yamada }; 25961e6cc0aSMasahiro Yamada 26061e6cc0aSMasahiro Yamada sd: sdhc@5a400000 { 26161e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 26261e6cc0aSMasahiro Yamada status = "disabled"; 26361e6cc0aSMasahiro Yamada reg = <0x5a400000 0x800>; 26461e6cc0aSMasahiro Yamada interrupts = <0 76 4>; 26561e6cc0aSMasahiro Yamada pinctrl-names = "default"; 26661e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 26761e6cc0aSMasahiro Yamada clocks = <&sd_clk 0>; 26861e6cc0aSMasahiro Yamada reset-names = "host"; 26961e6cc0aSMasahiro Yamada resets = <&sd_rst 0>; 27061e6cc0aSMasahiro Yamada bus-width = <4>; 27161e6cc0aSMasahiro Yamada cap-sd-highspeed; 27261e6cc0aSMasahiro Yamada }; 27361e6cc0aSMasahiro Yamada 27461e6cc0aSMasahiro Yamada soc-glue@5f800000 { 27561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-soc-glue", 27661e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 27761e6cc0aSMasahiro Yamada reg = <0x5f800000 0x2000>; 27861e6cc0aSMasahiro Yamada 27961e6cc0aSMasahiro Yamada pinctrl: pinctrl { 28061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-pinctrl"; 28161e6cc0aSMasahiro Yamada }; 28261e6cc0aSMasahiro Yamada }; 28361e6cc0aSMasahiro Yamada 28461e6cc0aSMasahiro Yamada aidet@5fc20000 { 28561e6cc0aSMasahiro Yamada compatible = "simple-mfd", "syscon"; 28661e6cc0aSMasahiro Yamada reg = <0x5fc20000 0x200>; 28761e6cc0aSMasahiro Yamada }; 28861e6cc0aSMasahiro Yamada 28961e6cc0aSMasahiro Yamada gic: interrupt-controller@5fe00000 { 29061e6cc0aSMasahiro Yamada compatible = "arm,gic-v3"; 29161e6cc0aSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 29261e6cc0aSMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 29361e6cc0aSMasahiro Yamada interrupt-controller; 29461e6cc0aSMasahiro Yamada #interrupt-cells = <3>; 29561e6cc0aSMasahiro Yamada interrupts = <1 9 4>; 29661e6cc0aSMasahiro Yamada }; 29761e6cc0aSMasahiro Yamada 29861e6cc0aSMasahiro Yamada sysctrl@61840000 { 29961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sysctrl", 30061e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 30161e6cc0aSMasahiro Yamada reg = <0x61840000 0x10000>; 30261e6cc0aSMasahiro Yamada 30361e6cc0aSMasahiro Yamada sys_clk: clock { 30461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-clock"; 30561e6cc0aSMasahiro Yamada #clock-cells = <1>; 30661e6cc0aSMasahiro Yamada }; 30761e6cc0aSMasahiro Yamada 30861e6cc0aSMasahiro Yamada sys_rst: reset { 30961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-reset"; 31061e6cc0aSMasahiro Yamada #reset-cells = <1>; 31161e6cc0aSMasahiro Yamada }; 31261e6cc0aSMasahiro Yamada }; 31361e6cc0aSMasahiro Yamada 31461e6cc0aSMasahiro Yamada nand: nand@68000000 { 31561e6cc0aSMasahiro Yamada compatible = "socionext,denali-nand-v5b"; 31661e6cc0aSMasahiro Yamada status = "disabled"; 31761e6cc0aSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 31861e6cc0aSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 31961e6cc0aSMasahiro Yamada interrupts = <0 65 4>; 32061e6cc0aSMasahiro Yamada pinctrl-names = "default"; 32161e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 32261e6cc0aSMasahiro Yamada clocks = <&sys_clk 2>; 32361e6cc0aSMasahiro Yamada nand-ecc-strength = <8>; 32461e6cc0aSMasahiro Yamada }; 32561e6cc0aSMasahiro Yamada }; 32661e6cc0aSMasahiro Yamada}; 32761e6cc0aSMasahiro Yamada 32861e6cc0aSMasahiro Yamada/include/ "uniphier-pinctrl.dtsi" 329