13e98fc12SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 23e98fc12SMasahiro Yamada// 33e98fc12SMasahiro Yamada// Device Tree Source for UniPhier PXs3 SoC 43e98fc12SMasahiro Yamada// 53e98fc12SMasahiro Yamada// Copyright (C) 2017 Socionext Inc. 63e98fc12SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 761e6cc0aSMasahiro Yamada 8b443fb42SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 9b443fb42SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10b443fb42SMasahiro Yamada 1131c86aa7SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 1261e6cc0aSMasahiro Yamada 1361e6cc0aSMasahiro Yamada/ { 1461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3"; 1561e6cc0aSMasahiro Yamada #address-cells = <2>; 1661e6cc0aSMasahiro Yamada #size-cells = <2>; 1761e6cc0aSMasahiro Yamada interrupt-parent = <&gic>; 1861e6cc0aSMasahiro Yamada 1961e6cc0aSMasahiro Yamada cpus { 2061e6cc0aSMasahiro Yamada #address-cells = <2>; 2161e6cc0aSMasahiro Yamada #size-cells = <0>; 2261e6cc0aSMasahiro Yamada 2361e6cc0aSMasahiro Yamada cpu-map { 2461e6cc0aSMasahiro Yamada cluster0 { 2561e6cc0aSMasahiro Yamada core0 { 2661e6cc0aSMasahiro Yamada cpu = <&cpu0>; 2761e6cc0aSMasahiro Yamada }; 2861e6cc0aSMasahiro Yamada core1 { 2961e6cc0aSMasahiro Yamada cpu = <&cpu1>; 3061e6cc0aSMasahiro Yamada }; 3161e6cc0aSMasahiro Yamada core2 { 3261e6cc0aSMasahiro Yamada cpu = <&cpu2>; 3361e6cc0aSMasahiro Yamada }; 3461e6cc0aSMasahiro Yamada core3 { 3561e6cc0aSMasahiro Yamada cpu = <&cpu3>; 3661e6cc0aSMasahiro Yamada }; 3761e6cc0aSMasahiro Yamada }; 3861e6cc0aSMasahiro Yamada }; 3961e6cc0aSMasahiro Yamada 4061e6cc0aSMasahiro Yamada cpu0: cpu@0 { 4161e6cc0aSMasahiro Yamada device_type = "cpu"; 4261e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 4361e6cc0aSMasahiro Yamada reg = <0 0x000>; 4431c86aa7SMasahiro Yamada clocks = <&sys_clk 33>; 4561e6cc0aSMasahiro Yamada enable-method = "psci"; 4631c86aa7SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 4761e6cc0aSMasahiro Yamada }; 4861e6cc0aSMasahiro Yamada 4961e6cc0aSMasahiro Yamada cpu1: cpu@1 { 5061e6cc0aSMasahiro Yamada device_type = "cpu"; 5161e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 5261e6cc0aSMasahiro Yamada reg = <0 0x001>; 5331c86aa7SMasahiro Yamada clocks = <&sys_clk 33>; 5461e6cc0aSMasahiro Yamada enable-method = "psci"; 5531c86aa7SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 5661e6cc0aSMasahiro Yamada }; 5761e6cc0aSMasahiro Yamada 5861e6cc0aSMasahiro Yamada cpu2: cpu@2 { 5961e6cc0aSMasahiro Yamada device_type = "cpu"; 6061e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 6161e6cc0aSMasahiro Yamada reg = <0 0x002>; 6231c86aa7SMasahiro Yamada clocks = <&sys_clk 33>; 6361e6cc0aSMasahiro Yamada enable-method = "psci"; 6431c86aa7SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 6561e6cc0aSMasahiro Yamada }; 6661e6cc0aSMasahiro Yamada 6761e6cc0aSMasahiro Yamada cpu3: cpu@3 { 6861e6cc0aSMasahiro Yamada device_type = "cpu"; 6961e6cc0aSMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 7061e6cc0aSMasahiro Yamada reg = <0 0x003>; 7131c86aa7SMasahiro Yamada clocks = <&sys_clk 33>; 7261e6cc0aSMasahiro Yamada enable-method = "psci"; 7331c86aa7SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 7431c86aa7SMasahiro Yamada }; 7531c86aa7SMasahiro Yamada }; 7631c86aa7SMasahiro Yamada 77b443fb42SMasahiro Yamada cluster0_opp: opp-table { 7831c86aa7SMasahiro Yamada compatible = "operating-points-v2"; 7931c86aa7SMasahiro Yamada opp-shared; 8031c86aa7SMasahiro Yamada 8131c86aa7SMasahiro Yamada opp-250000000 { 8231c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 8331c86aa7SMasahiro Yamada clock-latency-ns = <300>; 8431c86aa7SMasahiro Yamada }; 8531c86aa7SMasahiro Yamada opp-325000000 { 8631c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <325000000>; 8731c86aa7SMasahiro Yamada clock-latency-ns = <300>; 8831c86aa7SMasahiro Yamada }; 8931c86aa7SMasahiro Yamada opp-500000000 { 9031c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 9131c86aa7SMasahiro Yamada clock-latency-ns = <300>; 9231c86aa7SMasahiro Yamada }; 9331c86aa7SMasahiro Yamada opp-650000000 { 9431c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <650000000>; 9531c86aa7SMasahiro Yamada clock-latency-ns = <300>; 9631c86aa7SMasahiro Yamada }; 9731c86aa7SMasahiro Yamada opp-666667000 { 9831c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 9931c86aa7SMasahiro Yamada clock-latency-ns = <300>; 10031c86aa7SMasahiro Yamada }; 10131c86aa7SMasahiro Yamada opp-866667000 { 10231c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <866667000>; 10331c86aa7SMasahiro Yamada clock-latency-ns = <300>; 10431c86aa7SMasahiro Yamada }; 10531c86aa7SMasahiro Yamada opp-1000000000 { 10631c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 10731c86aa7SMasahiro Yamada clock-latency-ns = <300>; 10831c86aa7SMasahiro Yamada }; 10931c86aa7SMasahiro Yamada opp-1300000000 { 11031c86aa7SMasahiro Yamada opp-hz = /bits/ 64 <1300000000>; 11131c86aa7SMasahiro Yamada clock-latency-ns = <300>; 11261e6cc0aSMasahiro Yamada }; 11361e6cc0aSMasahiro Yamada }; 11461e6cc0aSMasahiro Yamada 11561e6cc0aSMasahiro Yamada psci { 11661e6cc0aSMasahiro Yamada compatible = "arm,psci-1.0"; 11761e6cc0aSMasahiro Yamada method = "smc"; 11861e6cc0aSMasahiro Yamada }; 11961e6cc0aSMasahiro Yamada 12061e6cc0aSMasahiro Yamada clocks { 12161e6cc0aSMasahiro Yamada refclk: ref { 12261e6cc0aSMasahiro Yamada compatible = "fixed-clock"; 12361e6cc0aSMasahiro Yamada #clock-cells = <0>; 12461e6cc0aSMasahiro Yamada clock-frequency = <25000000>; 12561e6cc0aSMasahiro Yamada }; 12661e6cc0aSMasahiro Yamada }; 12761e6cc0aSMasahiro Yamada 128b443fb42SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 129b443fb42SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 130b443fb42SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>; 131b443fb42SMasahiro Yamada }; 132b443fb42SMasahiro Yamada 13361e6cc0aSMasahiro Yamada timer { 13461e6cc0aSMasahiro Yamada compatible = "arm,armv8-timer"; 13561e6cc0aSMasahiro Yamada interrupts = <1 13 4>, 13661e6cc0aSMasahiro Yamada <1 14 4>, 13761e6cc0aSMasahiro Yamada <1 11 4>, 13861e6cc0aSMasahiro Yamada <1 10 4>; 13961e6cc0aSMasahiro Yamada }; 14061e6cc0aSMasahiro Yamada 1417ad79c12SMasahiro Yamada soc@0 { 14261e6cc0aSMasahiro Yamada compatible = "simple-bus"; 14361e6cc0aSMasahiro Yamada #address-cells = <1>; 14461e6cc0aSMasahiro Yamada #size-cells = <1>; 14561e6cc0aSMasahiro Yamada ranges = <0 0 0 0xffffffff>; 14661e6cc0aSMasahiro Yamada 14761e6cc0aSMasahiro Yamada serial0: serial@54006800 { 14861e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 14961e6cc0aSMasahiro Yamada status = "disabled"; 15061e6cc0aSMasahiro Yamada reg = <0x54006800 0x40>; 15161e6cc0aSMasahiro Yamada interrupts = <0 33 4>; 15261e6cc0aSMasahiro Yamada pinctrl-names = "default"; 15361e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 15461e6cc0aSMasahiro Yamada clocks = <&peri_clk 0>; 15561e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 156b443fb42SMasahiro Yamada resets = <&peri_rst 0>; 15761e6cc0aSMasahiro Yamada }; 15861e6cc0aSMasahiro Yamada 15961e6cc0aSMasahiro Yamada serial1: serial@54006900 { 16061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 16161e6cc0aSMasahiro Yamada status = "disabled"; 16261e6cc0aSMasahiro Yamada reg = <0x54006900 0x40>; 16361e6cc0aSMasahiro Yamada interrupts = <0 35 4>; 16461e6cc0aSMasahiro Yamada pinctrl-names = "default"; 16561e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 16661e6cc0aSMasahiro Yamada clocks = <&peri_clk 1>; 16761e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 168b443fb42SMasahiro Yamada resets = <&peri_rst 1>; 16961e6cc0aSMasahiro Yamada }; 17061e6cc0aSMasahiro Yamada 17161e6cc0aSMasahiro Yamada serial2: serial@54006a00 { 17261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 17361e6cc0aSMasahiro Yamada status = "disabled"; 17461e6cc0aSMasahiro Yamada reg = <0x54006a00 0x40>; 17561e6cc0aSMasahiro Yamada interrupts = <0 37 4>; 17661e6cc0aSMasahiro Yamada pinctrl-names = "default"; 17761e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 17861e6cc0aSMasahiro Yamada clocks = <&peri_clk 2>; 17961e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 180b443fb42SMasahiro Yamada resets = <&peri_rst 2>; 18161e6cc0aSMasahiro Yamada }; 18261e6cc0aSMasahiro Yamada 18361e6cc0aSMasahiro Yamada serial3: serial@54006b00 { 18461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-uart"; 18561e6cc0aSMasahiro Yamada status = "disabled"; 18661e6cc0aSMasahiro Yamada reg = <0x54006b00 0x40>; 18761e6cc0aSMasahiro Yamada interrupts = <0 177 4>; 18861e6cc0aSMasahiro Yamada pinctrl-names = "default"; 18961e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 19061e6cc0aSMasahiro Yamada clocks = <&peri_clk 3>; 19161e6cc0aSMasahiro Yamada clock-frequency = <58820000>; 192b443fb42SMasahiro Yamada resets = <&peri_rst 3>; 19361e6cc0aSMasahiro Yamada }; 19461e6cc0aSMasahiro Yamada 19531c86aa7SMasahiro Yamada gpio: gpio@55000000 { 1960f72b74bSMasahiro Yamada compatible = "socionext,uniphier-gpio"; 19731c86aa7SMasahiro Yamada reg = <0x55000000 0x200>; 19831c86aa7SMasahiro Yamada interrupt-parent = <&aidet>; 19931c86aa7SMasahiro Yamada interrupt-controller; 20031c86aa7SMasahiro Yamada #interrupt-cells = <2>; 20131c86aa7SMasahiro Yamada gpio-controller; 20231c86aa7SMasahiro Yamada #gpio-cells = <2>; 20331c86aa7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 20446820e3fSMasahiro Yamada <&pinctrl 104 0 0>, 20546820e3fSMasahiro Yamada <&pinctrl 168 0 0>; 20631c86aa7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 20731c86aa7SMasahiro Yamada "gpio_range1", 20831c86aa7SMasahiro Yamada "gpio_range2"; 2090f72b74bSMasahiro Yamada ngpios = <286>; 210b443fb42SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 211b443fb42SMasahiro Yamada <21 217 3>; 21231c86aa7SMasahiro Yamada }; 21331c86aa7SMasahiro Yamada 21461e6cc0aSMasahiro Yamada i2c0: i2c@58780000 { 21561e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 21661e6cc0aSMasahiro Yamada status = "disabled"; 21761e6cc0aSMasahiro Yamada reg = <0x58780000 0x80>; 21861e6cc0aSMasahiro Yamada #address-cells = <1>; 21961e6cc0aSMasahiro Yamada #size-cells = <0>; 22061e6cc0aSMasahiro Yamada interrupts = <0 41 4>; 22161e6cc0aSMasahiro Yamada pinctrl-names = "default"; 22261e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 22361e6cc0aSMasahiro Yamada clocks = <&peri_clk 4>; 224b443fb42SMasahiro Yamada resets = <&peri_rst 4>; 22561e6cc0aSMasahiro Yamada clock-frequency = <100000>; 22661e6cc0aSMasahiro Yamada }; 22761e6cc0aSMasahiro Yamada 22861e6cc0aSMasahiro Yamada i2c1: i2c@58781000 { 22961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 23061e6cc0aSMasahiro Yamada status = "disabled"; 23161e6cc0aSMasahiro Yamada reg = <0x58781000 0x80>; 23261e6cc0aSMasahiro Yamada #address-cells = <1>; 23361e6cc0aSMasahiro Yamada #size-cells = <0>; 23461e6cc0aSMasahiro Yamada interrupts = <0 42 4>; 23561e6cc0aSMasahiro Yamada pinctrl-names = "default"; 23661e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 23761e6cc0aSMasahiro Yamada clocks = <&peri_clk 5>; 238b443fb42SMasahiro Yamada resets = <&peri_rst 5>; 23961e6cc0aSMasahiro Yamada clock-frequency = <100000>; 24061e6cc0aSMasahiro Yamada }; 24161e6cc0aSMasahiro Yamada 24261e6cc0aSMasahiro Yamada i2c2: i2c@58782000 { 24361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 24461e6cc0aSMasahiro Yamada status = "disabled"; 24561e6cc0aSMasahiro Yamada reg = <0x58782000 0x80>; 24661e6cc0aSMasahiro Yamada #address-cells = <1>; 24761e6cc0aSMasahiro Yamada #size-cells = <0>; 24861e6cc0aSMasahiro Yamada interrupts = <0 43 4>; 24931c86aa7SMasahiro Yamada pinctrl-names = "default"; 25031c86aa7SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c2>; 25161e6cc0aSMasahiro Yamada clocks = <&peri_clk 6>; 252b443fb42SMasahiro Yamada resets = <&peri_rst 6>; 25361e6cc0aSMasahiro Yamada clock-frequency = <100000>; 25461e6cc0aSMasahiro Yamada }; 25561e6cc0aSMasahiro Yamada 25661e6cc0aSMasahiro Yamada i2c3: i2c@58783000 { 25761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 25861e6cc0aSMasahiro Yamada status = "disabled"; 25961e6cc0aSMasahiro Yamada reg = <0x58783000 0x80>; 26061e6cc0aSMasahiro Yamada #address-cells = <1>; 26161e6cc0aSMasahiro Yamada #size-cells = <0>; 26261e6cc0aSMasahiro Yamada interrupts = <0 44 4>; 26361e6cc0aSMasahiro Yamada pinctrl-names = "default"; 26461e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 26561e6cc0aSMasahiro Yamada clocks = <&peri_clk 7>; 266b443fb42SMasahiro Yamada resets = <&peri_rst 7>; 26761e6cc0aSMasahiro Yamada clock-frequency = <100000>; 26861e6cc0aSMasahiro Yamada }; 26961e6cc0aSMasahiro Yamada 27061e6cc0aSMasahiro Yamada /* chip-internal connection for HDMI */ 27161e6cc0aSMasahiro Yamada i2c6: i2c@58786000 { 27261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 27361e6cc0aSMasahiro Yamada reg = <0x58786000 0x80>; 27461e6cc0aSMasahiro Yamada #address-cells = <1>; 27561e6cc0aSMasahiro Yamada #size-cells = <0>; 27661e6cc0aSMasahiro Yamada interrupts = <0 26 4>; 27761e6cc0aSMasahiro Yamada clocks = <&peri_clk 10>; 278b443fb42SMasahiro Yamada resets = <&peri_rst 10>; 27961e6cc0aSMasahiro Yamada clock-frequency = <400000>; 28061e6cc0aSMasahiro Yamada }; 28161e6cc0aSMasahiro Yamada 28261e6cc0aSMasahiro Yamada system_bus: system-bus@58c00000 { 28361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 28461e6cc0aSMasahiro Yamada status = "disabled"; 28561e6cc0aSMasahiro Yamada reg = <0x58c00000 0x400>; 28661e6cc0aSMasahiro Yamada #address-cells = <2>; 28761e6cc0aSMasahiro Yamada #size-cells = <1>; 28861e6cc0aSMasahiro Yamada pinctrl-names = "default"; 28961e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 29061e6cc0aSMasahiro Yamada }; 29161e6cc0aSMasahiro Yamada 292abb6ac25SMasahiro Yamada smpctrl@59801000 { 29361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 29461e6cc0aSMasahiro Yamada reg = <0x59801000 0x400>; 29561e6cc0aSMasahiro Yamada }; 29661e6cc0aSMasahiro Yamada 29761e6cc0aSMasahiro Yamada sdctrl@59810000 { 29861e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sdctrl", 29961e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 30031c86aa7SMasahiro Yamada reg = <0x59810000 0x400>; 30161e6cc0aSMasahiro Yamada 30261e6cc0aSMasahiro Yamada sd_clk: clock { 30361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-clock"; 30461e6cc0aSMasahiro Yamada #clock-cells = <1>; 30561e6cc0aSMasahiro Yamada }; 30661e6cc0aSMasahiro Yamada 30761e6cc0aSMasahiro Yamada sd_rst: reset { 30861e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-reset"; 30961e6cc0aSMasahiro Yamada #reset-cells = <1>; 31061e6cc0aSMasahiro Yamada }; 31161e6cc0aSMasahiro Yamada }; 31261e6cc0aSMasahiro Yamada 31361e6cc0aSMasahiro Yamada perictrl@59820000 { 31461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-perictrl", 31561e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 31661e6cc0aSMasahiro Yamada reg = <0x59820000 0x200>; 31761e6cc0aSMasahiro Yamada 31861e6cc0aSMasahiro Yamada peri_clk: clock { 31961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-clock"; 32061e6cc0aSMasahiro Yamada #clock-cells = <1>; 32161e6cc0aSMasahiro Yamada }; 32261e6cc0aSMasahiro Yamada 32361e6cc0aSMasahiro Yamada peri_rst: reset { 32461e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-reset"; 32561e6cc0aSMasahiro Yamada #reset-cells = <1>; 32661e6cc0aSMasahiro Yamada }; 32761e6cc0aSMasahiro Yamada }; 32861e6cc0aSMasahiro Yamada 32961e6cc0aSMasahiro Yamada emmc: sdhc@5a000000 { 33061e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 33161e6cc0aSMasahiro Yamada reg = <0x5a000000 0x400>; 33261e6cc0aSMasahiro Yamada interrupts = <0 78 4>; 33361e6cc0aSMasahiro Yamada pinctrl-names = "default"; 33461e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_emmc_1v8>; 33561e6cc0aSMasahiro Yamada clocks = <&sys_clk 4>; 336b443fb42SMasahiro Yamada resets = <&sys_rst 4>; 33761e6cc0aSMasahiro Yamada bus-width = <8>; 33861e6cc0aSMasahiro Yamada mmc-ddr-1_8v; 33961e6cc0aSMasahiro Yamada mmc-hs200-1_8v; 340b443fb42SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 34131c86aa7SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 34231c86aa7SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 34331c86aa7SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 34431c86aa7SMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 34531c86aa7SMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 34661e6cc0aSMasahiro Yamada }; 34761e6cc0aSMasahiro Yamada 34861e6cc0aSMasahiro Yamada sd: sdhc@5a400000 { 34961e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 35061e6cc0aSMasahiro Yamada status = "disabled"; 35161e6cc0aSMasahiro Yamada reg = <0x5a400000 0x800>; 35261e6cc0aSMasahiro Yamada interrupts = <0 76 4>; 35361e6cc0aSMasahiro Yamada pinctrl-names = "default"; 35461e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 35561e6cc0aSMasahiro Yamada clocks = <&sd_clk 0>; 35661e6cc0aSMasahiro Yamada reset-names = "host"; 35761e6cc0aSMasahiro Yamada resets = <&sd_rst 0>; 35861e6cc0aSMasahiro Yamada bus-width = <4>; 35961e6cc0aSMasahiro Yamada cap-sd-highspeed; 36061e6cc0aSMasahiro Yamada }; 36161e6cc0aSMasahiro Yamada 3623e98fc12SMasahiro Yamada soc_glue: soc-glue@5f800000 { 36361e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-soc-glue", 36461e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 36561e6cc0aSMasahiro Yamada reg = <0x5f800000 0x2000>; 36661e6cc0aSMasahiro Yamada 36761e6cc0aSMasahiro Yamada pinctrl: pinctrl { 36861e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-pinctrl"; 36961e6cc0aSMasahiro Yamada }; 37061e6cc0aSMasahiro Yamada }; 37161e6cc0aSMasahiro Yamada 372b443fb42SMasahiro Yamada soc-glue@5f900000 { 373b443fb42SMasahiro Yamada compatible = "socionext,uniphier-pxs3-soc-glue-debug", 374b443fb42SMasahiro Yamada "simple-mfd"; 375b443fb42SMasahiro Yamada #address-cells = <1>; 376b443fb42SMasahiro Yamada #size-cells = <1>; 377b443fb42SMasahiro Yamada ranges = <0 0x5f900000 0x2000>; 378b443fb42SMasahiro Yamada 379b443fb42SMasahiro Yamada efuse@100 { 380b443fb42SMasahiro Yamada compatible = "socionext,uniphier-efuse"; 381b443fb42SMasahiro Yamada reg = <0x100 0x28>; 382b443fb42SMasahiro Yamada }; 383b443fb42SMasahiro Yamada 384b443fb42SMasahiro Yamada efuse@200 { 385b443fb42SMasahiro Yamada compatible = "socionext,uniphier-efuse"; 386b443fb42SMasahiro Yamada reg = <0x200 0x68>; 387b443fb42SMasahiro Yamada }; 388b443fb42SMasahiro Yamada }; 389b443fb42SMasahiro Yamada 39031c86aa7SMasahiro Yamada aidet: aidet@5fc20000 { 39131c86aa7SMasahiro Yamada compatible = "socionext,uniphier-pxs3-aidet"; 39261e6cc0aSMasahiro Yamada reg = <0x5fc20000 0x200>; 39331c86aa7SMasahiro Yamada interrupt-controller; 39431c86aa7SMasahiro Yamada #interrupt-cells = <2>; 39561e6cc0aSMasahiro Yamada }; 39661e6cc0aSMasahiro Yamada 39761e6cc0aSMasahiro Yamada gic: interrupt-controller@5fe00000 { 39861e6cc0aSMasahiro Yamada compatible = "arm,gic-v3"; 39961e6cc0aSMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 40061e6cc0aSMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 40161e6cc0aSMasahiro Yamada interrupt-controller; 40261e6cc0aSMasahiro Yamada #interrupt-cells = <3>; 40361e6cc0aSMasahiro Yamada interrupts = <1 9 4>; 40461e6cc0aSMasahiro Yamada }; 40561e6cc0aSMasahiro Yamada 40661e6cc0aSMasahiro Yamada sysctrl@61840000 { 40761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-sysctrl", 40861e6cc0aSMasahiro Yamada "simple-mfd", "syscon"; 40961e6cc0aSMasahiro Yamada reg = <0x61840000 0x10000>; 41061e6cc0aSMasahiro Yamada 41161e6cc0aSMasahiro Yamada sys_clk: clock { 41261e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-clock"; 41361e6cc0aSMasahiro Yamada #clock-cells = <1>; 41461e6cc0aSMasahiro Yamada }; 41561e6cc0aSMasahiro Yamada 41661e6cc0aSMasahiro Yamada sys_rst: reset { 41761e6cc0aSMasahiro Yamada compatible = "socionext,uniphier-pxs3-reset"; 41861e6cc0aSMasahiro Yamada #reset-cells = <1>; 41961e6cc0aSMasahiro Yamada }; 42031c86aa7SMasahiro Yamada 42131c86aa7SMasahiro Yamada watchdog { 42231c86aa7SMasahiro Yamada compatible = "socionext,uniphier-wdt"; 42331c86aa7SMasahiro Yamada }; 42431c86aa7SMasahiro Yamada }; 42531c86aa7SMasahiro Yamada 4263e98fc12SMasahiro Yamada eth0: ethernet@65000000 { 4273e98fc12SMasahiro Yamada compatible = "socionext,uniphier-pxs3-ave4"; 4283e98fc12SMasahiro Yamada status = "disabled"; 4293e98fc12SMasahiro Yamada reg = <0x65000000 0x8500>; 4303e98fc12SMasahiro Yamada interrupts = <0 66 4>; 4313e98fc12SMasahiro Yamada pinctrl-names = "default"; 4323e98fc12SMasahiro Yamada pinctrl-0 = <&pinctrl_ether_rgmii>; 433*3c0fa6ceSKunihiko Hayashi clock-names = "ether"; 4343e98fc12SMasahiro Yamada clocks = <&sys_clk 6>; 435*3c0fa6ceSKunihiko Hayashi reset-names = "ether"; 4363e98fc12SMasahiro Yamada resets = <&sys_rst 6>; 4373e98fc12SMasahiro Yamada phy-mode = "rgmii"; 4383e98fc12SMasahiro Yamada local-mac-address = [00 00 00 00 00 00]; 43969b3d4e9SKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 4403e98fc12SMasahiro Yamada 4413e98fc12SMasahiro Yamada mdio0: mdio { 4423e98fc12SMasahiro Yamada #address-cells = <1>; 4433e98fc12SMasahiro Yamada #size-cells = <0>; 4443e98fc12SMasahiro Yamada }; 4453e98fc12SMasahiro Yamada }; 4463e98fc12SMasahiro Yamada 4473e98fc12SMasahiro Yamada eth1: ethernet@65200000 { 4483e98fc12SMasahiro Yamada compatible = "socionext,uniphier-pxs3-ave4"; 4493e98fc12SMasahiro Yamada status = "disabled"; 4503e98fc12SMasahiro Yamada reg = <0x65200000 0x8500>; 4513e98fc12SMasahiro Yamada interrupts = <0 67 4>; 4523e98fc12SMasahiro Yamada pinctrl-names = "default"; 4533e98fc12SMasahiro Yamada pinctrl-0 = <&pinctrl_ether1_rgmii>; 454*3c0fa6ceSKunihiko Hayashi clock-names = "ether"; 4553e98fc12SMasahiro Yamada clocks = <&sys_clk 7>; 456*3c0fa6ceSKunihiko Hayashi reset-names = "ether"; 4573e98fc12SMasahiro Yamada resets = <&sys_rst 7>; 4583e98fc12SMasahiro Yamada phy-mode = "rgmii"; 4593e98fc12SMasahiro Yamada local-mac-address = [00 00 00 00 00 00]; 46069b3d4e9SKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 1>; 4613e98fc12SMasahiro Yamada 4623e98fc12SMasahiro Yamada mdio1: mdio { 4633e98fc12SMasahiro Yamada #address-cells = <1>; 4643e98fc12SMasahiro Yamada #size-cells = <0>; 4653e98fc12SMasahiro Yamada }; 4663e98fc12SMasahiro Yamada }; 4673e98fc12SMasahiro Yamada 46831c86aa7SMasahiro Yamada usb0: usb@65b00000 { 46931c86aa7SMasahiro Yamada compatible = "socionext,uniphier-pxs3-dwc3"; 47031c86aa7SMasahiro Yamada status = "disabled"; 47131c86aa7SMasahiro Yamada reg = <0x65b00000 0x1000>; 47231c86aa7SMasahiro Yamada #address-cells = <1>; 47331c86aa7SMasahiro Yamada #size-cells = <1>; 47431c86aa7SMasahiro Yamada ranges; 47531c86aa7SMasahiro Yamada pinctrl-names = "default"; 47631c86aa7SMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; 47731c86aa7SMasahiro Yamada dwc3@65a00000 { 47831c86aa7SMasahiro Yamada compatible = "snps,dwc3"; 47931c86aa7SMasahiro Yamada reg = <0x65a00000 0x10000>; 48031c86aa7SMasahiro Yamada interrupts = <0 134 4>; 48131c86aa7SMasahiro Yamada dr_mode = "host"; 48231c86aa7SMasahiro Yamada tx-fifo-resize; 48331c86aa7SMasahiro Yamada }; 48431c86aa7SMasahiro Yamada }; 48531c86aa7SMasahiro Yamada 48631c86aa7SMasahiro Yamada usb1: usb@65d00000 { 48731c86aa7SMasahiro Yamada compatible = "socionext,uniphier-pxs3-dwc3"; 48831c86aa7SMasahiro Yamada status = "disabled"; 48931c86aa7SMasahiro Yamada reg = <0x65d00000 0x1000>; 49031c86aa7SMasahiro Yamada #address-cells = <1>; 49131c86aa7SMasahiro Yamada #size-cells = <1>; 49231c86aa7SMasahiro Yamada ranges; 49331c86aa7SMasahiro Yamada pinctrl-names = "default"; 49431c86aa7SMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; 49531c86aa7SMasahiro Yamada dwc3@65c00000 { 49631c86aa7SMasahiro Yamada compatible = "snps,dwc3"; 49731c86aa7SMasahiro Yamada reg = <0x65c00000 0x10000>; 49831c86aa7SMasahiro Yamada interrupts = <0 137 4>; 49931c86aa7SMasahiro Yamada dr_mode = "host"; 50031c86aa7SMasahiro Yamada tx-fifo-resize; 50131c86aa7SMasahiro Yamada }; 50261e6cc0aSMasahiro Yamada }; 50361e6cc0aSMasahiro Yamada 50461e6cc0aSMasahiro Yamada nand: nand@68000000 { 50531c86aa7SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 50661e6cc0aSMasahiro Yamada status = "disabled"; 50761e6cc0aSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 50861e6cc0aSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 50961e6cc0aSMasahiro Yamada interrupts = <0 65 4>; 51061e6cc0aSMasahiro Yamada pinctrl-names = "default"; 51161e6cc0aSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 51261e6cc0aSMasahiro Yamada clocks = <&sys_clk 2>; 513b443fb42SMasahiro Yamada resets = <&sys_rst 2>; 51461e6cc0aSMasahiro Yamada }; 51561e6cc0aSMasahiro Yamada }; 51661e6cc0aSMasahiro Yamada}; 51761e6cc0aSMasahiro Yamada 51831c86aa7SMasahiro Yamada#include "uniphier-pinctrl.dtsi" 519