152159d27SMasahiro Yamada/* 252159d27SMasahiro Yamada * Device Tree Source for UniPhier PXs2 SoC 352159d27SMasahiro Yamada * 452159d27SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 552159d27SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 652159d27SMasahiro Yamada * 752159d27SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ X11 852159d27SMasahiro Yamada */ 952159d27SMasahiro Yamada 10*cd62214dSMasahiro Yamada/include/ "skeleton.dtsi" 1152159d27SMasahiro Yamada 1252159d27SMasahiro Yamada/ { 1352159d27SMasahiro Yamada compatible = "socionext,uniphier-pxs2"; 1452159d27SMasahiro Yamada 1552159d27SMasahiro Yamada cpus { 1652159d27SMasahiro Yamada #address-cells = <1>; 1752159d27SMasahiro Yamada #size-cells = <0>; 1852159d27SMasahiro Yamada 1952159d27SMasahiro Yamada cpu@0 { 2052159d27SMasahiro Yamada device_type = "cpu"; 2152159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 2252159d27SMasahiro Yamada reg = <0>; 23*cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 2452159d27SMasahiro Yamada enable-method = "psci"; 2552159d27SMasahiro Yamada next-level-cache = <&l2>; 26*cd62214dSMasahiro Yamada operating-points-v2 = <&cpu_opp>; 2752159d27SMasahiro Yamada }; 2852159d27SMasahiro Yamada 2952159d27SMasahiro Yamada cpu@1 { 3052159d27SMasahiro Yamada device_type = "cpu"; 3152159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 3252159d27SMasahiro Yamada reg = <1>; 33*cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 3452159d27SMasahiro Yamada enable-method = "psci"; 3552159d27SMasahiro Yamada next-level-cache = <&l2>; 36*cd62214dSMasahiro Yamada operating-points-v2 = <&cpu_opp>; 3752159d27SMasahiro Yamada }; 3852159d27SMasahiro Yamada 3952159d27SMasahiro Yamada cpu@2 { 4052159d27SMasahiro Yamada device_type = "cpu"; 4152159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 4252159d27SMasahiro Yamada reg = <2>; 43*cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 4452159d27SMasahiro Yamada enable-method = "psci"; 4552159d27SMasahiro Yamada next-level-cache = <&l2>; 46*cd62214dSMasahiro Yamada operating-points-v2 = <&cpu_opp>; 4752159d27SMasahiro Yamada }; 4852159d27SMasahiro Yamada 4952159d27SMasahiro Yamada cpu@3 { 5052159d27SMasahiro Yamada device_type = "cpu"; 5152159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 5252159d27SMasahiro Yamada reg = <3>; 53*cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 5452159d27SMasahiro Yamada enable-method = "psci"; 5552159d27SMasahiro Yamada next-level-cache = <&l2>; 56*cd62214dSMasahiro Yamada operating-points-v2 = <&cpu_opp>; 5752159d27SMasahiro Yamada }; 5852159d27SMasahiro Yamada }; 5952159d27SMasahiro Yamada 60*cd62214dSMasahiro Yamada cpu_opp: opp_table { 61*cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 62*cd62214dSMasahiro Yamada opp-shared; 63*cd62214dSMasahiro Yamada 64*cd62214dSMasahiro Yamada opp@100000000 { 65*cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <100000000>; 66*cd62214dSMasahiro Yamada clock-latency-ns = <300>; 67*cd62214dSMasahiro Yamada }; 68*cd62214dSMasahiro Yamada opp@150000000 { 69*cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <150000000>; 70*cd62214dSMasahiro Yamada clock-latency-ns = <300>; 71*cd62214dSMasahiro Yamada }; 72*cd62214dSMasahiro Yamada opp@200000000 { 73*cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <200000000>; 74*cd62214dSMasahiro Yamada clock-latency-ns = <300>; 75*cd62214dSMasahiro Yamada }; 76*cd62214dSMasahiro Yamada opp@300000000 { 77*cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <300000000>; 78*cd62214dSMasahiro Yamada clock-latency-ns = <300>; 79*cd62214dSMasahiro Yamada }; 80*cd62214dSMasahiro Yamada opp@400000000 { 81*cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <400000000>; 82*cd62214dSMasahiro Yamada clock-latency-ns = <300>; 83*cd62214dSMasahiro Yamada }; 84*cd62214dSMasahiro Yamada opp@600000000 { 85*cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <600000000>; 86*cd62214dSMasahiro Yamada clock-latency-ns = <300>; 87*cd62214dSMasahiro Yamada }; 88*cd62214dSMasahiro Yamada opp@800000000 { 89*cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <800000000>; 90*cd62214dSMasahiro Yamada clock-latency-ns = <300>; 91*cd62214dSMasahiro Yamada }; 92*cd62214dSMasahiro Yamada opp@1200000000 { 93*cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1200000000>; 94*cd62214dSMasahiro Yamada clock-latency-ns = <300>; 95*cd62214dSMasahiro Yamada }; 96*cd62214dSMasahiro Yamada }; 97*cd62214dSMasahiro Yamada 98*cd62214dSMasahiro Yamada psci { 99*cd62214dSMasahiro Yamada compatible = "arm,psci-0.2"; 100*cd62214dSMasahiro Yamada method = "smc"; 101*cd62214dSMasahiro Yamada }; 102*cd62214dSMasahiro Yamada 10352159d27SMasahiro Yamada clocks { 104*cd62214dSMasahiro Yamada refclk: ref { 105*cd62214dSMasahiro Yamada compatible = "fixed-clock"; 106*cd62214dSMasahiro Yamada #clock-cells = <0>; 107*cd62214dSMasahiro Yamada clock-frequency = <25000000>; 108*cd62214dSMasahiro Yamada }; 109*cd62214dSMasahiro Yamada 11052159d27SMasahiro Yamada arm_timer_clk: arm_timer_clk { 11152159d27SMasahiro Yamada #clock-cells = <0>; 11252159d27SMasahiro Yamada compatible = "fixed-clock"; 11352159d27SMasahiro Yamada clock-frequency = <50000000>; 11452159d27SMasahiro Yamada }; 11552159d27SMasahiro Yamada 11652159d27SMasahiro Yamada i2c_clk: i2c_clk { 11752159d27SMasahiro Yamada #clock-cells = <0>; 11852159d27SMasahiro Yamada compatible = "fixed-clock"; 11952159d27SMasahiro Yamada clock-frequency = <50000000>; 12052159d27SMasahiro Yamada }; 12152159d27SMasahiro Yamada }; 12252159d27SMasahiro Yamada 123*cd62214dSMasahiro Yamada soc { 124*cd62214dSMasahiro Yamada compatible = "simple-bus"; 125*cd62214dSMasahiro Yamada #address-cells = <1>; 126*cd62214dSMasahiro Yamada #size-cells = <1>; 127*cd62214dSMasahiro Yamada ranges; 128*cd62214dSMasahiro Yamada interrupt-parent = <&intc>; 129*cd62214dSMasahiro Yamada u-boot,dm-pre-reloc; 130*cd62214dSMasahiro Yamada 13152159d27SMasahiro Yamada l2: l2-cache@500c0000 { 13252159d27SMasahiro Yamada compatible = "socionext,uniphier-system-cache"; 133*cd62214dSMasahiro Yamada reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, 134*cd62214dSMasahiro Yamada <0x506c0000 0x400>; 13552159d27SMasahiro Yamada interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; 13652159d27SMasahiro Yamada cache-unified; 13752159d27SMasahiro Yamada cache-size = <(1280 * 1024)>; 13852159d27SMasahiro Yamada cache-sets = <512>; 13952159d27SMasahiro Yamada cache-line-size = <128>; 14052159d27SMasahiro Yamada cache-level = <2>; 14152159d27SMasahiro Yamada }; 14252159d27SMasahiro Yamada 143*cd62214dSMasahiro Yamada serial0: serial@54006800 { 144*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 145*cd62214dSMasahiro Yamada status = "disabled"; 146*cd62214dSMasahiro Yamada reg = <0x54006800 0x40>; 147*cd62214dSMasahiro Yamada interrupts = <0 33 4>; 148*cd62214dSMasahiro Yamada pinctrl-names = "default"; 149*cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 150*cd62214dSMasahiro Yamada clocks = <&peri_clk 0>; 151*cd62214dSMasahiro Yamada clock-frequency = <88900000>; 152*cd62214dSMasahiro Yamada }; 153*cd62214dSMasahiro Yamada 154*cd62214dSMasahiro Yamada serial1: serial@54006900 { 155*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 156*cd62214dSMasahiro Yamada status = "disabled"; 157*cd62214dSMasahiro Yamada reg = <0x54006900 0x40>; 158*cd62214dSMasahiro Yamada interrupts = <0 35 4>; 159*cd62214dSMasahiro Yamada pinctrl-names = "default"; 160*cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 161*cd62214dSMasahiro Yamada clocks = <&peri_clk 1>; 162*cd62214dSMasahiro Yamada clock-frequency = <88900000>; 163*cd62214dSMasahiro Yamada }; 164*cd62214dSMasahiro Yamada 165*cd62214dSMasahiro Yamada serial2: serial@54006a00 { 166*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 167*cd62214dSMasahiro Yamada status = "disabled"; 168*cd62214dSMasahiro Yamada reg = <0x54006a00 0x40>; 169*cd62214dSMasahiro Yamada interrupts = <0 37 4>; 170*cd62214dSMasahiro Yamada pinctrl-names = "default"; 171*cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 172*cd62214dSMasahiro Yamada clocks = <&peri_clk 2>; 173*cd62214dSMasahiro Yamada clock-frequency = <88900000>; 174*cd62214dSMasahiro Yamada }; 175*cd62214dSMasahiro Yamada 176*cd62214dSMasahiro Yamada serial3: serial@54006b00 { 177*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 178*cd62214dSMasahiro Yamada status = "disabled"; 179*cd62214dSMasahiro Yamada reg = <0x54006b00 0x40>; 180*cd62214dSMasahiro Yamada interrupts = <0 177 4>; 181*cd62214dSMasahiro Yamada pinctrl-names = "default"; 182*cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 183*cd62214dSMasahiro Yamada clocks = <&peri_clk 3>; 184*cd62214dSMasahiro Yamada clock-frequency = <88900000>; 185*cd62214dSMasahiro Yamada }; 186*cd62214dSMasahiro Yamada 18752159d27SMasahiro Yamada port0x: gpio@55000008 { 18852159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 18952159d27SMasahiro Yamada reg = <0x55000008 0x8>; 19052159d27SMasahiro Yamada gpio-controller; 19152159d27SMasahiro Yamada #gpio-cells = <2>; 19252159d27SMasahiro Yamada }; 19352159d27SMasahiro Yamada 19452159d27SMasahiro Yamada port1x: gpio@55000010 { 19552159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 19652159d27SMasahiro Yamada reg = <0x55000010 0x8>; 19752159d27SMasahiro Yamada gpio-controller; 19852159d27SMasahiro Yamada #gpio-cells = <2>; 19952159d27SMasahiro Yamada }; 20052159d27SMasahiro Yamada 20152159d27SMasahiro Yamada port2x: gpio@55000018 { 20252159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 20352159d27SMasahiro Yamada reg = <0x55000018 0x8>; 20452159d27SMasahiro Yamada gpio-controller; 20552159d27SMasahiro Yamada #gpio-cells = <2>; 20652159d27SMasahiro Yamada }; 20752159d27SMasahiro Yamada 20852159d27SMasahiro Yamada port3x: gpio@55000020 { 20952159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 21052159d27SMasahiro Yamada reg = <0x55000020 0x8>; 21152159d27SMasahiro Yamada gpio-controller; 21252159d27SMasahiro Yamada #gpio-cells = <2>; 21352159d27SMasahiro Yamada }; 21452159d27SMasahiro Yamada 21552159d27SMasahiro Yamada port4: gpio@55000028 { 21652159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 21752159d27SMasahiro Yamada reg = <0x55000028 0x8>; 21852159d27SMasahiro Yamada gpio-controller; 21952159d27SMasahiro Yamada #gpio-cells = <2>; 22052159d27SMasahiro Yamada }; 22152159d27SMasahiro Yamada 22252159d27SMasahiro Yamada port5x: gpio@55000030 { 22352159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 22452159d27SMasahiro Yamada reg = <0x55000030 0x8>; 22552159d27SMasahiro Yamada gpio-controller; 22652159d27SMasahiro Yamada #gpio-cells = <2>; 22752159d27SMasahiro Yamada }; 22852159d27SMasahiro Yamada 22952159d27SMasahiro Yamada port6x: gpio@55000038 { 23052159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 23152159d27SMasahiro Yamada reg = <0x55000038 0x8>; 23252159d27SMasahiro Yamada gpio-controller; 23352159d27SMasahiro Yamada #gpio-cells = <2>; 23452159d27SMasahiro Yamada }; 23552159d27SMasahiro Yamada 23652159d27SMasahiro Yamada port7x: gpio@55000040 { 23752159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 23852159d27SMasahiro Yamada reg = <0x55000040 0x8>; 23952159d27SMasahiro Yamada gpio-controller; 24052159d27SMasahiro Yamada #gpio-cells = <2>; 24152159d27SMasahiro Yamada }; 24252159d27SMasahiro Yamada 24352159d27SMasahiro Yamada port8x: gpio@55000048 { 24452159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 24552159d27SMasahiro Yamada reg = <0x55000048 0x8>; 24652159d27SMasahiro Yamada gpio-controller; 24752159d27SMasahiro Yamada #gpio-cells = <2>; 24852159d27SMasahiro Yamada }; 24952159d27SMasahiro Yamada 25052159d27SMasahiro Yamada port9x: gpio@55000050 { 25152159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 25252159d27SMasahiro Yamada reg = <0x55000050 0x8>; 25352159d27SMasahiro Yamada gpio-controller; 25452159d27SMasahiro Yamada #gpio-cells = <2>; 25552159d27SMasahiro Yamada }; 25652159d27SMasahiro Yamada 25752159d27SMasahiro Yamada port10x: gpio@55000058 { 25852159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 25952159d27SMasahiro Yamada reg = <0x55000058 0x8>; 26052159d27SMasahiro Yamada gpio-controller; 26152159d27SMasahiro Yamada #gpio-cells = <2>; 26252159d27SMasahiro Yamada }; 26352159d27SMasahiro Yamada 26452159d27SMasahiro Yamada port12x: gpio@55000068 { 26552159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 26652159d27SMasahiro Yamada reg = <0x55000068 0x8>; 26752159d27SMasahiro Yamada gpio-controller; 26852159d27SMasahiro Yamada #gpio-cells = <2>; 26952159d27SMasahiro Yamada }; 27052159d27SMasahiro Yamada 27152159d27SMasahiro Yamada port13x: gpio@55000070 { 27252159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 27352159d27SMasahiro Yamada reg = <0x55000070 0x8>; 27452159d27SMasahiro Yamada gpio-controller; 27552159d27SMasahiro Yamada #gpio-cells = <2>; 27652159d27SMasahiro Yamada }; 27752159d27SMasahiro Yamada 27852159d27SMasahiro Yamada port14x: gpio@55000078 { 27952159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 28052159d27SMasahiro Yamada reg = <0x55000078 0x8>; 28152159d27SMasahiro Yamada gpio-controller; 28252159d27SMasahiro Yamada #gpio-cells = <2>; 28352159d27SMasahiro Yamada }; 28452159d27SMasahiro Yamada 28552159d27SMasahiro Yamada port15x: gpio@55000080 { 28652159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 28752159d27SMasahiro Yamada reg = <0x55000080 0x8>; 28852159d27SMasahiro Yamada gpio-controller; 28952159d27SMasahiro Yamada #gpio-cells = <2>; 29052159d27SMasahiro Yamada }; 29152159d27SMasahiro Yamada 29252159d27SMasahiro Yamada port16x: gpio@55000088 { 29352159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 29452159d27SMasahiro Yamada reg = <0x55000088 0x8>; 29552159d27SMasahiro Yamada gpio-controller; 29652159d27SMasahiro Yamada #gpio-cells = <2>; 29752159d27SMasahiro Yamada }; 29852159d27SMasahiro Yamada 29952159d27SMasahiro Yamada port17x: gpio@550000a0 { 30052159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 30152159d27SMasahiro Yamada reg = <0x550000a0 0x8>; 30252159d27SMasahiro Yamada gpio-controller; 30352159d27SMasahiro Yamada #gpio-cells = <2>; 30452159d27SMasahiro Yamada }; 30552159d27SMasahiro Yamada 30652159d27SMasahiro Yamada port18x: gpio@550000a8 { 30752159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 30852159d27SMasahiro Yamada reg = <0x550000a8 0x8>; 30952159d27SMasahiro Yamada gpio-controller; 31052159d27SMasahiro Yamada #gpio-cells = <2>; 31152159d27SMasahiro Yamada }; 31252159d27SMasahiro Yamada 31352159d27SMasahiro Yamada port19x: gpio@550000b0 { 31452159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 31552159d27SMasahiro Yamada reg = <0x550000b0 0x8>; 31652159d27SMasahiro Yamada gpio-controller; 31752159d27SMasahiro Yamada #gpio-cells = <2>; 31852159d27SMasahiro Yamada }; 31952159d27SMasahiro Yamada 32052159d27SMasahiro Yamada port20x: gpio@550000b8 { 32152159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 32252159d27SMasahiro Yamada reg = <0x550000b8 0x8>; 32352159d27SMasahiro Yamada gpio-controller; 32452159d27SMasahiro Yamada #gpio-cells = <2>; 32552159d27SMasahiro Yamada }; 32652159d27SMasahiro Yamada 32752159d27SMasahiro Yamada port21x: gpio@550000c0 { 32852159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 32952159d27SMasahiro Yamada reg = <0x550000c0 0x8>; 33052159d27SMasahiro Yamada gpio-controller; 33152159d27SMasahiro Yamada #gpio-cells = <2>; 33252159d27SMasahiro Yamada }; 33352159d27SMasahiro Yamada 33452159d27SMasahiro Yamada port22x: gpio@550000c8 { 33552159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 33652159d27SMasahiro Yamada reg = <0x550000c8 0x8>; 33752159d27SMasahiro Yamada gpio-controller; 33852159d27SMasahiro Yamada #gpio-cells = <2>; 33952159d27SMasahiro Yamada }; 34052159d27SMasahiro Yamada 34152159d27SMasahiro Yamada port23x: gpio@550000d0 { 34252159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 34352159d27SMasahiro Yamada reg = <0x550000d0 0x8>; 34452159d27SMasahiro Yamada gpio-controller; 34552159d27SMasahiro Yamada #gpio-cells = <2>; 34652159d27SMasahiro Yamada }; 34752159d27SMasahiro Yamada 34852159d27SMasahiro Yamada port24x: gpio@550000d8 { 34952159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 35052159d27SMasahiro Yamada reg = <0x550000d8 0x8>; 35152159d27SMasahiro Yamada gpio-controller; 35252159d27SMasahiro Yamada #gpio-cells = <2>; 35352159d27SMasahiro Yamada }; 35452159d27SMasahiro Yamada 35552159d27SMasahiro Yamada port25x: gpio@550000e0 { 35652159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 35752159d27SMasahiro Yamada reg = <0x550000e0 0x8>; 35852159d27SMasahiro Yamada gpio-controller; 35952159d27SMasahiro Yamada #gpio-cells = <2>; 36052159d27SMasahiro Yamada }; 36152159d27SMasahiro Yamada 36252159d27SMasahiro Yamada port26x: gpio@550000e8 { 36352159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 36452159d27SMasahiro Yamada reg = <0x550000e8 0x8>; 36552159d27SMasahiro Yamada gpio-controller; 36652159d27SMasahiro Yamada #gpio-cells = <2>; 36752159d27SMasahiro Yamada }; 36852159d27SMasahiro Yamada 36952159d27SMasahiro Yamada port27x: gpio@550000f0 { 37052159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 37152159d27SMasahiro Yamada reg = <0x550000f0 0x8>; 37252159d27SMasahiro Yamada gpio-controller; 37352159d27SMasahiro Yamada #gpio-cells = <2>; 37452159d27SMasahiro Yamada }; 37552159d27SMasahiro Yamada 37652159d27SMasahiro Yamada port28x: gpio@550000f8 { 37752159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 37852159d27SMasahiro Yamada reg = <0x550000f8 0x8>; 37952159d27SMasahiro Yamada gpio-controller; 38052159d27SMasahiro Yamada #gpio-cells = <2>; 38152159d27SMasahiro Yamada }; 38252159d27SMasahiro Yamada 38352159d27SMasahiro Yamada i2c0: i2c@58780000 { 38452159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 38552159d27SMasahiro Yamada status = "disabled"; 38652159d27SMasahiro Yamada reg = <0x58780000 0x80>; 38752159d27SMasahiro Yamada #address-cells = <1>; 38852159d27SMasahiro Yamada #size-cells = <0>; 38952159d27SMasahiro Yamada interrupts = <0 41 4>; 39052159d27SMasahiro Yamada pinctrl-names = "default"; 39152159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 39252159d27SMasahiro Yamada clocks = <&i2c_clk>; 39352159d27SMasahiro Yamada clock-frequency = <100000>; 39452159d27SMasahiro Yamada }; 39552159d27SMasahiro Yamada 39652159d27SMasahiro Yamada i2c1: i2c@58781000 { 39752159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 39852159d27SMasahiro Yamada status = "disabled"; 39952159d27SMasahiro Yamada reg = <0x58781000 0x80>; 40052159d27SMasahiro Yamada #address-cells = <1>; 40152159d27SMasahiro Yamada #size-cells = <0>; 40252159d27SMasahiro Yamada interrupts = <0 42 4>; 40352159d27SMasahiro Yamada pinctrl-names = "default"; 40452159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 40552159d27SMasahiro Yamada clocks = <&i2c_clk>; 40652159d27SMasahiro Yamada clock-frequency = <100000>; 40752159d27SMasahiro Yamada }; 40852159d27SMasahiro Yamada 40952159d27SMasahiro Yamada i2c2: i2c@58782000 { 41052159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 41152159d27SMasahiro Yamada status = "disabled"; 41252159d27SMasahiro Yamada reg = <0x58782000 0x80>; 41352159d27SMasahiro Yamada #address-cells = <1>; 41452159d27SMasahiro Yamada #size-cells = <0>; 415*cd62214dSMasahiro Yamada interrupts = <0 43 4>; 41652159d27SMasahiro Yamada pinctrl-names = "default"; 41752159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c2>; 41852159d27SMasahiro Yamada clocks = <&i2c_clk>; 41952159d27SMasahiro Yamada clock-frequency = <100000>; 42052159d27SMasahiro Yamada }; 42152159d27SMasahiro Yamada 42252159d27SMasahiro Yamada i2c3: i2c@58783000 { 42352159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 42452159d27SMasahiro Yamada status = "disabled"; 42552159d27SMasahiro Yamada reg = <0x58783000 0x80>; 42652159d27SMasahiro Yamada #address-cells = <1>; 42752159d27SMasahiro Yamada #size-cells = <0>; 42852159d27SMasahiro Yamada interrupts = <0 44 4>; 42952159d27SMasahiro Yamada pinctrl-names = "default"; 43052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 43152159d27SMasahiro Yamada clocks = <&i2c_clk>; 43252159d27SMasahiro Yamada clock-frequency = <100000>; 43352159d27SMasahiro Yamada }; 43452159d27SMasahiro Yamada 43552159d27SMasahiro Yamada /* chip-internal connection for DMD */ 43652159d27SMasahiro Yamada i2c4: i2c@58784000 { 43752159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 43852159d27SMasahiro Yamada reg = <0x58784000 0x80>; 43952159d27SMasahiro Yamada #address-cells = <1>; 44052159d27SMasahiro Yamada #size-cells = <0>; 44152159d27SMasahiro Yamada interrupts = <0 45 4>; 44252159d27SMasahiro Yamada clocks = <&i2c_clk>; 44352159d27SMasahiro Yamada clock-frequency = <400000>; 44452159d27SMasahiro Yamada }; 44552159d27SMasahiro Yamada 44652159d27SMasahiro Yamada /* chip-internal connection for STM */ 44752159d27SMasahiro Yamada i2c5: i2c@58785000 { 44852159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 44952159d27SMasahiro Yamada reg = <0x58785000 0x80>; 45052159d27SMasahiro Yamada #address-cells = <1>; 45152159d27SMasahiro Yamada #size-cells = <0>; 45252159d27SMasahiro Yamada interrupts = <0 25 4>; 45352159d27SMasahiro Yamada clocks = <&i2c_clk>; 45452159d27SMasahiro Yamada clock-frequency = <400000>; 45552159d27SMasahiro Yamada }; 45652159d27SMasahiro Yamada 45752159d27SMasahiro Yamada /* chip-internal connection for HDMI */ 45852159d27SMasahiro Yamada i2c6: i2c@58786000 { 45952159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 46052159d27SMasahiro Yamada reg = <0x58786000 0x80>; 46152159d27SMasahiro Yamada #address-cells = <1>; 46252159d27SMasahiro Yamada #size-cells = <0>; 46352159d27SMasahiro Yamada interrupts = <0 26 4>; 46452159d27SMasahiro Yamada clocks = <&i2c_clk>; 46552159d27SMasahiro Yamada clock-frequency = <400000>; 46652159d27SMasahiro Yamada }; 46752159d27SMasahiro Yamada 468*cd62214dSMasahiro Yamada system_bus: system-bus@58c00000 { 469*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 470*cd62214dSMasahiro Yamada status = "disabled"; 471*cd62214dSMasahiro Yamada reg = <0x58c00000 0x400>; 472*cd62214dSMasahiro Yamada #address-cells = <2>; 473*cd62214dSMasahiro Yamada #size-cells = <1>; 474*cd62214dSMasahiro Yamada pinctrl-names = "default"; 475*cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 476*cd62214dSMasahiro Yamada }; 477*cd62214dSMasahiro Yamada 478*cd62214dSMasahiro Yamada smpctrl@59800000 { 479*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 480*cd62214dSMasahiro Yamada reg = <0x59801000 0x400>; 481*cd62214dSMasahiro Yamada }; 482*cd62214dSMasahiro Yamada 483*cd62214dSMasahiro Yamada sdctrl@59810000 { 484*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-sdctrl", 485*cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 486*cd62214dSMasahiro Yamada reg = <0x59810000 0x800>; 487*cd62214dSMasahiro Yamada u-boot,dm-pre-reloc; 488*cd62214dSMasahiro Yamada 489*cd62214dSMasahiro Yamada sd_clk: clock { 490*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-sd-clock"; 491*cd62214dSMasahiro Yamada #clock-cells = <1>; 492*cd62214dSMasahiro Yamada }; 493*cd62214dSMasahiro Yamada 494*cd62214dSMasahiro Yamada sd_rst: reset { 495*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-sd-reset"; 496*cd62214dSMasahiro Yamada #reset-cells = <1>; 497*cd62214dSMasahiro Yamada }; 498*cd62214dSMasahiro Yamada }; 499*cd62214dSMasahiro Yamada 500*cd62214dSMasahiro Yamada perictrl@59820000 { 501*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-perictrl", 502*cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 503*cd62214dSMasahiro Yamada reg = <0x59820000 0x200>; 504*cd62214dSMasahiro Yamada 505*cd62214dSMasahiro Yamada peri_clk: clock { 506*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-peri-clock"; 507*cd62214dSMasahiro Yamada #clock-cells = <1>; 508*cd62214dSMasahiro Yamada }; 509*cd62214dSMasahiro Yamada 510*cd62214dSMasahiro Yamada peri_rst: reset { 511*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-peri-reset"; 512*cd62214dSMasahiro Yamada #reset-cells = <1>; 513*cd62214dSMasahiro Yamada }; 514*cd62214dSMasahiro Yamada }; 515*cd62214dSMasahiro Yamada 51652159d27SMasahiro Yamada emmc: sdhc@5a000000 { 51752159d27SMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 51852159d27SMasahiro Yamada status = "disabled"; 51952159d27SMasahiro Yamada reg = <0x5a000000 0x800>; 52052159d27SMasahiro Yamada interrupts = <0 78 4>; 52152159d27SMasahiro Yamada pinctrl-names = "default"; 52252159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 523*cd62214dSMasahiro Yamada clocks = <&sd_clk 1>; 524*cd62214dSMasahiro Yamada reset-names = "host"; 525*cd62214dSMasahiro Yamada resets = <&sd_rst 1>; 52652159d27SMasahiro Yamada bus-width = <8>; 52752159d27SMasahiro Yamada non-removable; 528*cd62214dSMasahiro Yamada cap-mmc-highspeed; 529*cd62214dSMasahiro Yamada cap-mmc-hw-reset; 530*cd62214dSMasahiro Yamada no-3-3-v; 53152159d27SMasahiro Yamada }; 53252159d27SMasahiro Yamada 53352159d27SMasahiro Yamada sd: sdhc@5a400000 { 53452159d27SMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 53552159d27SMasahiro Yamada status = "disabled"; 53652159d27SMasahiro Yamada reg = <0x5a400000 0x800>; 53752159d27SMasahiro Yamada interrupts = <0 76 4>; 53852159d27SMasahiro Yamada pinctrl-names = "default", "1.8v"; 53952159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 54052159d27SMasahiro Yamada pinctrl-1 = <&pinctrl_sd_1v8>; 541*cd62214dSMasahiro Yamada clocks = <&sd_clk 0>; 54252159d27SMasahiro Yamada reset-names = "host"; 543*cd62214dSMasahiro Yamada resets = <&sd_rst 0>; 54452159d27SMasahiro Yamada bus-width = <4>; 545*cd62214dSMasahiro Yamada cap-sd-highspeed; 546*cd62214dSMasahiro Yamada sd-uhs-sdr12; 547*cd62214dSMasahiro Yamada sd-uhs-sdr25; 548*cd62214dSMasahiro Yamada sd-uhs-sdr50; 549*cd62214dSMasahiro Yamada }; 550*cd62214dSMasahiro Yamada 551*cd62214dSMasahiro Yamada soc-glue@5f800000 { 552*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-soc-glue", 553*cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 554*cd62214dSMasahiro Yamada reg = <0x5f800000 0x2000>; 555*cd62214dSMasahiro Yamada u-boot,dm-pre-reloc; 556*cd62214dSMasahiro Yamada 557*cd62214dSMasahiro Yamada pinctrl: pinctrl { 558*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-pinctrl"; 559*cd62214dSMasahiro Yamada u-boot,dm-pre-reloc; 560*cd62214dSMasahiro Yamada }; 56152159d27SMasahiro Yamada }; 56252159d27SMasahiro Yamada 56352159d27SMasahiro Yamada aidet@5fc20000 { 56452159d27SMasahiro Yamada compatible = "simple-mfd", "syscon"; 56552159d27SMasahiro Yamada reg = <0x5fc20000 0x200>; 56652159d27SMasahiro Yamada }; 56752159d27SMasahiro Yamada 568*cd62214dSMasahiro Yamada timer@60000200 { 569*cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-global-timer"; 570*cd62214dSMasahiro Yamada reg = <0x60000200 0x20>; 571*cd62214dSMasahiro Yamada interrupts = <1 11 0xf04>; 572*cd62214dSMasahiro Yamada clocks = <&arm_timer_clk>; 573*cd62214dSMasahiro Yamada }; 574*cd62214dSMasahiro Yamada 575*cd62214dSMasahiro Yamada timer@60000600 { 576*cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-twd-timer"; 577*cd62214dSMasahiro Yamada reg = <0x60000600 0x20>; 578*cd62214dSMasahiro Yamada interrupts = <1 13 0xf04>; 579*cd62214dSMasahiro Yamada clocks = <&arm_timer_clk>; 580*cd62214dSMasahiro Yamada }; 581*cd62214dSMasahiro Yamada 582*cd62214dSMasahiro Yamada intc: interrupt-controller@60001000 { 583*cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-gic"; 584*cd62214dSMasahiro Yamada reg = <0x60001000 0x1000>, 585*cd62214dSMasahiro Yamada <0x60000100 0x100>; 586*cd62214dSMasahiro Yamada #interrupt-cells = <3>; 587*cd62214dSMasahiro Yamada interrupt-controller; 588*cd62214dSMasahiro Yamada }; 589*cd62214dSMasahiro Yamada 590*cd62214dSMasahiro Yamada sysctrl@61840000 { 591*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-sysctrl", 592*cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 593*cd62214dSMasahiro Yamada reg = <0x61840000 0x4000>; 594*cd62214dSMasahiro Yamada 595*cd62214dSMasahiro Yamada sys_clk: clock { 596*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-clock"; 597*cd62214dSMasahiro Yamada #clock-cells = <1>; 598*cd62214dSMasahiro Yamada }; 599*cd62214dSMasahiro Yamada 600*cd62214dSMasahiro Yamada sys_rst: reset { 601*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-reset"; 602*cd62214dSMasahiro Yamada #reset-cells = <1>; 603*cd62214dSMasahiro Yamada }; 604*cd62214dSMasahiro Yamada }; 605*cd62214dSMasahiro Yamada 606*cd62214dSMasahiro Yamada usb0: usb@65b00000 { 607*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-dwc3"; 60852159d27SMasahiro Yamada status = "disabled"; 609*cd62214dSMasahiro Yamada reg = <0x65b00000 0x1000>; 610*cd62214dSMasahiro Yamada #address-cells = <1>; 611*cd62214dSMasahiro Yamada #size-cells = <1>; 612*cd62214dSMasahiro Yamada ranges; 61352159d27SMasahiro Yamada pinctrl-names = "default"; 61452159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; 615*cd62214dSMasahiro Yamada dwc3@65a00000 { 616*cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 617*cd62214dSMasahiro Yamada reg = <0x65a00000 0x10000>; 618*cd62214dSMasahiro Yamada interrupts = <0 134 4>; 619*cd62214dSMasahiro Yamada tx-fifo-resize; 620*cd62214dSMasahiro Yamada }; 62152159d27SMasahiro Yamada }; 62252159d27SMasahiro Yamada 623*cd62214dSMasahiro Yamada usb1: usb@65d00000 { 624*cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-dwc3"; 62552159d27SMasahiro Yamada status = "disabled"; 626*cd62214dSMasahiro Yamada reg = <0x65d00000 0x1000>; 627*cd62214dSMasahiro Yamada #address-cells = <1>; 628*cd62214dSMasahiro Yamada #size-cells = <1>; 629*cd62214dSMasahiro Yamada ranges; 63052159d27SMasahiro Yamada pinctrl-names = "default"; 63152159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; 632*cd62214dSMasahiro Yamada dwc3@65c00000 { 633*cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 634*cd62214dSMasahiro Yamada reg = <0x65c00000 0x10000>; 635*cd62214dSMasahiro Yamada interrupts = <0 137 4>; 636*cd62214dSMasahiro Yamada tx-fifo-resize; 63752159d27SMasahiro Yamada }; 63852159d27SMasahiro Yamada }; 63952159d27SMasahiro Yamada 640*cd62214dSMasahiro Yamada nand: nand@68000000 { 641*cd62214dSMasahiro Yamada compatible = "socionext,denali-nand-v5b"; 642*cd62214dSMasahiro Yamada status = "disabled"; 643*cd62214dSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 644*cd62214dSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 645*cd62214dSMasahiro Yamada interrupts = <0 65 4>; 646*cd62214dSMasahiro Yamada pinctrl-names = "default"; 647*cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 648*cd62214dSMasahiro Yamada clocks = <&sys_clk 2>; 649*cd62214dSMasahiro Yamada nand-ecc-strength = <8>; 650*cd62214dSMasahiro Yamada }; 651*cd62214dSMasahiro Yamada }; 65252159d27SMasahiro Yamada}; 65352159d27SMasahiro Yamada 654*cd62214dSMasahiro Yamada/include/ "uniphier-pinctrl.dtsi" 655