13e98fc12SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 23e98fc12SMasahiro Yamada// 33e98fc12SMasahiro Yamada// Device Tree Source for UniPhier PXs2 SoC 43e98fc12SMasahiro Yamada// 53e98fc12SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 63e98fc12SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 752159d27SMasahiro Yamada 8b443fb42SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 9b443fb42SMasahiro Yamada#include <dt-bindings/thermal/thermal.h> 10b443fb42SMasahiro Yamada 1152159d27SMasahiro Yamada/ { 1252159d27SMasahiro Yamada compatible = "socionext,uniphier-pxs2"; 13f16eda96SMasahiro Yamada #address-cells = <1>; 14f16eda96SMasahiro Yamada #size-cells = <1>; 1552159d27SMasahiro Yamada 1652159d27SMasahiro Yamada cpus { 1752159d27SMasahiro Yamada #address-cells = <1>; 1852159d27SMasahiro Yamada #size-cells = <0>; 1952159d27SMasahiro Yamada 20b443fb42SMasahiro Yamada cpu0: cpu@0 { 2152159d27SMasahiro Yamada device_type = "cpu"; 2252159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 2352159d27SMasahiro Yamada reg = <0>; 24cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 2552159d27SMasahiro Yamada enable-method = "psci"; 2652159d27SMasahiro Yamada next-level-cache = <&l2>; 27cd62214dSMasahiro Yamada operating-points-v2 = <&cpu_opp>; 28b443fb42SMasahiro Yamada #cooling-cells = <2>; 2952159d27SMasahiro Yamada }; 3052159d27SMasahiro Yamada 31b443fb42SMasahiro Yamada cpu1: cpu@1 { 3252159d27SMasahiro Yamada device_type = "cpu"; 3352159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 3452159d27SMasahiro Yamada reg = <1>; 35cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 3652159d27SMasahiro Yamada enable-method = "psci"; 3752159d27SMasahiro Yamada next-level-cache = <&l2>; 38cd62214dSMasahiro Yamada operating-points-v2 = <&cpu_opp>; 3933aae6b5SMasahiro Yamada #cooling-cells = <2>; 4052159d27SMasahiro Yamada }; 4152159d27SMasahiro Yamada 42b443fb42SMasahiro Yamada cpu2: cpu@2 { 4352159d27SMasahiro Yamada device_type = "cpu"; 4452159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 4552159d27SMasahiro Yamada reg = <2>; 46cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 4752159d27SMasahiro Yamada enable-method = "psci"; 4852159d27SMasahiro Yamada next-level-cache = <&l2>; 49cd62214dSMasahiro Yamada operating-points-v2 = <&cpu_opp>; 5033aae6b5SMasahiro Yamada #cooling-cells = <2>; 5152159d27SMasahiro Yamada }; 5252159d27SMasahiro Yamada 53b443fb42SMasahiro Yamada cpu3: cpu@3 { 5452159d27SMasahiro Yamada device_type = "cpu"; 5552159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 5652159d27SMasahiro Yamada reg = <3>; 57cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 5852159d27SMasahiro Yamada enable-method = "psci"; 5952159d27SMasahiro Yamada next-level-cache = <&l2>; 60cd62214dSMasahiro Yamada operating-points-v2 = <&cpu_opp>; 6133aae6b5SMasahiro Yamada #cooling-cells = <2>; 6252159d27SMasahiro Yamada }; 6352159d27SMasahiro Yamada }; 6452159d27SMasahiro Yamada 65b443fb42SMasahiro Yamada cpu_opp: opp-table { 66cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 67cd62214dSMasahiro Yamada opp-shared; 68cd62214dSMasahiro Yamada 694e7f8de4SMasahiro Yamada opp-100000000 { 70cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <100000000>; 71cd62214dSMasahiro Yamada clock-latency-ns = <300>; 72cd62214dSMasahiro Yamada }; 734e7f8de4SMasahiro Yamada opp-150000000 { 74cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <150000000>; 75cd62214dSMasahiro Yamada clock-latency-ns = <300>; 76cd62214dSMasahiro Yamada }; 774e7f8de4SMasahiro Yamada opp-200000000 { 78cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <200000000>; 79cd62214dSMasahiro Yamada clock-latency-ns = <300>; 80cd62214dSMasahiro Yamada }; 814e7f8de4SMasahiro Yamada opp-300000000 { 82cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <300000000>; 83cd62214dSMasahiro Yamada clock-latency-ns = <300>; 84cd62214dSMasahiro Yamada }; 854e7f8de4SMasahiro Yamada opp-400000000 { 86cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <400000000>; 87cd62214dSMasahiro Yamada clock-latency-ns = <300>; 88cd62214dSMasahiro Yamada }; 894e7f8de4SMasahiro Yamada opp-600000000 { 90cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <600000000>; 91cd62214dSMasahiro Yamada clock-latency-ns = <300>; 92cd62214dSMasahiro Yamada }; 934e7f8de4SMasahiro Yamada opp-800000000 { 94cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <800000000>; 95cd62214dSMasahiro Yamada clock-latency-ns = <300>; 96cd62214dSMasahiro Yamada }; 974e7f8de4SMasahiro Yamada opp-1200000000 { 98cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1200000000>; 99cd62214dSMasahiro Yamada clock-latency-ns = <300>; 100cd62214dSMasahiro Yamada }; 101cd62214dSMasahiro Yamada }; 102cd62214dSMasahiro Yamada 103cd62214dSMasahiro Yamada psci { 104cd62214dSMasahiro Yamada compatible = "arm,psci-0.2"; 105cd62214dSMasahiro Yamada method = "smc"; 106cd62214dSMasahiro Yamada }; 107cd62214dSMasahiro Yamada 10852159d27SMasahiro Yamada clocks { 109cd62214dSMasahiro Yamada refclk: ref { 110cd62214dSMasahiro Yamada compatible = "fixed-clock"; 111cd62214dSMasahiro Yamada #clock-cells = <0>; 112cd62214dSMasahiro Yamada clock-frequency = <25000000>; 113cd62214dSMasahiro Yamada }; 114cd62214dSMasahiro Yamada 115b443fb42SMasahiro Yamada arm_timer_clk: arm-timer { 11652159d27SMasahiro Yamada #clock-cells = <0>; 11752159d27SMasahiro Yamada compatible = "fixed-clock"; 11852159d27SMasahiro Yamada clock-frequency = <50000000>; 11952159d27SMasahiro Yamada }; 12052159d27SMasahiro Yamada }; 12152159d27SMasahiro Yamada 122b443fb42SMasahiro Yamada thermal-zones { 123b443fb42SMasahiro Yamada cpu-thermal { 124b443fb42SMasahiro Yamada polling-delay-passive = <250>; /* 250ms */ 125b443fb42SMasahiro Yamada polling-delay = <1000>; /* 1000ms */ 126b443fb42SMasahiro Yamada thermal-sensors = <&pvtctl>; 127b443fb42SMasahiro Yamada 128b443fb42SMasahiro Yamada trips { 129b443fb42SMasahiro Yamada cpu_crit: cpu-crit { 130b443fb42SMasahiro Yamada temperature = <95000>; /* 95C */ 131b443fb42SMasahiro Yamada hysteresis = <2000>; 132b443fb42SMasahiro Yamada type = "critical"; 133b443fb42SMasahiro Yamada }; 134b443fb42SMasahiro Yamada cpu_alert: cpu-alert { 135b443fb42SMasahiro Yamada temperature = <85000>; /* 85C */ 136b443fb42SMasahiro Yamada hysteresis = <2000>; 137b443fb42SMasahiro Yamada type = "passive"; 138b443fb42SMasahiro Yamada }; 139b443fb42SMasahiro Yamada }; 140b443fb42SMasahiro Yamada 141b443fb42SMasahiro Yamada cooling-maps { 142b443fb42SMasahiro Yamada map { 143b443fb42SMasahiro Yamada trip = <&cpu_alert>; 144b443fb42SMasahiro Yamada cooling-device = <&cpu0 145b443fb42SMasahiro Yamada THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 146b443fb42SMasahiro Yamada }; 147b443fb42SMasahiro Yamada }; 148b443fb42SMasahiro Yamada }; 149b443fb42SMasahiro Yamada }; 150b443fb42SMasahiro Yamada 151cd62214dSMasahiro Yamada soc { 152cd62214dSMasahiro Yamada compatible = "simple-bus"; 153cd62214dSMasahiro Yamada #address-cells = <1>; 154cd62214dSMasahiro Yamada #size-cells = <1>; 155cd62214dSMasahiro Yamada ranges; 156cd62214dSMasahiro Yamada interrupt-parent = <&intc>; 157cd62214dSMasahiro Yamada 15852159d27SMasahiro Yamada l2: l2-cache@500c0000 { 15952159d27SMasahiro Yamada compatible = "socionext,uniphier-system-cache"; 160cd62214dSMasahiro Yamada reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, 161cd62214dSMasahiro Yamada <0x506c0000 0x400>; 16252159d27SMasahiro Yamada interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; 16352159d27SMasahiro Yamada cache-unified; 16452159d27SMasahiro Yamada cache-size = <(1280 * 1024)>; 16552159d27SMasahiro Yamada cache-sets = <512>; 16652159d27SMasahiro Yamada cache-line-size = <128>; 16752159d27SMasahiro Yamada cache-level = <2>; 16852159d27SMasahiro Yamada }; 16952159d27SMasahiro Yamada 170*2001a81cSMasahiro Yamada spi0: spi@54006000 { 171*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-scssi"; 172*2001a81cSMasahiro Yamada status = "disabled"; 173*2001a81cSMasahiro Yamada reg = <0x54006000 0x100>; 174*2001a81cSMasahiro Yamada interrupts = <0 39 4>; 175*2001a81cSMasahiro Yamada pinctrl-names = "default"; 176*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_spi0>; 177*2001a81cSMasahiro Yamada clocks = <&peri_clk 11>; 178*2001a81cSMasahiro Yamada resets = <&peri_rst 11>; 179*2001a81cSMasahiro Yamada }; 180*2001a81cSMasahiro Yamada 181*2001a81cSMasahiro Yamada spi1: spi@54006100 { 182*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-scssi"; 183*2001a81cSMasahiro Yamada status = "disabled"; 184*2001a81cSMasahiro Yamada reg = <0x54006100 0x100>; 185*2001a81cSMasahiro Yamada interrupts = <0 216 4>; 186*2001a81cSMasahiro Yamada pinctrl-names = "default"; 187*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_spi1>; 188*2001a81cSMasahiro Yamada clocks = <&peri_clk 11>; 189*2001a81cSMasahiro Yamada resets = <&peri_rst 11>; 190*2001a81cSMasahiro Yamada }; 191*2001a81cSMasahiro Yamada 192cd62214dSMasahiro Yamada serial0: serial@54006800 { 193cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 194cd62214dSMasahiro Yamada status = "disabled"; 195cd62214dSMasahiro Yamada reg = <0x54006800 0x40>; 196cd62214dSMasahiro Yamada interrupts = <0 33 4>; 197cd62214dSMasahiro Yamada pinctrl-names = "default"; 198cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 199cd62214dSMasahiro Yamada clocks = <&peri_clk 0>; 200b443fb42SMasahiro Yamada resets = <&peri_rst 0>; 201cd62214dSMasahiro Yamada }; 202cd62214dSMasahiro Yamada 203cd62214dSMasahiro Yamada serial1: serial@54006900 { 204cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 205cd62214dSMasahiro Yamada status = "disabled"; 206cd62214dSMasahiro Yamada reg = <0x54006900 0x40>; 207cd62214dSMasahiro Yamada interrupts = <0 35 4>; 208cd62214dSMasahiro Yamada pinctrl-names = "default"; 209cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 210cd62214dSMasahiro Yamada clocks = <&peri_clk 1>; 211b443fb42SMasahiro Yamada resets = <&peri_rst 1>; 212cd62214dSMasahiro Yamada }; 213cd62214dSMasahiro Yamada 214cd62214dSMasahiro Yamada serial2: serial@54006a00 { 215cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 216cd62214dSMasahiro Yamada status = "disabled"; 217cd62214dSMasahiro Yamada reg = <0x54006a00 0x40>; 218cd62214dSMasahiro Yamada interrupts = <0 37 4>; 219cd62214dSMasahiro Yamada pinctrl-names = "default"; 220cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 221cd62214dSMasahiro Yamada clocks = <&peri_clk 2>; 222b443fb42SMasahiro Yamada resets = <&peri_rst 2>; 223cd62214dSMasahiro Yamada }; 224cd62214dSMasahiro Yamada 225cd62214dSMasahiro Yamada serial3: serial@54006b00 { 226cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 227cd62214dSMasahiro Yamada status = "disabled"; 228cd62214dSMasahiro Yamada reg = <0x54006b00 0x40>; 229cd62214dSMasahiro Yamada interrupts = <0 177 4>; 230cd62214dSMasahiro Yamada pinctrl-names = "default"; 231cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 232cd62214dSMasahiro Yamada clocks = <&peri_clk 3>; 233b443fb42SMasahiro Yamada resets = <&peri_rst 3>; 234cd62214dSMasahiro Yamada }; 235cd62214dSMasahiro Yamada 2360f72b74bSMasahiro Yamada gpio: gpio@55000000 { 23752159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 2380f72b74bSMasahiro Yamada reg = <0x55000000 0x200>; 2390f72b74bSMasahiro Yamada interrupt-parent = <&aidet>; 2400f72b74bSMasahiro Yamada interrupt-controller; 2410f72b74bSMasahiro Yamada #interrupt-cells = <2>; 24252159d27SMasahiro Yamada gpio-controller; 24352159d27SMasahiro Yamada #gpio-cells = <2>; 2440f72b74bSMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 2450f72b74bSMasahiro Yamada <&pinctrl 96 0 0>; 2460f72b74bSMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 2470f72b74bSMasahiro Yamada "gpio_range1"; 2480f72b74bSMasahiro Yamada ngpios = <232>; 249b443fb42SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 250b443fb42SMasahiro Yamada <21 217 3>; 25152159d27SMasahiro Yamada }; 25252159d27SMasahiro Yamada 2533e98fc12SMasahiro Yamada audio@56000000 { 2543e98fc12SMasahiro Yamada compatible = "socionext,uniphier-pxs2-aio"; 2553e98fc12SMasahiro Yamada reg = <0x56000000 0x80000>; 2563e98fc12SMasahiro Yamada interrupts = <0 144 4>; 2573e98fc12SMasahiro Yamada pinctrl-names = "default"; 2583e98fc12SMasahiro Yamada pinctrl-0 = <&pinctrl_ain1>, 2593e98fc12SMasahiro Yamada <&pinctrl_ain2>, 2603e98fc12SMasahiro Yamada <&pinctrl_ainiec1>, 2613e98fc12SMasahiro Yamada <&pinctrl_aout2>, 2623e98fc12SMasahiro Yamada <&pinctrl_aout3>, 2633e98fc12SMasahiro Yamada <&pinctrl_aoutiec1>, 2643e98fc12SMasahiro Yamada <&pinctrl_aoutiec2>; 2653e98fc12SMasahiro Yamada clock-names = "aio"; 2663e98fc12SMasahiro Yamada clocks = <&sys_clk 40>; 2673e98fc12SMasahiro Yamada reset-names = "aio"; 2683e98fc12SMasahiro Yamada resets = <&sys_rst 40>; 2693e98fc12SMasahiro Yamada #sound-dai-cells = <1>; 2703e98fc12SMasahiro Yamada socionext,syscon = <&soc_glue>; 2713e98fc12SMasahiro Yamada 2723e98fc12SMasahiro Yamada i2s_port0: port@0 { 2733e98fc12SMasahiro Yamada i2s_hdmi: endpoint { 2743e98fc12SMasahiro Yamada }; 2753e98fc12SMasahiro Yamada }; 2763e98fc12SMasahiro Yamada 2773e98fc12SMasahiro Yamada i2s_port1: port@1 { 2783e98fc12SMasahiro Yamada i2s_line: endpoint { 2793e98fc12SMasahiro Yamada }; 2803e98fc12SMasahiro Yamada }; 2813e98fc12SMasahiro Yamada 2823e98fc12SMasahiro Yamada i2s_port2: port@2 { 2833e98fc12SMasahiro Yamada i2s_aux: endpoint { 2843e98fc12SMasahiro Yamada }; 2853e98fc12SMasahiro Yamada }; 2863e98fc12SMasahiro Yamada 2873e98fc12SMasahiro Yamada spdif_port0: port@3 { 2883e98fc12SMasahiro Yamada spdif_hiecout1: endpoint { 2893e98fc12SMasahiro Yamada }; 2903e98fc12SMasahiro Yamada }; 2913e98fc12SMasahiro Yamada 2923e98fc12SMasahiro Yamada spdif_port1: port@4 { 2933e98fc12SMasahiro Yamada spdif_iecout1: endpoint { 2943e98fc12SMasahiro Yamada }; 2953e98fc12SMasahiro Yamada }; 2963e98fc12SMasahiro Yamada 2973e98fc12SMasahiro Yamada comp_spdif_port0: port@5 { 2983e98fc12SMasahiro Yamada comp_spdif_hiecout1: endpoint { 2993e98fc12SMasahiro Yamada }; 3003e98fc12SMasahiro Yamada }; 3013e98fc12SMasahiro Yamada 3023e98fc12SMasahiro Yamada comp_spdif_port1: port@6 { 3033e98fc12SMasahiro Yamada comp_spdif_iecout1: endpoint { 3043e98fc12SMasahiro Yamada }; 3053e98fc12SMasahiro Yamada }; 3063e98fc12SMasahiro Yamada }; 3073e98fc12SMasahiro Yamada 30852159d27SMasahiro Yamada i2c0: i2c@58780000 { 30952159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 31052159d27SMasahiro Yamada status = "disabled"; 31152159d27SMasahiro Yamada reg = <0x58780000 0x80>; 31252159d27SMasahiro Yamada #address-cells = <1>; 31352159d27SMasahiro Yamada #size-cells = <0>; 31452159d27SMasahiro Yamada interrupts = <0 41 4>; 31552159d27SMasahiro Yamada pinctrl-names = "default"; 31652159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 3177317a940SMasahiro Yamada clocks = <&peri_clk 4>; 318b443fb42SMasahiro Yamada resets = <&peri_rst 4>; 31952159d27SMasahiro Yamada clock-frequency = <100000>; 32052159d27SMasahiro Yamada }; 32152159d27SMasahiro Yamada 32252159d27SMasahiro Yamada i2c1: i2c@58781000 { 32352159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 32452159d27SMasahiro Yamada status = "disabled"; 32552159d27SMasahiro Yamada reg = <0x58781000 0x80>; 32652159d27SMasahiro Yamada #address-cells = <1>; 32752159d27SMasahiro Yamada #size-cells = <0>; 32852159d27SMasahiro Yamada interrupts = <0 42 4>; 32952159d27SMasahiro Yamada pinctrl-names = "default"; 33052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 3317317a940SMasahiro Yamada clocks = <&peri_clk 5>; 332b443fb42SMasahiro Yamada resets = <&peri_rst 5>; 33352159d27SMasahiro Yamada clock-frequency = <100000>; 33452159d27SMasahiro Yamada }; 33552159d27SMasahiro Yamada 33652159d27SMasahiro Yamada i2c2: i2c@58782000 { 33752159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 33852159d27SMasahiro Yamada status = "disabled"; 33952159d27SMasahiro Yamada reg = <0x58782000 0x80>; 34052159d27SMasahiro Yamada #address-cells = <1>; 34152159d27SMasahiro Yamada #size-cells = <0>; 342cd62214dSMasahiro Yamada interrupts = <0 43 4>; 34352159d27SMasahiro Yamada pinctrl-names = "default"; 34452159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c2>; 3457317a940SMasahiro Yamada clocks = <&peri_clk 6>; 346b443fb42SMasahiro Yamada resets = <&peri_rst 6>; 34752159d27SMasahiro Yamada clock-frequency = <100000>; 34852159d27SMasahiro Yamada }; 34952159d27SMasahiro Yamada 35052159d27SMasahiro Yamada i2c3: i2c@58783000 { 35152159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 35252159d27SMasahiro Yamada status = "disabled"; 35352159d27SMasahiro Yamada reg = <0x58783000 0x80>; 35452159d27SMasahiro Yamada #address-cells = <1>; 35552159d27SMasahiro Yamada #size-cells = <0>; 35652159d27SMasahiro Yamada interrupts = <0 44 4>; 35752159d27SMasahiro Yamada pinctrl-names = "default"; 35852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 3597317a940SMasahiro Yamada clocks = <&peri_clk 7>; 360b443fb42SMasahiro Yamada resets = <&peri_rst 7>; 36152159d27SMasahiro Yamada clock-frequency = <100000>; 36252159d27SMasahiro Yamada }; 36352159d27SMasahiro Yamada 36452159d27SMasahiro Yamada /* chip-internal connection for DMD */ 36552159d27SMasahiro Yamada i2c4: i2c@58784000 { 36652159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 36752159d27SMasahiro Yamada reg = <0x58784000 0x80>; 36852159d27SMasahiro Yamada #address-cells = <1>; 36952159d27SMasahiro Yamada #size-cells = <0>; 37052159d27SMasahiro Yamada interrupts = <0 45 4>; 3717317a940SMasahiro Yamada clocks = <&peri_clk 8>; 372b443fb42SMasahiro Yamada resets = <&peri_rst 8>; 37352159d27SMasahiro Yamada clock-frequency = <400000>; 37452159d27SMasahiro Yamada }; 37552159d27SMasahiro Yamada 37652159d27SMasahiro Yamada /* chip-internal connection for STM */ 37752159d27SMasahiro Yamada i2c5: i2c@58785000 { 37852159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 37952159d27SMasahiro Yamada reg = <0x58785000 0x80>; 38052159d27SMasahiro Yamada #address-cells = <1>; 38152159d27SMasahiro Yamada #size-cells = <0>; 38252159d27SMasahiro Yamada interrupts = <0 25 4>; 3837317a940SMasahiro Yamada clocks = <&peri_clk 9>; 384b443fb42SMasahiro Yamada resets = <&peri_rst 9>; 38552159d27SMasahiro Yamada clock-frequency = <400000>; 38652159d27SMasahiro Yamada }; 38752159d27SMasahiro Yamada 38852159d27SMasahiro Yamada /* chip-internal connection for HDMI */ 38952159d27SMasahiro Yamada i2c6: i2c@58786000 { 39052159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 39152159d27SMasahiro Yamada reg = <0x58786000 0x80>; 39252159d27SMasahiro Yamada #address-cells = <1>; 39352159d27SMasahiro Yamada #size-cells = <0>; 39452159d27SMasahiro Yamada interrupts = <0 26 4>; 3957317a940SMasahiro Yamada clocks = <&peri_clk 10>; 396b443fb42SMasahiro Yamada resets = <&peri_rst 10>; 39752159d27SMasahiro Yamada clock-frequency = <400000>; 39852159d27SMasahiro Yamada }; 39952159d27SMasahiro Yamada 400cd62214dSMasahiro Yamada system_bus: system-bus@58c00000 { 401cd62214dSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 402cd62214dSMasahiro Yamada status = "disabled"; 403cd62214dSMasahiro Yamada reg = <0x58c00000 0x400>; 404cd62214dSMasahiro Yamada #address-cells = <2>; 405cd62214dSMasahiro Yamada #size-cells = <1>; 406cd62214dSMasahiro Yamada pinctrl-names = "default"; 407cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 408cd62214dSMasahiro Yamada }; 409cd62214dSMasahiro Yamada 410abb6ac25SMasahiro Yamada smpctrl@59801000 { 411cd62214dSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 412cd62214dSMasahiro Yamada reg = <0x59801000 0x400>; 413cd62214dSMasahiro Yamada }; 414cd62214dSMasahiro Yamada 415cd62214dSMasahiro Yamada sdctrl@59810000 { 416cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-sdctrl", 417cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 4186c9e46efSMasahiro Yamada reg = <0x59810000 0x400>; 419cd62214dSMasahiro Yamada 420cd62214dSMasahiro Yamada sd_clk: clock { 421cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-sd-clock"; 422cd62214dSMasahiro Yamada #clock-cells = <1>; 423cd62214dSMasahiro Yamada }; 424cd62214dSMasahiro Yamada 425cd62214dSMasahiro Yamada sd_rst: reset { 426cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-sd-reset"; 427cd62214dSMasahiro Yamada #reset-cells = <1>; 428cd62214dSMasahiro Yamada }; 429cd62214dSMasahiro Yamada }; 430cd62214dSMasahiro Yamada 431cd62214dSMasahiro Yamada perictrl@59820000 { 432cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-perictrl", 433cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 434cd62214dSMasahiro Yamada reg = <0x59820000 0x200>; 435cd62214dSMasahiro Yamada 436cd62214dSMasahiro Yamada peri_clk: clock { 437cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-peri-clock"; 438cd62214dSMasahiro Yamada #clock-cells = <1>; 439cd62214dSMasahiro Yamada }; 440cd62214dSMasahiro Yamada 441cd62214dSMasahiro Yamada peri_rst: reset { 442cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-peri-reset"; 443cd62214dSMasahiro Yamada #reset-cells = <1>; 444cd62214dSMasahiro Yamada }; 445cd62214dSMasahiro Yamada }; 446cd62214dSMasahiro Yamada 44752159d27SMasahiro Yamada emmc: sdhc@5a000000 { 448c3ab1e11SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 44952159d27SMasahiro Yamada status = "disabled"; 45052159d27SMasahiro Yamada reg = <0x5a000000 0x800>; 45152159d27SMasahiro Yamada interrupts = <0 78 4>; 45252159d27SMasahiro Yamada pinctrl-names = "default"; 45352159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 454cd62214dSMasahiro Yamada clocks = <&sd_clk 1>; 455c3ab1e11SMasahiro Yamada reset-names = "host", "hw"; 456c3ab1e11SMasahiro Yamada resets = <&sd_rst 1>, <&sd_rst 6>; 45752159d27SMasahiro Yamada bus-width = <8>; 458cd62214dSMasahiro Yamada cap-mmc-highspeed; 459cd62214dSMasahiro Yamada cap-mmc-hw-reset; 460c3ab1e11SMasahiro Yamada non-removable; 46152159d27SMasahiro Yamada }; 46252159d27SMasahiro Yamada 46352159d27SMasahiro Yamada sd: sdhc@5a400000 { 464c3ab1e11SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 46552159d27SMasahiro Yamada status = "disabled"; 46652159d27SMasahiro Yamada reg = <0x5a400000 0x800>; 46752159d27SMasahiro Yamada interrupts = <0 76 4>; 468c3ab1e11SMasahiro Yamada pinctrl-names = "default", "uhs"; 46952159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 470c3ab1e11SMasahiro Yamada pinctrl-1 = <&pinctrl_sd_uhs>; 471cd62214dSMasahiro Yamada clocks = <&sd_clk 0>; 47252159d27SMasahiro Yamada reset-names = "host"; 473cd62214dSMasahiro Yamada resets = <&sd_rst 0>; 47452159d27SMasahiro Yamada bus-width = <4>; 475cd62214dSMasahiro Yamada cap-sd-highspeed; 476cd62214dSMasahiro Yamada sd-uhs-sdr12; 477cd62214dSMasahiro Yamada sd-uhs-sdr25; 478cd62214dSMasahiro Yamada sd-uhs-sdr50; 479cd62214dSMasahiro Yamada }; 480cd62214dSMasahiro Yamada 4813e98fc12SMasahiro Yamada soc_glue: soc-glue@5f800000 { 482cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-soc-glue", 483cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 484cd62214dSMasahiro Yamada reg = <0x5f800000 0x2000>; 485cd62214dSMasahiro Yamada 486cd62214dSMasahiro Yamada pinctrl: pinctrl { 487cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-pinctrl"; 488cd62214dSMasahiro Yamada }; 48952159d27SMasahiro Yamada }; 49052159d27SMasahiro Yamada 49146820e3fSMasahiro Yamada soc-glue@5f900000 { 49246820e3fSMasahiro Yamada compatible = "socionext,uniphier-pxs2-soc-glue-debug", 49346820e3fSMasahiro Yamada "simple-mfd"; 49446820e3fSMasahiro Yamada #address-cells = <1>; 49546820e3fSMasahiro Yamada #size-cells = <1>; 49646820e3fSMasahiro Yamada ranges = <0 0x5f900000 0x2000>; 49746820e3fSMasahiro Yamada 49846820e3fSMasahiro Yamada efuse@100 { 49946820e3fSMasahiro Yamada compatible = "socionext,uniphier-efuse"; 50046820e3fSMasahiro Yamada reg = <0x100 0x28>; 50146820e3fSMasahiro Yamada }; 50246820e3fSMasahiro Yamada 50346820e3fSMasahiro Yamada efuse@200 { 50446820e3fSMasahiro Yamada compatible = "socionext,uniphier-efuse"; 50546820e3fSMasahiro Yamada reg = <0x200 0x58>; 50646820e3fSMasahiro Yamada }; 50746820e3fSMasahiro Yamada }; 50846820e3fSMasahiro Yamada 5096c9e46efSMasahiro Yamada aidet: aidet@5fc20000 { 5106c9e46efSMasahiro Yamada compatible = "socionext,uniphier-pxs2-aidet"; 51152159d27SMasahiro Yamada reg = <0x5fc20000 0x200>; 5126c9e46efSMasahiro Yamada interrupt-controller; 5136c9e46efSMasahiro Yamada #interrupt-cells = <2>; 51452159d27SMasahiro Yamada }; 51552159d27SMasahiro Yamada 516cd62214dSMasahiro Yamada timer@60000200 { 517cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-global-timer"; 518cd62214dSMasahiro Yamada reg = <0x60000200 0x20>; 519cd62214dSMasahiro Yamada interrupts = <1 11 0xf04>; 520cd62214dSMasahiro Yamada clocks = <&arm_timer_clk>; 521cd62214dSMasahiro Yamada }; 522cd62214dSMasahiro Yamada 523cd62214dSMasahiro Yamada timer@60000600 { 524cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-twd-timer"; 525cd62214dSMasahiro Yamada reg = <0x60000600 0x20>; 526cd62214dSMasahiro Yamada interrupts = <1 13 0xf04>; 527cd62214dSMasahiro Yamada clocks = <&arm_timer_clk>; 528cd62214dSMasahiro Yamada }; 529cd62214dSMasahiro Yamada 530cd62214dSMasahiro Yamada intc: interrupt-controller@60001000 { 531cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-gic"; 532cd62214dSMasahiro Yamada reg = <0x60001000 0x1000>, 533cd62214dSMasahiro Yamada <0x60000100 0x100>; 534cd62214dSMasahiro Yamada #interrupt-cells = <3>; 535cd62214dSMasahiro Yamada interrupt-controller; 536cd62214dSMasahiro Yamada }; 537cd62214dSMasahiro Yamada 538cd62214dSMasahiro Yamada sysctrl@61840000 { 539cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-sysctrl", 540cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 5417317a940SMasahiro Yamada reg = <0x61840000 0x10000>; 542cd62214dSMasahiro Yamada 543cd62214dSMasahiro Yamada sys_clk: clock { 544cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-clock"; 545cd62214dSMasahiro Yamada #clock-cells = <1>; 546cd62214dSMasahiro Yamada }; 547cd62214dSMasahiro Yamada 548cd62214dSMasahiro Yamada sys_rst: reset { 549cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-reset"; 550cd62214dSMasahiro Yamada #reset-cells = <1>; 551cd62214dSMasahiro Yamada }; 552b443fb42SMasahiro Yamada 553b443fb42SMasahiro Yamada pvtctl: pvtctl { 554b443fb42SMasahiro Yamada compatible = "socionext,uniphier-pxs2-thermal"; 555b443fb42SMasahiro Yamada interrupts = <0 3 4>; 556b443fb42SMasahiro Yamada #thermal-sensor-cells = <0>; 557b443fb42SMasahiro Yamada socionext,tmod-calibration = <0x0f86 0x6844>; 558b443fb42SMasahiro Yamada }; 559cd62214dSMasahiro Yamada }; 560cd62214dSMasahiro Yamada 5613e98fc12SMasahiro Yamada eth: ethernet@65000000 { 5623e98fc12SMasahiro Yamada compatible = "socionext,uniphier-pxs2-ave4"; 5633e98fc12SMasahiro Yamada status = "disabled"; 5643e98fc12SMasahiro Yamada reg = <0x65000000 0x8500>; 5653e98fc12SMasahiro Yamada interrupts = <0 66 4>; 5663e98fc12SMasahiro Yamada pinctrl-names = "default"; 5673e98fc12SMasahiro Yamada pinctrl-0 = <&pinctrl_ether_rgmii>; 5683c0fa6ceSKunihiko Hayashi clock-names = "ether"; 5693e98fc12SMasahiro Yamada clocks = <&sys_clk 6>; 5703c0fa6ceSKunihiko Hayashi reset-names = "ether"; 5713e98fc12SMasahiro Yamada resets = <&sys_rst 6>; 5723e98fc12SMasahiro Yamada phy-mode = "rgmii"; 5733e98fc12SMasahiro Yamada local-mac-address = [00 00 00 00 00 00]; 57469b3d4e9SKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 5753e98fc12SMasahiro Yamada 5763e98fc12SMasahiro Yamada mdio: mdio { 5773e98fc12SMasahiro Yamada #address-cells = <1>; 5783e98fc12SMasahiro Yamada #size-cells = <0>; 5793e98fc12SMasahiro Yamada }; 5803e98fc12SMasahiro Yamada }; 5813e98fc12SMasahiro Yamada 582*2001a81cSMasahiro Yamada _usb0: usb@65a00000 { 583*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 584*2001a81cSMasahiro Yamada status = "disabled"; 585*2001a81cSMasahiro Yamada reg = <0x65a00000 0xcd00>; 586*2001a81cSMasahiro Yamada interrupt-names = "host", "peripheral"; 587*2001a81cSMasahiro Yamada interrupts = <0 134 4>, <0 135 4>; 588*2001a81cSMasahiro Yamada pinctrl-names = "default"; 589*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; 590*2001a81cSMasahiro Yamada clock-names = "ref", "bus_early", "suspend"; 591*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>; 592*2001a81cSMasahiro Yamada resets = <&usb0_rst 15>; 593*2001a81cSMasahiro Yamada phys = <&usb0_hsphy0>, <&usb0_hsphy1>, 594*2001a81cSMasahiro Yamada <&usb0_ssphy0>, <&usb0_ssphy1>; 595*2001a81cSMasahiro Yamada dr_mode = "host"; 596*2001a81cSMasahiro Yamada }; 597*2001a81cSMasahiro Yamada 598*2001a81cSMasahiro Yamada usb-glue@65b00000 { 599*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-dwc3-glue", 600*2001a81cSMasahiro Yamada "simple-mfd"; 601*2001a81cSMasahiro Yamada #address-cells = <1>; 602*2001a81cSMasahiro Yamada #size-cells = <1>; 603*2001a81cSMasahiro Yamada ranges = <0 0x65b00000 0x400>; 604*2001a81cSMasahiro Yamada 605*2001a81cSMasahiro Yamada usb0_rst: reset@0 { 606*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-reset"; 607*2001a81cSMasahiro Yamada reg = <0x0 0x4>; 608*2001a81cSMasahiro Yamada #reset-cells = <1>; 609*2001a81cSMasahiro Yamada clock-names = "link"; 610*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>; 611*2001a81cSMasahiro Yamada reset-names = "link"; 612*2001a81cSMasahiro Yamada resets = <&sys_rst 14>; 613*2001a81cSMasahiro Yamada }; 614*2001a81cSMasahiro Yamada 615*2001a81cSMasahiro Yamada usb0_vbus0: regulator@100 { 616*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-regulator"; 617*2001a81cSMasahiro Yamada reg = <0x100 0x10>; 618*2001a81cSMasahiro Yamada clock-names = "link"; 619*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>; 620*2001a81cSMasahiro Yamada reset-names = "link"; 621*2001a81cSMasahiro Yamada resets = <&sys_rst 14>; 622*2001a81cSMasahiro Yamada }; 623*2001a81cSMasahiro Yamada 624*2001a81cSMasahiro Yamada usb0_vbus1: regulator@110 { 625*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-regulator"; 626*2001a81cSMasahiro Yamada reg = <0x110 0x10>; 627*2001a81cSMasahiro Yamada clock-names = "link"; 628*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>; 629*2001a81cSMasahiro Yamada reset-names = "link"; 630*2001a81cSMasahiro Yamada resets = <&sys_rst 14>; 631*2001a81cSMasahiro Yamada }; 632*2001a81cSMasahiro Yamada 633*2001a81cSMasahiro Yamada usb0_hsphy0: hs-phy@200 { 634*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-hsphy"; 635*2001a81cSMasahiro Yamada reg = <0x200 0x10>; 636*2001a81cSMasahiro Yamada #phy-cells = <0>; 637*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 638*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 16>; 639*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 640*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 16>; 641*2001a81cSMasahiro Yamada vbus-supply = <&usb0_vbus0>; 642*2001a81cSMasahiro Yamada }; 643*2001a81cSMasahiro Yamada 644*2001a81cSMasahiro Yamada usb0_hsphy1: hs-phy@210 { 645*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-hsphy"; 646*2001a81cSMasahiro Yamada reg = <0x210 0x10>; 647*2001a81cSMasahiro Yamada #phy-cells = <0>; 648*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 649*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 16>; 650*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 651*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 16>; 652*2001a81cSMasahiro Yamada vbus-supply = <&usb0_vbus1>; 653*2001a81cSMasahiro Yamada }; 654*2001a81cSMasahiro Yamada 655*2001a81cSMasahiro Yamada usb0_ssphy0: ss-phy@300 { 656*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-ssphy"; 657*2001a81cSMasahiro Yamada reg = <0x300 0x10>; 658*2001a81cSMasahiro Yamada #phy-cells = <0>; 659*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 660*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 17>; 661*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 662*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 17>; 663*2001a81cSMasahiro Yamada vbus-supply = <&usb0_vbus0>; 664*2001a81cSMasahiro Yamada }; 665*2001a81cSMasahiro Yamada 666*2001a81cSMasahiro Yamada usb0_ssphy1: ss-phy@310 { 667*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-ssphy"; 668*2001a81cSMasahiro Yamada reg = <0x310 0x10>; 669*2001a81cSMasahiro Yamada #phy-cells = <0>; 670*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 671*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 18>; 672*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 673*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 18>; 674*2001a81cSMasahiro Yamada vbus-supply = <&usb0_vbus1>; 675*2001a81cSMasahiro Yamada }; 676*2001a81cSMasahiro Yamada }; 677*2001a81cSMasahiro Yamada 678*2001a81cSMasahiro Yamada /* FIXME: U-Boot own node */ 679cd62214dSMasahiro Yamada usb0: usb@65b00000 { 680cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-dwc3"; 68152159d27SMasahiro Yamada status = "disabled"; 682cd62214dSMasahiro Yamada reg = <0x65b00000 0x1000>; 683cd62214dSMasahiro Yamada #address-cells = <1>; 684cd62214dSMasahiro Yamada #size-cells = <1>; 685cd62214dSMasahiro Yamada ranges; 68652159d27SMasahiro Yamada pinctrl-names = "default"; 68752159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; 688cd62214dSMasahiro Yamada dwc3@65a00000 { 689cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 690cd62214dSMasahiro Yamada reg = <0x65a00000 0x10000>; 691cd62214dSMasahiro Yamada interrupts = <0 134 4>; 6923444d1d4SMasahiro Yamada dr_mode = "host"; 693cd62214dSMasahiro Yamada tx-fifo-resize; 694cd62214dSMasahiro Yamada }; 69552159d27SMasahiro Yamada }; 69652159d27SMasahiro Yamada 697*2001a81cSMasahiro Yamada _usb1: usb@65c00000 { 698*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 699*2001a81cSMasahiro Yamada status = "disabled"; 700*2001a81cSMasahiro Yamada reg = <0x65c00000 0xcd00>; 701*2001a81cSMasahiro Yamada interrupt-names = "host", "peripheral"; 702*2001a81cSMasahiro Yamada interrupts = <0 137 4>, <0 138 4>; 703*2001a81cSMasahiro Yamada pinctrl-names = "default"; 704*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; 705*2001a81cSMasahiro Yamada clock-names = "ref", "bus_early", "suspend"; 706*2001a81cSMasahiro Yamada clocks = <&sys_clk 15>, <&sys_clk 15>, <&sys_clk 15>; 707*2001a81cSMasahiro Yamada resets = <&usb1_rst 15>; 708*2001a81cSMasahiro Yamada phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>; 709*2001a81cSMasahiro Yamada dr_mode = "host"; 710*2001a81cSMasahiro Yamada }; 711*2001a81cSMasahiro Yamada 712*2001a81cSMasahiro Yamada usb-glue@65d00000 { 713*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-dwc3-glue", 714*2001a81cSMasahiro Yamada "simple-mfd"; 715*2001a81cSMasahiro Yamada #address-cells = <1>; 716*2001a81cSMasahiro Yamada #size-cells = <1>; 717*2001a81cSMasahiro Yamada ranges = <0 0x65d00000 0x400>; 718*2001a81cSMasahiro Yamada 719*2001a81cSMasahiro Yamada usb1_rst: reset@0 { 720*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-reset"; 721*2001a81cSMasahiro Yamada reg = <0x0 0x4>; 722*2001a81cSMasahiro Yamada #reset-cells = <1>; 723*2001a81cSMasahiro Yamada clock-names = "link"; 724*2001a81cSMasahiro Yamada clocks = <&sys_clk 15>; 725*2001a81cSMasahiro Yamada reset-names = "link"; 726*2001a81cSMasahiro Yamada resets = <&sys_rst 15>; 727*2001a81cSMasahiro Yamada }; 728*2001a81cSMasahiro Yamada 729*2001a81cSMasahiro Yamada usb1_vbus0: regulator@100 { 730*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-regulator"; 731*2001a81cSMasahiro Yamada reg = <0x100 0x10>; 732*2001a81cSMasahiro Yamada clock-names = "link"; 733*2001a81cSMasahiro Yamada clocks = <&sys_clk 15>; 734*2001a81cSMasahiro Yamada reset-names = "link"; 735*2001a81cSMasahiro Yamada resets = <&sys_rst 15>; 736*2001a81cSMasahiro Yamada }; 737*2001a81cSMasahiro Yamada 738*2001a81cSMasahiro Yamada usb1_vbus1: regulator@110 { 739*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-regulator"; 740*2001a81cSMasahiro Yamada reg = <0x110 0x10>; 741*2001a81cSMasahiro Yamada clock-names = "link"; 742*2001a81cSMasahiro Yamada clocks = <&sys_clk 15>; 743*2001a81cSMasahiro Yamada reset-names = "link"; 744*2001a81cSMasahiro Yamada resets = <&sys_rst 15>; 745*2001a81cSMasahiro Yamada }; 746*2001a81cSMasahiro Yamada 747*2001a81cSMasahiro Yamada usb1_hsphy0: hs-phy@200 { 748*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-hsphy"; 749*2001a81cSMasahiro Yamada reg = <0x200 0x10>; 750*2001a81cSMasahiro Yamada #phy-cells = <0>; 751*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 752*2001a81cSMasahiro Yamada clocks = <&sys_clk 15>, <&sys_clk 20>; 753*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 754*2001a81cSMasahiro Yamada resets = <&sys_rst 15>, <&sys_rst 20>; 755*2001a81cSMasahiro Yamada vbus-supply = <&usb1_vbus0>; 756*2001a81cSMasahiro Yamada }; 757*2001a81cSMasahiro Yamada 758*2001a81cSMasahiro Yamada usb1_hsphy1: hs-phy@210 { 759*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-hsphy"; 760*2001a81cSMasahiro Yamada reg = <0x210 0x10>; 761*2001a81cSMasahiro Yamada #phy-cells = <0>; 762*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 763*2001a81cSMasahiro Yamada clocks = <&sys_clk 15>, <&sys_clk 20>; 764*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 765*2001a81cSMasahiro Yamada resets = <&sys_rst 15>, <&sys_rst 20>; 766*2001a81cSMasahiro Yamada vbus-supply = <&usb1_vbus1>; 767*2001a81cSMasahiro Yamada }; 768*2001a81cSMasahiro Yamada 769*2001a81cSMasahiro Yamada usb1_ssphy0: ss-phy@300 { 770*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-pxs2-usb3-ssphy"; 771*2001a81cSMasahiro Yamada reg = <0x300 0x10>; 772*2001a81cSMasahiro Yamada #phy-cells = <0>; 773*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 774*2001a81cSMasahiro Yamada clocks = <&sys_clk 15>, <&sys_clk 21>; 775*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 776*2001a81cSMasahiro Yamada resets = <&sys_rst 15>, <&sys_rst 21>; 777*2001a81cSMasahiro Yamada vbus-supply = <&usb1_vbus0>; 778*2001a81cSMasahiro Yamada }; 779*2001a81cSMasahiro Yamada }; 780*2001a81cSMasahiro Yamada 781*2001a81cSMasahiro Yamada /* FIXME: U-Boot own node */ 782cd62214dSMasahiro Yamada usb1: usb@65d00000 { 783cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pxs2-dwc3"; 78452159d27SMasahiro Yamada status = "disabled"; 785cd62214dSMasahiro Yamada reg = <0x65d00000 0x1000>; 786cd62214dSMasahiro Yamada #address-cells = <1>; 787cd62214dSMasahiro Yamada #size-cells = <1>; 788cd62214dSMasahiro Yamada ranges; 78952159d27SMasahiro Yamada pinctrl-names = "default"; 79052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; 791cd62214dSMasahiro Yamada dwc3@65c00000 { 792cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 793cd62214dSMasahiro Yamada reg = <0x65c00000 0x10000>; 794cd62214dSMasahiro Yamada interrupts = <0 137 4>; 7953444d1d4SMasahiro Yamada dr_mode = "host"; 796cd62214dSMasahiro Yamada tx-fifo-resize; 79752159d27SMasahiro Yamada }; 79852159d27SMasahiro Yamada }; 79952159d27SMasahiro Yamada 800cd62214dSMasahiro Yamada nand: nand@68000000 { 8014e7f8de4SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 802cd62214dSMasahiro Yamada status = "disabled"; 803cd62214dSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 804cd62214dSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 805cd62214dSMasahiro Yamada interrupts = <0 65 4>; 806cd62214dSMasahiro Yamada pinctrl-names = "default"; 8076c9e46efSMasahiro Yamada pinctrl-0 = <&pinctrl_nand2cs>; 808*2001a81cSMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 809*2001a81cSMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 810b443fb42SMasahiro Yamada resets = <&sys_rst 2>; 811cd62214dSMasahiro Yamada }; 812cd62214dSMasahiro Yamada }; 81352159d27SMasahiro Yamada}; 81452159d27SMasahiro Yamada 8156c9e46efSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 816