152159d27SMasahiro Yamada/* 252159d27SMasahiro Yamada * Device Tree Source for UniPhier Pro4 SoC 352159d27SMasahiro Yamada * 452159d27SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 552159d27SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 652159d27SMasahiro Yamada * 7d9403001SMasahiro Yamada * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 852159d27SMasahiro Yamada */ 952159d27SMasahiro Yamada 10*b443fb42SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 11*b443fb42SMasahiro Yamada 1252159d27SMasahiro Yamada/ { 1352159d27SMasahiro Yamada compatible = "socionext,uniphier-pro4"; 14f16eda96SMasahiro Yamada #address-cells = <1>; 15f16eda96SMasahiro Yamada #size-cells = <1>; 1652159d27SMasahiro Yamada 1752159d27SMasahiro Yamada cpus { 1852159d27SMasahiro Yamada #address-cells = <1>; 1952159d27SMasahiro Yamada #size-cells = <0>; 2052159d27SMasahiro Yamada 2152159d27SMasahiro Yamada cpu@0 { 2252159d27SMasahiro Yamada device_type = "cpu"; 2352159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 2452159d27SMasahiro Yamada reg = <0>; 2552159d27SMasahiro Yamada enable-method = "psci"; 2652159d27SMasahiro Yamada next-level-cache = <&l2>; 2752159d27SMasahiro Yamada }; 2852159d27SMasahiro Yamada 2952159d27SMasahiro Yamada cpu@1 { 3052159d27SMasahiro Yamada device_type = "cpu"; 3152159d27SMasahiro Yamada compatible = "arm,cortex-a9"; 3252159d27SMasahiro Yamada reg = <1>; 3352159d27SMasahiro Yamada enable-method = "psci"; 3452159d27SMasahiro Yamada next-level-cache = <&l2>; 3552159d27SMasahiro Yamada }; 3652159d27SMasahiro Yamada }; 3752159d27SMasahiro Yamada 38cd62214dSMasahiro Yamada psci { 39cd62214dSMasahiro Yamada compatible = "arm,psci-0.2"; 40cd62214dSMasahiro Yamada method = "smc"; 41cd62214dSMasahiro Yamada }; 42cd62214dSMasahiro Yamada 4352159d27SMasahiro Yamada clocks { 44cd62214dSMasahiro Yamada refclk: ref { 45cd62214dSMasahiro Yamada compatible = "fixed-clock"; 46cd62214dSMasahiro Yamada #clock-cells = <0>; 47cd62214dSMasahiro Yamada clock-frequency = <25000000>; 48cd62214dSMasahiro Yamada }; 49cd62214dSMasahiro Yamada 50*b443fb42SMasahiro Yamada arm_timer_clk: arm-timer { 5152159d27SMasahiro Yamada #clock-cells = <0>; 5252159d27SMasahiro Yamada compatible = "fixed-clock"; 5352159d27SMasahiro Yamada clock-frequency = <50000000>; 5452159d27SMasahiro Yamada }; 5552159d27SMasahiro Yamada }; 5652159d27SMasahiro Yamada 57cd62214dSMasahiro Yamada soc { 58cd62214dSMasahiro Yamada compatible = "simple-bus"; 59cd62214dSMasahiro Yamada #address-cells = <1>; 60cd62214dSMasahiro Yamada #size-cells = <1>; 61cd62214dSMasahiro Yamada ranges; 62cd62214dSMasahiro Yamada interrupt-parent = <&intc>; 6352159d27SMasahiro Yamada 6452159d27SMasahiro Yamada l2: l2-cache@500c0000 { 6552159d27SMasahiro Yamada compatible = "socionext,uniphier-system-cache"; 66cd62214dSMasahiro Yamada reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 67cd62214dSMasahiro Yamada <0x506c0000 0x400>; 6852159d27SMasahiro Yamada interrupts = <0 174 4>, <0 175 4>; 6952159d27SMasahiro Yamada cache-unified; 7052159d27SMasahiro Yamada cache-size = <(768 * 1024)>; 7152159d27SMasahiro Yamada cache-sets = <256>; 7252159d27SMasahiro Yamada cache-line-size = <128>; 7352159d27SMasahiro Yamada cache-level = <2>; 7452159d27SMasahiro Yamada }; 7552159d27SMasahiro Yamada 76cd62214dSMasahiro Yamada serial0: serial@54006800 { 77cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 78cd62214dSMasahiro Yamada status = "disabled"; 79cd62214dSMasahiro Yamada reg = <0x54006800 0x40>; 80cd62214dSMasahiro Yamada interrupts = <0 33 4>; 81cd62214dSMasahiro Yamada pinctrl-names = "default"; 82cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 83cd62214dSMasahiro Yamada clocks = <&peri_clk 0>; 84cd62214dSMasahiro Yamada clock-frequency = <73728000>; 85*b443fb42SMasahiro Yamada resets = <&peri_rst 0>; 86cd62214dSMasahiro Yamada }; 87cd62214dSMasahiro Yamada 88cd62214dSMasahiro Yamada serial1: serial@54006900 { 89cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 90cd62214dSMasahiro Yamada status = "disabled"; 91cd62214dSMasahiro Yamada reg = <0x54006900 0x40>; 92cd62214dSMasahiro Yamada interrupts = <0 35 4>; 93cd62214dSMasahiro Yamada pinctrl-names = "default"; 94cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 95cd62214dSMasahiro Yamada clocks = <&peri_clk 1>; 96cd62214dSMasahiro Yamada clock-frequency = <73728000>; 97*b443fb42SMasahiro Yamada resets = <&peri_rst 1>; 98cd62214dSMasahiro Yamada }; 99cd62214dSMasahiro Yamada 100cd62214dSMasahiro Yamada serial2: serial@54006a00 { 101cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 102cd62214dSMasahiro Yamada status = "disabled"; 103cd62214dSMasahiro Yamada reg = <0x54006a00 0x40>; 104cd62214dSMasahiro Yamada interrupts = <0 37 4>; 105cd62214dSMasahiro Yamada pinctrl-names = "default"; 106cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 107cd62214dSMasahiro Yamada clocks = <&peri_clk 2>; 108cd62214dSMasahiro Yamada clock-frequency = <73728000>; 109*b443fb42SMasahiro Yamada resets = <&peri_rst 2>; 110cd62214dSMasahiro Yamada }; 111cd62214dSMasahiro Yamada 112cd62214dSMasahiro Yamada serial3: serial@54006b00 { 113cd62214dSMasahiro Yamada compatible = "socionext,uniphier-uart"; 114cd62214dSMasahiro Yamada status = "disabled"; 115cd62214dSMasahiro Yamada reg = <0x54006b00 0x40>; 116cd62214dSMasahiro Yamada interrupts = <0 177 4>; 117cd62214dSMasahiro Yamada pinctrl-names = "default"; 118cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 119cd62214dSMasahiro Yamada clocks = <&peri_clk 3>; 120cd62214dSMasahiro Yamada clock-frequency = <73728000>; 121*b443fb42SMasahiro Yamada resets = <&peri_rst 3>; 122cd62214dSMasahiro Yamada }; 123cd62214dSMasahiro Yamada 1240f72b74bSMasahiro Yamada gpio: gpio@55000000 { 12552159d27SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 1260f72b74bSMasahiro Yamada reg = <0x55000000 0x200>; 1270f72b74bSMasahiro Yamada interrupt-parent = <&aidet>; 1280f72b74bSMasahiro Yamada interrupt-controller; 1290f72b74bSMasahiro Yamada #interrupt-cells = <2>; 13052159d27SMasahiro Yamada gpio-controller; 13152159d27SMasahiro Yamada #gpio-cells = <2>; 1320f72b74bSMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>; 1330f72b74bSMasahiro Yamada gpio-ranges-group-names = "gpio_range"; 1340f72b74bSMasahiro Yamada ngpios = <248>; 135*b443fb42SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>; 13652159d27SMasahiro Yamada }; 13752159d27SMasahiro Yamada 13852159d27SMasahiro Yamada i2c0: i2c@58780000 { 13952159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 14052159d27SMasahiro Yamada status = "disabled"; 14152159d27SMasahiro Yamada reg = <0x58780000 0x80>; 14252159d27SMasahiro Yamada #address-cells = <1>; 14352159d27SMasahiro Yamada #size-cells = <0>; 14452159d27SMasahiro Yamada interrupts = <0 41 4>; 14552159d27SMasahiro Yamada pinctrl-names = "default"; 14652159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 147cd62214dSMasahiro Yamada clocks = <&peri_clk 4>; 148*b443fb42SMasahiro Yamada resets = <&peri_rst 4>; 14952159d27SMasahiro Yamada clock-frequency = <100000>; 15052159d27SMasahiro Yamada }; 15152159d27SMasahiro Yamada 15252159d27SMasahiro Yamada i2c1: i2c@58781000 { 15352159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 15452159d27SMasahiro Yamada status = "disabled"; 15552159d27SMasahiro Yamada reg = <0x58781000 0x80>; 15652159d27SMasahiro Yamada #address-cells = <1>; 15752159d27SMasahiro Yamada #size-cells = <0>; 15852159d27SMasahiro Yamada interrupts = <0 42 4>; 15952159d27SMasahiro Yamada pinctrl-names = "default"; 16052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 161cd62214dSMasahiro Yamada clocks = <&peri_clk 5>; 162*b443fb42SMasahiro Yamada resets = <&peri_rst 5>; 16352159d27SMasahiro Yamada clock-frequency = <100000>; 16452159d27SMasahiro Yamada }; 16552159d27SMasahiro Yamada 16652159d27SMasahiro Yamada i2c2: i2c@58782000 { 16752159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 16852159d27SMasahiro Yamada status = "disabled"; 16952159d27SMasahiro Yamada reg = <0x58782000 0x80>; 17052159d27SMasahiro Yamada #address-cells = <1>; 17152159d27SMasahiro Yamada #size-cells = <0>; 17252159d27SMasahiro Yamada interrupts = <0 43 4>; 17352159d27SMasahiro Yamada pinctrl-names = "default"; 17452159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c2>; 175cd62214dSMasahiro Yamada clocks = <&peri_clk 6>; 176*b443fb42SMasahiro Yamada resets = <&peri_rst 6>; 17752159d27SMasahiro Yamada clock-frequency = <100000>; 17852159d27SMasahiro Yamada }; 17952159d27SMasahiro Yamada 18052159d27SMasahiro Yamada i2c3: i2c@58783000 { 18152159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 18252159d27SMasahiro Yamada status = "disabled"; 18352159d27SMasahiro Yamada reg = <0x58783000 0x80>; 18452159d27SMasahiro Yamada #address-cells = <1>; 18552159d27SMasahiro Yamada #size-cells = <0>; 18652159d27SMasahiro Yamada interrupts = <0 44 4>; 18752159d27SMasahiro Yamada pinctrl-names = "default"; 18852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 189cd62214dSMasahiro Yamada clocks = <&peri_clk 7>; 190*b443fb42SMasahiro Yamada resets = <&peri_rst 7>; 19152159d27SMasahiro Yamada clock-frequency = <100000>; 19252159d27SMasahiro Yamada }; 19352159d27SMasahiro Yamada 19452159d27SMasahiro Yamada /* i2c4 does not exist */ 19552159d27SMasahiro Yamada 19652159d27SMasahiro Yamada /* chip-internal connection for DMD */ 19752159d27SMasahiro Yamada i2c5: i2c@58785000 { 19852159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 19952159d27SMasahiro Yamada reg = <0x58785000 0x80>; 20052159d27SMasahiro Yamada #address-cells = <1>; 20152159d27SMasahiro Yamada #size-cells = <0>; 20252159d27SMasahiro Yamada interrupts = <0 25 4>; 203cd62214dSMasahiro Yamada clocks = <&peri_clk 9>; 204*b443fb42SMasahiro Yamada resets = <&peri_rst 9>; 20552159d27SMasahiro Yamada clock-frequency = <400000>; 20652159d27SMasahiro Yamada }; 20752159d27SMasahiro Yamada 20852159d27SMasahiro Yamada /* chip-internal connection for HDMI */ 20952159d27SMasahiro Yamada i2c6: i2c@58786000 { 21052159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 21152159d27SMasahiro Yamada reg = <0x58786000 0x80>; 21252159d27SMasahiro Yamada #address-cells = <1>; 21352159d27SMasahiro Yamada #size-cells = <0>; 21452159d27SMasahiro Yamada interrupts = <0 26 4>; 215cd62214dSMasahiro Yamada clocks = <&peri_clk 10>; 216*b443fb42SMasahiro Yamada resets = <&peri_rst 10>; 21752159d27SMasahiro Yamada clock-frequency = <400000>; 21852159d27SMasahiro Yamada }; 21952159d27SMasahiro Yamada 220cd62214dSMasahiro Yamada system_bus: system-bus@58c00000 { 221cd62214dSMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 222cd62214dSMasahiro Yamada status = "disabled"; 223cd62214dSMasahiro Yamada reg = <0x58c00000 0x400>; 224cd62214dSMasahiro Yamada #address-cells = <2>; 225cd62214dSMasahiro Yamada #size-cells = <1>; 226cd62214dSMasahiro Yamada pinctrl-names = "default"; 227cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 228cd62214dSMasahiro Yamada }; 229cd62214dSMasahiro Yamada 230abb6ac25SMasahiro Yamada smpctrl@59801000 { 231cd62214dSMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 232cd62214dSMasahiro Yamada reg = <0x59801000 0x400>; 233cd62214dSMasahiro Yamada }; 234cd62214dSMasahiro Yamada 235cd62214dSMasahiro Yamada mioctrl@59810000 { 236cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-mioctrl", 237cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 238cd62214dSMasahiro Yamada reg = <0x59810000 0x800>; 239cd62214dSMasahiro Yamada 240cd62214dSMasahiro Yamada mio_clk: clock { 241cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-mio-clock"; 242cd62214dSMasahiro Yamada #clock-cells = <1>; 243cd62214dSMasahiro Yamada }; 244cd62214dSMasahiro Yamada 245cd62214dSMasahiro Yamada mio_rst: reset { 246cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-mio-reset"; 247cd62214dSMasahiro Yamada #reset-cells = <1>; 248cd62214dSMasahiro Yamada }; 249cd62214dSMasahiro Yamada }; 250cd62214dSMasahiro Yamada 251cd62214dSMasahiro Yamada perictrl@59820000 { 252cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-perictrl", 253cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 254cd62214dSMasahiro Yamada reg = <0x59820000 0x200>; 255cd62214dSMasahiro Yamada 256cd62214dSMasahiro Yamada peri_clk: clock { 257cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-peri-clock"; 258cd62214dSMasahiro Yamada #clock-cells = <1>; 259cd62214dSMasahiro Yamada }; 260cd62214dSMasahiro Yamada 261cd62214dSMasahiro Yamada peri_rst: reset { 262cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-peri-reset"; 263cd62214dSMasahiro Yamada #reset-cells = <1>; 264cd62214dSMasahiro Yamada }; 265cd62214dSMasahiro Yamada }; 266cd62214dSMasahiro Yamada 26752159d27SMasahiro Yamada sd: sdhc@5a400000 { 26852159d27SMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 26952159d27SMasahiro Yamada status = "disabled"; 27052159d27SMasahiro Yamada reg = <0x5a400000 0x200>; 27152159d27SMasahiro Yamada interrupts = <0 76 4>; 27252159d27SMasahiro Yamada pinctrl-names = "default", "1.8v"; 27352159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 27452159d27SMasahiro Yamada pinctrl-1 = <&pinctrl_sd_1v8>; 27552159d27SMasahiro Yamada clocks = <&mio_clk 0>; 27652159d27SMasahiro Yamada reset-names = "host", "bridge"; 27752159d27SMasahiro Yamada resets = <&mio_rst 0>, <&mio_rst 3>; 27852159d27SMasahiro Yamada bus-width = <4>; 279cd62214dSMasahiro Yamada cap-sd-highspeed; 280cd62214dSMasahiro Yamada sd-uhs-sdr12; 281cd62214dSMasahiro Yamada sd-uhs-sdr25; 282cd62214dSMasahiro Yamada sd-uhs-sdr50; 28352159d27SMasahiro Yamada }; 28452159d27SMasahiro Yamada 28552159d27SMasahiro Yamada emmc: sdhc@5a500000 { 28652159d27SMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 28752159d27SMasahiro Yamada status = "disabled"; 28852159d27SMasahiro Yamada reg = <0x5a500000 0x200>; 28952159d27SMasahiro Yamada interrupts = <0 78 4>; 29052159d27SMasahiro Yamada pinctrl-names = "default", "1.8v"; 29152159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 29252159d27SMasahiro Yamada pinctrl-1 = <&pinctrl_emmc_1v8>; 29352159d27SMasahiro Yamada clocks = <&mio_clk 1>; 294cd62214dSMasahiro Yamada reset-names = "host", "bridge"; 295cd62214dSMasahiro Yamada resets = <&mio_rst 1>, <&mio_rst 4>; 29652159d27SMasahiro Yamada bus-width = <8>; 29752159d27SMasahiro Yamada non-removable; 298cd62214dSMasahiro Yamada cap-mmc-highspeed; 299cd62214dSMasahiro Yamada cap-mmc-hw-reset; 30052159d27SMasahiro Yamada }; 30152159d27SMasahiro Yamada 30252159d27SMasahiro Yamada sd1: sdhc@5a600000 { 30352159d27SMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 30452159d27SMasahiro Yamada status = "disabled"; 30552159d27SMasahiro Yamada reg = <0x5a600000 0x200>; 30652159d27SMasahiro Yamada interrupts = <0 85 4>; 30752159d27SMasahiro Yamada pinctrl-names = "default", "1.8v"; 30852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_sd1>; 30952159d27SMasahiro Yamada pinctrl-1 = <&pinctrl_sd1_1v8>; 31052159d27SMasahiro Yamada clocks = <&mio_clk 2>; 31152159d27SMasahiro Yamada resets = <&mio_rst 2>, <&mio_rst 5>; 31252159d27SMasahiro Yamada bus-width = <4>; 313cd62214dSMasahiro Yamada cap-sd-highspeed; 314cd62214dSMasahiro Yamada sd-uhs-sdr12; 315cd62214dSMasahiro Yamada sd-uhs-sdr25; 316cd62214dSMasahiro Yamada sd-uhs-sdr50; 31752159d27SMasahiro Yamada }; 31852159d27SMasahiro Yamada 31952159d27SMasahiro Yamada usb2: usb@5a800100 { 32052159d27SMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 32152159d27SMasahiro Yamada status = "disabled"; 32252159d27SMasahiro Yamada reg = <0x5a800100 0x100>; 32352159d27SMasahiro Yamada interrupts = <0 80 4>; 32452159d27SMasahiro Yamada pinctrl-names = "default"; 32552159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_usb2>; 326*b443fb42SMasahiro Yamada clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, 327*b443fb42SMasahiro Yamada <&mio_clk 12>; 32852159d27SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, 32952159d27SMasahiro Yamada <&mio_rst 12>; 33052159d27SMasahiro Yamada }; 33152159d27SMasahiro Yamada 33252159d27SMasahiro Yamada usb3: usb@5a810100 { 33352159d27SMasahiro Yamada compatible = "socionext,uniphier-ehci", "generic-ehci"; 33452159d27SMasahiro Yamada status = "disabled"; 33552159d27SMasahiro Yamada reg = <0x5a810100 0x100>; 33652159d27SMasahiro Yamada interrupts = <0 81 4>; 33752159d27SMasahiro Yamada pinctrl-names = "default"; 33852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_usb3>; 339*b443fb42SMasahiro Yamada clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, 340*b443fb42SMasahiro Yamada <&mio_clk 13>; 34152159d27SMasahiro Yamada resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, 34252159d27SMasahiro Yamada <&mio_rst 13>; 34352159d27SMasahiro Yamada }; 34452159d27SMasahiro Yamada 345cd62214dSMasahiro Yamada soc-glue@5f800000 { 346cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-soc-glue", 347cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 348cd62214dSMasahiro Yamada reg = <0x5f800000 0x2000>; 349cd62214dSMasahiro Yamada 350cd62214dSMasahiro Yamada pinctrl: pinctrl { 351cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-pinctrl"; 352cd62214dSMasahiro Yamada }; 353cd62214dSMasahiro Yamada }; 354cd62214dSMasahiro Yamada 3556c9e46efSMasahiro Yamada aidet: aidet@5fc20000 { 3566c9e46efSMasahiro Yamada compatible = "socionext,uniphier-pro4-aidet"; 35752159d27SMasahiro Yamada reg = <0x5fc20000 0x200>; 3586c9e46efSMasahiro Yamada interrupt-controller; 3596c9e46efSMasahiro Yamada #interrupt-cells = <2>; 36052159d27SMasahiro Yamada }; 36152159d27SMasahiro Yamada 362cd62214dSMasahiro Yamada timer@60000200 { 363cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-global-timer"; 364cd62214dSMasahiro Yamada reg = <0x60000200 0x20>; 365cd62214dSMasahiro Yamada interrupts = <1 11 0x304>; 366cd62214dSMasahiro Yamada clocks = <&arm_timer_clk>; 367cd62214dSMasahiro Yamada }; 368cd62214dSMasahiro Yamada 369cd62214dSMasahiro Yamada timer@60000600 { 370cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-twd-timer"; 371cd62214dSMasahiro Yamada reg = <0x60000600 0x20>; 372cd62214dSMasahiro Yamada interrupts = <1 13 0x304>; 373cd62214dSMasahiro Yamada clocks = <&arm_timer_clk>; 374cd62214dSMasahiro Yamada }; 375cd62214dSMasahiro Yamada 376cd62214dSMasahiro Yamada intc: interrupt-controller@60001000 { 377cd62214dSMasahiro Yamada compatible = "arm,cortex-a9-gic"; 378cd62214dSMasahiro Yamada reg = <0x60001000 0x1000>, 379cd62214dSMasahiro Yamada <0x60000100 0x100>; 380cd62214dSMasahiro Yamada #interrupt-cells = <3>; 381cd62214dSMasahiro Yamada interrupt-controller; 382cd62214dSMasahiro Yamada }; 383cd62214dSMasahiro Yamada 384cd62214dSMasahiro Yamada sysctrl@61840000 { 385cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-sysctrl", 386cd62214dSMasahiro Yamada "simple-mfd", "syscon"; 387cd62214dSMasahiro Yamada reg = <0x61840000 0x10000>; 388cd62214dSMasahiro Yamada 389cd62214dSMasahiro Yamada sys_clk: clock { 390cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-clock"; 391cd62214dSMasahiro Yamada #clock-cells = <1>; 392cd62214dSMasahiro Yamada }; 393cd62214dSMasahiro Yamada 394cd62214dSMasahiro Yamada sys_rst: reset { 395cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-reset"; 396cd62214dSMasahiro Yamada #reset-cells = <1>; 397cd62214dSMasahiro Yamada }; 398cd62214dSMasahiro Yamada }; 399cd62214dSMasahiro Yamada 400cd62214dSMasahiro Yamada usb0: usb@65b00000 { 401cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-dwc3"; 40252159d27SMasahiro Yamada status = "disabled"; 403cd62214dSMasahiro Yamada reg = <0x65b00000 0x1000>; 404cd62214dSMasahiro Yamada #address-cells = <1>; 405cd62214dSMasahiro Yamada #size-cells = <1>; 406cd62214dSMasahiro Yamada ranges; 40752159d27SMasahiro Yamada pinctrl-names = "default"; 40852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>; 409cd62214dSMasahiro Yamada dwc3@65a00000 { 410cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 411cd62214dSMasahiro Yamada reg = <0x65a00000 0x10000>; 412cd62214dSMasahiro Yamada interrupts = <0 134 4>; 4133444d1d4SMasahiro Yamada dr_mode = "host"; 414cd62214dSMasahiro Yamada tx-fifo-resize; 415cd62214dSMasahiro Yamada }; 41652159d27SMasahiro Yamada }; 41752159d27SMasahiro Yamada 418cd62214dSMasahiro Yamada usb1: usb@65d00000 { 419cd62214dSMasahiro Yamada compatible = "socionext,uniphier-pro4-dwc3"; 42052159d27SMasahiro Yamada status = "disabled"; 421cd62214dSMasahiro Yamada reg = <0x65d00000 0x1000>; 422cd62214dSMasahiro Yamada #address-cells = <1>; 423cd62214dSMasahiro Yamada #size-cells = <1>; 424cd62214dSMasahiro Yamada ranges; 42552159d27SMasahiro Yamada pinctrl-names = "default"; 42652159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_usb1>; 427cd62214dSMasahiro Yamada dwc3@65c00000 { 428cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 429cd62214dSMasahiro Yamada reg = <0x65c00000 0x10000>; 430cd62214dSMasahiro Yamada interrupts = <0 137 4>; 4313444d1d4SMasahiro Yamada dr_mode = "host"; 432cd62214dSMasahiro Yamada tx-fifo-resize; 43352159d27SMasahiro Yamada }; 43452159d27SMasahiro Yamada }; 43552159d27SMasahiro Yamada 436cd62214dSMasahiro Yamada nand: nand@68000000 { 437abb6ac25SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5a"; 438cd62214dSMasahiro Yamada status = "disabled"; 439cd62214dSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 440cd62214dSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 441cd62214dSMasahiro Yamada interrupts = <0 65 4>; 442cd62214dSMasahiro Yamada pinctrl-names = "default"; 443cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 444cd62214dSMasahiro Yamada clocks = <&sys_clk 2>; 445*b443fb42SMasahiro Yamada resets = <&sys_rst 2>; 446cd62214dSMasahiro Yamada }; 447cd62214dSMasahiro Yamada }; 44852159d27SMasahiro Yamada}; 44952159d27SMasahiro Yamada 4506c9e46efSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 451