152159d27SMasahiro Yamada/* 252159d27SMasahiro Yamada * Device Tree Source for UniPhier LD20 SoC 352159d27SMasahiro Yamada * 452159d27SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 552159d27SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 652159d27SMasahiro Yamada * 7*4e7f8de4SMasahiro Yamada * This file is dual-licensed: you can use it either under the terms 8*4e7f8de4SMasahiro Yamada * of the GPL or the X11 license, at your option. Note that this dual 9*4e7f8de4SMasahiro Yamada * licensing only applies to this file, and not this project as a 10*4e7f8de4SMasahiro Yamada * whole. 11*4e7f8de4SMasahiro Yamada * 12*4e7f8de4SMasahiro Yamada * a) This file is free software; you can redistribute it and/or 13*4e7f8de4SMasahiro Yamada * modify it under the terms of the GNU General Public License as 14*4e7f8de4SMasahiro Yamada * published by the Free Software Foundation; either version 2 of the 15*4e7f8de4SMasahiro Yamada * License, or (at your option) any later version. 16*4e7f8de4SMasahiro Yamada * 17*4e7f8de4SMasahiro Yamada * This file is distributed in the hope that it will be useful, 18*4e7f8de4SMasahiro Yamada * but WITHOUT ANY WARRANTY; without even the implied warranty of 19*4e7f8de4SMasahiro Yamada * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20*4e7f8de4SMasahiro Yamada * GNU General Public License for more details. 21*4e7f8de4SMasahiro Yamada * 22*4e7f8de4SMasahiro Yamada * Or, alternatively, 23*4e7f8de4SMasahiro Yamada * 24*4e7f8de4SMasahiro Yamada * b) Permission is hereby granted, free of charge, to any person 25*4e7f8de4SMasahiro Yamada * obtaining a copy of this software and associated documentation 26*4e7f8de4SMasahiro Yamada * files (the "Software"), to deal in the Software without 27*4e7f8de4SMasahiro Yamada * restriction, including without limitation the rights to use, 28*4e7f8de4SMasahiro Yamada * copy, modify, merge, publish, distribute, sublicense, and/or 29*4e7f8de4SMasahiro Yamada * sell copies of the Software, and to permit persons to whom the 30*4e7f8de4SMasahiro Yamada * Software is furnished to do so, subject to the following 31*4e7f8de4SMasahiro Yamada * conditions: 32*4e7f8de4SMasahiro Yamada * 33*4e7f8de4SMasahiro Yamada * The above copyright notice and this permission notice shall be 34*4e7f8de4SMasahiro Yamada * included in all copies or substantial portions of the Software. 35*4e7f8de4SMasahiro Yamada * 36*4e7f8de4SMasahiro Yamada * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 37*4e7f8de4SMasahiro Yamada * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 38*4e7f8de4SMasahiro Yamada * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 39*4e7f8de4SMasahiro Yamada * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 40*4e7f8de4SMasahiro Yamada * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 41*4e7f8de4SMasahiro Yamada * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 42*4e7f8de4SMasahiro Yamada * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 43*4e7f8de4SMasahiro Yamada * OTHER DEALINGS IN THE SOFTWARE. 4452159d27SMasahiro Yamada */ 4552159d27SMasahiro Yamada 46cd62214dSMasahiro Yamada/memreserve/ 0x80000000 0x00080000; 4752159d27SMasahiro Yamada 4852159d27SMasahiro Yamada/ { 4952159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 5052159d27SMasahiro Yamada #address-cells = <2>; 5152159d27SMasahiro Yamada #size-cells = <2>; 5252159d27SMasahiro Yamada interrupt-parent = <&gic>; 5352159d27SMasahiro Yamada 5452159d27SMasahiro Yamada cpus { 5552159d27SMasahiro Yamada #address-cells = <2>; 5652159d27SMasahiro Yamada #size-cells = <0>; 5752159d27SMasahiro Yamada 5852159d27SMasahiro Yamada cpu-map { 5952159d27SMasahiro Yamada cluster0 { 6052159d27SMasahiro Yamada core0 { 6152159d27SMasahiro Yamada cpu = <&cpu0>; 6252159d27SMasahiro Yamada }; 6352159d27SMasahiro Yamada core1 { 6452159d27SMasahiro Yamada cpu = <&cpu1>; 6552159d27SMasahiro Yamada }; 6652159d27SMasahiro Yamada }; 6752159d27SMasahiro Yamada 6852159d27SMasahiro Yamada cluster1 { 6952159d27SMasahiro Yamada core0 { 7052159d27SMasahiro Yamada cpu = <&cpu2>; 7152159d27SMasahiro Yamada }; 7252159d27SMasahiro Yamada core1 { 7352159d27SMasahiro Yamada cpu = <&cpu3>; 7452159d27SMasahiro Yamada }; 7552159d27SMasahiro Yamada }; 7652159d27SMasahiro Yamada }; 7752159d27SMasahiro Yamada 7852159d27SMasahiro Yamada cpu0: cpu@0 { 7952159d27SMasahiro Yamada device_type = "cpu"; 8052159d27SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 8152159d27SMasahiro Yamada reg = <0 0x000>; 82cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 83cd62214dSMasahiro Yamada enable-method = "psci"; 84cd62214dSMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 8552159d27SMasahiro Yamada }; 8652159d27SMasahiro Yamada 8752159d27SMasahiro Yamada cpu1: cpu@1 { 8852159d27SMasahiro Yamada device_type = "cpu"; 8952159d27SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 9052159d27SMasahiro Yamada reg = <0 0x001>; 91cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 92cd62214dSMasahiro Yamada enable-method = "psci"; 93cd62214dSMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 9452159d27SMasahiro Yamada }; 9552159d27SMasahiro Yamada 9652159d27SMasahiro Yamada cpu2: cpu@100 { 9752159d27SMasahiro Yamada device_type = "cpu"; 9852159d27SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 9952159d27SMasahiro Yamada reg = <0 0x100>; 100cd62214dSMasahiro Yamada clocks = <&sys_clk 33>; 101cd62214dSMasahiro Yamada enable-method = "psci"; 102cd62214dSMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 10352159d27SMasahiro Yamada }; 10452159d27SMasahiro Yamada 10552159d27SMasahiro Yamada cpu3: cpu@101 { 10652159d27SMasahiro Yamada device_type = "cpu"; 10752159d27SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 10852159d27SMasahiro Yamada reg = <0 0x101>; 109cd62214dSMasahiro Yamada clocks = <&sys_clk 33>; 110cd62214dSMasahiro Yamada enable-method = "psci"; 111cd62214dSMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 11252159d27SMasahiro Yamada }; 11352159d27SMasahiro Yamada }; 11452159d27SMasahiro Yamada 115cd62214dSMasahiro Yamada cluster0_opp: opp_table0 { 116cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 117cd62214dSMasahiro Yamada opp-shared; 118cd62214dSMasahiro Yamada 119*4e7f8de4SMasahiro Yamada opp-250000000 { 120cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 121cd62214dSMasahiro Yamada clock-latency-ns = <300>; 122cd62214dSMasahiro Yamada }; 123*4e7f8de4SMasahiro Yamada opp-275000000 { 124cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 125cd62214dSMasahiro Yamada clock-latency-ns = <300>; 126cd62214dSMasahiro Yamada }; 127*4e7f8de4SMasahiro Yamada opp-500000000 { 128cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 129cd62214dSMasahiro Yamada clock-latency-ns = <300>; 130cd62214dSMasahiro Yamada }; 131*4e7f8de4SMasahiro Yamada opp-550000000 { 132cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 133cd62214dSMasahiro Yamada clock-latency-ns = <300>; 134cd62214dSMasahiro Yamada }; 135*4e7f8de4SMasahiro Yamada opp-666667000 { 136cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 137cd62214dSMasahiro Yamada clock-latency-ns = <300>; 138cd62214dSMasahiro Yamada }; 139*4e7f8de4SMasahiro Yamada opp-733334000 { 140cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 141cd62214dSMasahiro Yamada clock-latency-ns = <300>; 142cd62214dSMasahiro Yamada }; 143*4e7f8de4SMasahiro Yamada opp-1000000000 { 144cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 145cd62214dSMasahiro Yamada clock-latency-ns = <300>; 146cd62214dSMasahiro Yamada }; 147*4e7f8de4SMasahiro Yamada opp-1100000000 { 148cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 149cd62214dSMasahiro Yamada clock-latency-ns = <300>; 150cd62214dSMasahiro Yamada }; 151cd62214dSMasahiro Yamada }; 152cd62214dSMasahiro Yamada 153cd62214dSMasahiro Yamada cluster1_opp: opp_table1 { 154cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 155cd62214dSMasahiro Yamada opp-shared; 156cd62214dSMasahiro Yamada 157*4e7f8de4SMasahiro Yamada opp-250000000 { 158cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 159cd62214dSMasahiro Yamada clock-latency-ns = <300>; 160cd62214dSMasahiro Yamada }; 161*4e7f8de4SMasahiro Yamada opp-275000000 { 162cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 163cd62214dSMasahiro Yamada clock-latency-ns = <300>; 164cd62214dSMasahiro Yamada }; 165*4e7f8de4SMasahiro Yamada opp-500000000 { 166cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 167cd62214dSMasahiro Yamada clock-latency-ns = <300>; 168cd62214dSMasahiro Yamada }; 169*4e7f8de4SMasahiro Yamada opp-550000000 { 170cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 171cd62214dSMasahiro Yamada clock-latency-ns = <300>; 172cd62214dSMasahiro Yamada }; 173*4e7f8de4SMasahiro Yamada opp-666667000 { 174cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 175cd62214dSMasahiro Yamada clock-latency-ns = <300>; 176cd62214dSMasahiro Yamada }; 177*4e7f8de4SMasahiro Yamada opp-733334000 { 178cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 179cd62214dSMasahiro Yamada clock-latency-ns = <300>; 180cd62214dSMasahiro Yamada }; 181*4e7f8de4SMasahiro Yamada opp-1000000000 { 182cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 183cd62214dSMasahiro Yamada clock-latency-ns = <300>; 184cd62214dSMasahiro Yamada }; 185*4e7f8de4SMasahiro Yamada opp-1100000000 { 186cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 187cd62214dSMasahiro Yamada clock-latency-ns = <300>; 188cd62214dSMasahiro Yamada }; 189cd62214dSMasahiro Yamada }; 190cd62214dSMasahiro Yamada 191cd62214dSMasahiro Yamada psci { 192cd62214dSMasahiro Yamada compatible = "arm,psci-1.0"; 193cd62214dSMasahiro Yamada method = "smc"; 194cd62214dSMasahiro Yamada }; 195cd62214dSMasahiro Yamada 19652159d27SMasahiro Yamada clocks { 19752159d27SMasahiro Yamada refclk: ref { 19852159d27SMasahiro Yamada compatible = "fixed-clock"; 19952159d27SMasahiro Yamada #clock-cells = <0>; 20052159d27SMasahiro Yamada clock-frequency = <25000000>; 20152159d27SMasahiro Yamada }; 20252159d27SMasahiro Yamada }; 20352159d27SMasahiro Yamada 20452159d27SMasahiro Yamada timer { 20552159d27SMasahiro Yamada compatible = "arm,armv8-timer"; 20652159d27SMasahiro Yamada interrupts = <1 13 4>, 20752159d27SMasahiro Yamada <1 14 4>, 20852159d27SMasahiro Yamada <1 11 4>, 20952159d27SMasahiro Yamada <1 10 4>; 21052159d27SMasahiro Yamada }; 21152159d27SMasahiro Yamada 2127ad79c12SMasahiro Yamada soc@0 { 21352159d27SMasahiro Yamada compatible = "simple-bus"; 21452159d27SMasahiro Yamada #address-cells = <1>; 21552159d27SMasahiro Yamada #size-cells = <1>; 21652159d27SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 21752159d27SMasahiro Yamada u-boot,dm-pre-reloc; 21852159d27SMasahiro Yamada 21952159d27SMasahiro Yamada serial0: serial@54006800 { 22052159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 22152159d27SMasahiro Yamada status = "disabled"; 22252159d27SMasahiro Yamada reg = <0x54006800 0x40>; 22352159d27SMasahiro Yamada interrupts = <0 33 4>; 22452159d27SMasahiro Yamada pinctrl-names = "default"; 22552159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 22652159d27SMasahiro Yamada clocks = <&peri_clk 0>; 22752159d27SMasahiro Yamada clock-frequency = <58820000>; 22852159d27SMasahiro Yamada }; 22952159d27SMasahiro Yamada 23052159d27SMasahiro Yamada serial1: serial@54006900 { 23152159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 23252159d27SMasahiro Yamada status = "disabled"; 23352159d27SMasahiro Yamada reg = <0x54006900 0x40>; 23452159d27SMasahiro Yamada interrupts = <0 35 4>; 23552159d27SMasahiro Yamada pinctrl-names = "default"; 23652159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 23752159d27SMasahiro Yamada clocks = <&peri_clk 1>; 23852159d27SMasahiro Yamada clock-frequency = <58820000>; 23952159d27SMasahiro Yamada }; 24052159d27SMasahiro Yamada 24152159d27SMasahiro Yamada serial2: serial@54006a00 { 24252159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 24352159d27SMasahiro Yamada status = "disabled"; 24452159d27SMasahiro Yamada reg = <0x54006a00 0x40>; 24552159d27SMasahiro Yamada interrupts = <0 37 4>; 24652159d27SMasahiro Yamada pinctrl-names = "default"; 24752159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 24852159d27SMasahiro Yamada clocks = <&peri_clk 2>; 24952159d27SMasahiro Yamada clock-frequency = <58820000>; 25052159d27SMasahiro Yamada }; 25152159d27SMasahiro Yamada 25252159d27SMasahiro Yamada serial3: serial@54006b00 { 25352159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 25452159d27SMasahiro Yamada status = "disabled"; 25552159d27SMasahiro Yamada reg = <0x54006b00 0x40>; 25652159d27SMasahiro Yamada interrupts = <0 177 4>; 25752159d27SMasahiro Yamada pinctrl-names = "default"; 25852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 25952159d27SMasahiro Yamada clocks = <&peri_clk 3>; 26052159d27SMasahiro Yamada clock-frequency = <58820000>; 26152159d27SMasahiro Yamada }; 26252159d27SMasahiro Yamada 26352159d27SMasahiro Yamada i2c0: i2c@58780000 { 26452159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 26552159d27SMasahiro Yamada status = "disabled"; 26652159d27SMasahiro Yamada reg = <0x58780000 0x80>; 26752159d27SMasahiro Yamada #address-cells = <1>; 26852159d27SMasahiro Yamada #size-cells = <0>; 26952159d27SMasahiro Yamada interrupts = <0 41 4>; 27052159d27SMasahiro Yamada pinctrl-names = "default"; 27152159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 272cd62214dSMasahiro Yamada clocks = <&peri_clk 4>; 27352159d27SMasahiro Yamada clock-frequency = <100000>; 27452159d27SMasahiro Yamada }; 27552159d27SMasahiro Yamada 27652159d27SMasahiro Yamada i2c1: i2c@58781000 { 27752159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 27852159d27SMasahiro Yamada status = "disabled"; 27952159d27SMasahiro Yamada reg = <0x58781000 0x80>; 28052159d27SMasahiro Yamada #address-cells = <1>; 28152159d27SMasahiro Yamada #size-cells = <0>; 28252159d27SMasahiro Yamada interrupts = <0 42 4>; 28352159d27SMasahiro Yamada pinctrl-names = "default"; 28452159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 285cd62214dSMasahiro Yamada clocks = <&peri_clk 5>; 28652159d27SMasahiro Yamada clock-frequency = <100000>; 28752159d27SMasahiro Yamada }; 28852159d27SMasahiro Yamada 28952159d27SMasahiro Yamada i2c2: i2c@58782000 { 29052159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 29152159d27SMasahiro Yamada reg = <0x58782000 0x80>; 29252159d27SMasahiro Yamada #address-cells = <1>; 29352159d27SMasahiro Yamada #size-cells = <0>; 29452159d27SMasahiro Yamada interrupts = <0 43 4>; 295cd62214dSMasahiro Yamada clocks = <&peri_clk 6>; 29652159d27SMasahiro Yamada clock-frequency = <400000>; 29752159d27SMasahiro Yamada }; 29852159d27SMasahiro Yamada 29952159d27SMasahiro Yamada i2c3: i2c@58783000 { 30052159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 30152159d27SMasahiro Yamada status = "disabled"; 30252159d27SMasahiro Yamada reg = <0x58783000 0x80>; 30352159d27SMasahiro Yamada #address-cells = <1>; 30452159d27SMasahiro Yamada #size-cells = <0>; 30552159d27SMasahiro Yamada interrupts = <0 44 4>; 30652159d27SMasahiro Yamada pinctrl-names = "default"; 30752159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 308cd62214dSMasahiro Yamada clocks = <&peri_clk 7>; 30952159d27SMasahiro Yamada clock-frequency = <100000>; 31052159d27SMasahiro Yamada }; 31152159d27SMasahiro Yamada 31252159d27SMasahiro Yamada i2c4: i2c@58784000 { 31352159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 31452159d27SMasahiro Yamada status = "disabled"; 31552159d27SMasahiro Yamada reg = <0x58784000 0x80>; 31652159d27SMasahiro Yamada #address-cells = <1>; 31752159d27SMasahiro Yamada #size-cells = <0>; 31852159d27SMasahiro Yamada interrupts = <0 45 4>; 31952159d27SMasahiro Yamada pinctrl-names = "default"; 32052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 321cd62214dSMasahiro Yamada clocks = <&peri_clk 8>; 32252159d27SMasahiro Yamada clock-frequency = <100000>; 32352159d27SMasahiro Yamada }; 32452159d27SMasahiro Yamada 32552159d27SMasahiro Yamada i2c5: i2c@58785000 { 32652159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 32752159d27SMasahiro Yamada reg = <0x58785000 0x80>; 32852159d27SMasahiro Yamada #address-cells = <1>; 32952159d27SMasahiro Yamada #size-cells = <0>; 33052159d27SMasahiro Yamada interrupts = <0 25 4>; 331cd62214dSMasahiro Yamada clocks = <&peri_clk 9>; 33252159d27SMasahiro Yamada clock-frequency = <400000>; 33352159d27SMasahiro Yamada }; 33452159d27SMasahiro Yamada 33552159d27SMasahiro Yamada system_bus: system-bus@58c00000 { 33652159d27SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 33752159d27SMasahiro Yamada status = "disabled"; 33852159d27SMasahiro Yamada reg = <0x58c00000 0x400>; 33952159d27SMasahiro Yamada #address-cells = <2>; 34052159d27SMasahiro Yamada #size-cells = <1>; 34152159d27SMasahiro Yamada pinctrl-names = "default"; 34252159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 34352159d27SMasahiro Yamada }; 34452159d27SMasahiro Yamada 34552159d27SMasahiro Yamada smpctrl@59800000 { 34652159d27SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 34752159d27SMasahiro Yamada reg = <0x59801000 0x400>; 34852159d27SMasahiro Yamada }; 34952159d27SMasahiro Yamada 350cd62214dSMasahiro Yamada sdctrl@59810000 { 351cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 35252159d27SMasahiro Yamada "simple-mfd", "syscon"; 35352159d27SMasahiro Yamada reg = <0x59810000 0x800>; 35452159d27SMasahiro Yamada 355cd62214dSMasahiro Yamada sd_clk: clock { 356cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 35752159d27SMasahiro Yamada #clock-cells = <1>; 35852159d27SMasahiro Yamada }; 35952159d27SMasahiro Yamada 360cd62214dSMasahiro Yamada sd_rst: reset { 361cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 36252159d27SMasahiro Yamada #reset-cells = <1>; 36352159d27SMasahiro Yamada }; 36452159d27SMasahiro Yamada }; 36552159d27SMasahiro Yamada 36652159d27SMasahiro Yamada perictrl@59820000 { 367cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 36852159d27SMasahiro Yamada "simple-mfd", "syscon"; 36952159d27SMasahiro Yamada reg = <0x59820000 0x200>; 37052159d27SMasahiro Yamada 37152159d27SMasahiro Yamada peri_clk: clock { 37252159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 37352159d27SMasahiro Yamada #clock-cells = <1>; 37452159d27SMasahiro Yamada }; 37552159d27SMasahiro Yamada 37652159d27SMasahiro Yamada peri_rst: reset { 37752159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 37852159d27SMasahiro Yamada #reset-cells = <1>; 37952159d27SMasahiro Yamada }; 38052159d27SMasahiro Yamada }; 38152159d27SMasahiro Yamada 382cd62214dSMasahiro Yamada emmc: sdhc@5a000000 { 3837a6139c9SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 384cd62214dSMasahiro Yamada reg = <0x5a000000 0x400>; 385cd62214dSMasahiro Yamada interrupts = <0 78 4>; 386cd62214dSMasahiro Yamada pinctrl-names = "default"; 387cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_emmc_1v8>; 388cd62214dSMasahiro Yamada clocks = <&sys_clk 4>; 389cd62214dSMasahiro Yamada bus-width = <8>; 390cd62214dSMasahiro Yamada mmc-ddr-1_8v; 391cd62214dSMasahiro Yamada mmc-hs200-1_8v; 392*4e7f8de4SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 393*4e7f8de4SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 394*4e7f8de4SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 395*4e7f8de4SMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 396*4e7f8de4SMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 397cd62214dSMasahiro Yamada }; 398cd62214dSMasahiro Yamada 39952159d27SMasahiro Yamada sd: sdhc@5a400000 { 40052159d27SMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 40152159d27SMasahiro Yamada status = "disabled"; 40252159d27SMasahiro Yamada reg = <0x5a400000 0x800>; 40352159d27SMasahiro Yamada interrupts = <0 76 4>; 40452159d27SMasahiro Yamada pinctrl-names = "default"; 40552159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 406cd62214dSMasahiro Yamada clocks = <&sd_clk 0>; 40752159d27SMasahiro Yamada reset-names = "host"; 408cd62214dSMasahiro Yamada resets = <&sd_rst 0>; 40952159d27SMasahiro Yamada bus-width = <4>; 410cd62214dSMasahiro Yamada cap-sd-highspeed; 41152159d27SMasahiro Yamada }; 41252159d27SMasahiro Yamada 41352159d27SMasahiro Yamada soc-glue@5f800000 { 414cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 41552159d27SMasahiro Yamada "simple-mfd", "syscon"; 41652159d27SMasahiro Yamada reg = <0x5f800000 0x2000>; 41752159d27SMasahiro Yamada u-boot,dm-pre-reloc; 41852159d27SMasahiro Yamada 41952159d27SMasahiro Yamada pinctrl: pinctrl { 42052159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 42152159d27SMasahiro Yamada u-boot,dm-pre-reloc; 42252159d27SMasahiro Yamada }; 42352159d27SMasahiro Yamada }; 42452159d27SMasahiro Yamada 42552159d27SMasahiro Yamada aidet@5fc20000 { 42652159d27SMasahiro Yamada compatible = "simple-mfd", "syscon"; 42752159d27SMasahiro Yamada reg = <0x5fc20000 0x200>; 42852159d27SMasahiro Yamada }; 42952159d27SMasahiro Yamada 43052159d27SMasahiro Yamada gic: interrupt-controller@5fe00000 { 43152159d27SMasahiro Yamada compatible = "arm,gic-v3"; 43252159d27SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 43352159d27SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 43452159d27SMasahiro Yamada interrupt-controller; 43552159d27SMasahiro Yamada #interrupt-cells = <3>; 43652159d27SMasahiro Yamada interrupts = <1 9 4>; 43752159d27SMasahiro Yamada }; 43852159d27SMasahiro Yamada 43952159d27SMasahiro Yamada sysctrl@61840000 { 440cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 44152159d27SMasahiro Yamada "simple-mfd", "syscon"; 442cd62214dSMasahiro Yamada reg = <0x61840000 0x10000>; 44352159d27SMasahiro Yamada 44452159d27SMasahiro Yamada sys_clk: clock { 44552159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 44652159d27SMasahiro Yamada #clock-cells = <1>; 44752159d27SMasahiro Yamada }; 44852159d27SMasahiro Yamada 44952159d27SMasahiro Yamada sys_rst: reset { 45052159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 45152159d27SMasahiro Yamada #reset-cells = <1>; 45252159d27SMasahiro Yamada }; 45352159d27SMasahiro Yamada }; 454cd62214dSMasahiro Yamada 455cd62214dSMasahiro Yamada usb: usb@65b00000 { 456cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-dwc3"; 457cd62214dSMasahiro Yamada reg = <0x65b00000 0x1000>; 458cd62214dSMasahiro Yamada #address-cells = <1>; 459cd62214dSMasahiro Yamada #size-cells = <1>; 460cd62214dSMasahiro Yamada ranges; 461cd62214dSMasahiro Yamada pinctrl-names = "default"; 462cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 463cd62214dSMasahiro Yamada <&pinctrl_usb2>, <&pinctrl_usb3>; 464cd62214dSMasahiro Yamada dwc3@65a00000 { 465cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 466cd62214dSMasahiro Yamada reg = <0x65a00000 0x10000>; 467cd62214dSMasahiro Yamada interrupts = <0 134 4>; 468cd62214dSMasahiro Yamada tx-fifo-resize; 469cd62214dSMasahiro Yamada }; 470cd62214dSMasahiro Yamada }; 471cd62214dSMasahiro Yamada 472cd62214dSMasahiro Yamada nand: nand@68000000 { 473*4e7f8de4SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 474cd62214dSMasahiro Yamada status = "disabled"; 475cd62214dSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 476cd62214dSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 477cd62214dSMasahiro Yamada interrupts = <0 65 4>; 478cd62214dSMasahiro Yamada pinctrl-names = "default"; 479cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 480cd62214dSMasahiro Yamada clocks = <&sys_clk 2>; 481cd62214dSMasahiro Yamada nand-ecc-strength = <8>; 482cd62214dSMasahiro Yamada }; 48352159d27SMasahiro Yamada }; 48452159d27SMasahiro Yamada}; 48552159d27SMasahiro Yamada 48652159d27SMasahiro Yamada/include/ "uniphier-pinctrl.dtsi" 487