1*3e98fc12SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*3e98fc12SMasahiro Yamada// 3*3e98fc12SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 4*3e98fc12SMasahiro Yamada// 5*3e98fc12SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 6*3e98fc12SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 752159d27SMasahiro Yamada 8b443fb42SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 9b443fb42SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10b443fb42SMasahiro Yamada#include <dt-bindings/thermal/thermal.h> 11b443fb42SMasahiro Yamada 12d9403001SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 1352159d27SMasahiro Yamada 1452159d27SMasahiro Yamada/ { 1552159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 1652159d27SMasahiro Yamada #address-cells = <2>; 1752159d27SMasahiro Yamada #size-cells = <2>; 1852159d27SMasahiro Yamada interrupt-parent = <&gic>; 1952159d27SMasahiro Yamada 2052159d27SMasahiro Yamada cpus { 2152159d27SMasahiro Yamada #address-cells = <2>; 2252159d27SMasahiro Yamada #size-cells = <0>; 2352159d27SMasahiro Yamada 2452159d27SMasahiro Yamada cpu-map { 2552159d27SMasahiro Yamada cluster0 { 2652159d27SMasahiro Yamada core0 { 2752159d27SMasahiro Yamada cpu = <&cpu0>; 2852159d27SMasahiro Yamada }; 2952159d27SMasahiro Yamada core1 { 3052159d27SMasahiro Yamada cpu = <&cpu1>; 3152159d27SMasahiro Yamada }; 3252159d27SMasahiro Yamada }; 3352159d27SMasahiro Yamada 3452159d27SMasahiro Yamada cluster1 { 3552159d27SMasahiro Yamada core0 { 3652159d27SMasahiro Yamada cpu = <&cpu2>; 3752159d27SMasahiro Yamada }; 3852159d27SMasahiro Yamada core1 { 3952159d27SMasahiro Yamada cpu = <&cpu3>; 4052159d27SMasahiro Yamada }; 4152159d27SMasahiro Yamada }; 4252159d27SMasahiro Yamada }; 4352159d27SMasahiro Yamada 4452159d27SMasahiro Yamada cpu0: cpu@0 { 4552159d27SMasahiro Yamada device_type = "cpu"; 4652159d27SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 4752159d27SMasahiro Yamada reg = <0 0x000>; 48cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 49cd62214dSMasahiro Yamada enable-method = "psci"; 50cd62214dSMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51b443fb42SMasahiro Yamada #cooling-cells = <2>; 5252159d27SMasahiro Yamada }; 5352159d27SMasahiro Yamada 5452159d27SMasahiro Yamada cpu1: cpu@1 { 5552159d27SMasahiro Yamada device_type = "cpu"; 5652159d27SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 5752159d27SMasahiro Yamada reg = <0 0x001>; 58cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 59cd62214dSMasahiro Yamada enable-method = "psci"; 60cd62214dSMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 6152159d27SMasahiro Yamada }; 6252159d27SMasahiro Yamada 6352159d27SMasahiro Yamada cpu2: cpu@100 { 6452159d27SMasahiro Yamada device_type = "cpu"; 6552159d27SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 6652159d27SMasahiro Yamada reg = <0 0x100>; 67cd62214dSMasahiro Yamada clocks = <&sys_clk 33>; 68cd62214dSMasahiro Yamada enable-method = "psci"; 69cd62214dSMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 70b443fb42SMasahiro Yamada #cooling-cells = <2>; 7152159d27SMasahiro Yamada }; 7252159d27SMasahiro Yamada 7352159d27SMasahiro Yamada cpu3: cpu@101 { 7452159d27SMasahiro Yamada device_type = "cpu"; 7552159d27SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 7652159d27SMasahiro Yamada reg = <0 0x101>; 77cd62214dSMasahiro Yamada clocks = <&sys_clk 33>; 78cd62214dSMasahiro Yamada enable-method = "psci"; 79cd62214dSMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 8052159d27SMasahiro Yamada }; 8152159d27SMasahiro Yamada }; 8252159d27SMasahiro Yamada 83b443fb42SMasahiro Yamada cluster0_opp: opp-table0 { 84cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 85cd62214dSMasahiro Yamada opp-shared; 86cd62214dSMasahiro Yamada 874e7f8de4SMasahiro Yamada opp-250000000 { 88cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 89cd62214dSMasahiro Yamada clock-latency-ns = <300>; 90cd62214dSMasahiro Yamada }; 914e7f8de4SMasahiro Yamada opp-275000000 { 92cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 93cd62214dSMasahiro Yamada clock-latency-ns = <300>; 94cd62214dSMasahiro Yamada }; 954e7f8de4SMasahiro Yamada opp-500000000 { 96cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 97cd62214dSMasahiro Yamada clock-latency-ns = <300>; 98cd62214dSMasahiro Yamada }; 994e7f8de4SMasahiro Yamada opp-550000000 { 100cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 101cd62214dSMasahiro Yamada clock-latency-ns = <300>; 102cd62214dSMasahiro Yamada }; 1034e7f8de4SMasahiro Yamada opp-666667000 { 104cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 105cd62214dSMasahiro Yamada clock-latency-ns = <300>; 106cd62214dSMasahiro Yamada }; 1074e7f8de4SMasahiro Yamada opp-733334000 { 108cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 109cd62214dSMasahiro Yamada clock-latency-ns = <300>; 110cd62214dSMasahiro Yamada }; 1114e7f8de4SMasahiro Yamada opp-1000000000 { 112cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 113cd62214dSMasahiro Yamada clock-latency-ns = <300>; 114cd62214dSMasahiro Yamada }; 1154e7f8de4SMasahiro Yamada opp-1100000000 { 116cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 117cd62214dSMasahiro Yamada clock-latency-ns = <300>; 118cd62214dSMasahiro Yamada }; 119cd62214dSMasahiro Yamada }; 120cd62214dSMasahiro Yamada 121b443fb42SMasahiro Yamada cluster1_opp: opp-table1 { 122cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 123cd62214dSMasahiro Yamada opp-shared; 124cd62214dSMasahiro Yamada 1254e7f8de4SMasahiro Yamada opp-250000000 { 126cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 127cd62214dSMasahiro Yamada clock-latency-ns = <300>; 128cd62214dSMasahiro Yamada }; 1294e7f8de4SMasahiro Yamada opp-275000000 { 130cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 131cd62214dSMasahiro Yamada clock-latency-ns = <300>; 132cd62214dSMasahiro Yamada }; 1334e7f8de4SMasahiro Yamada opp-500000000 { 134cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 135cd62214dSMasahiro Yamada clock-latency-ns = <300>; 136cd62214dSMasahiro Yamada }; 1374e7f8de4SMasahiro Yamada opp-550000000 { 138cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 139cd62214dSMasahiro Yamada clock-latency-ns = <300>; 140cd62214dSMasahiro Yamada }; 1414e7f8de4SMasahiro Yamada opp-666667000 { 142cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 143cd62214dSMasahiro Yamada clock-latency-ns = <300>; 144cd62214dSMasahiro Yamada }; 1454e7f8de4SMasahiro Yamada opp-733334000 { 146cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 147cd62214dSMasahiro Yamada clock-latency-ns = <300>; 148cd62214dSMasahiro Yamada }; 1494e7f8de4SMasahiro Yamada opp-1000000000 { 150cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 151cd62214dSMasahiro Yamada clock-latency-ns = <300>; 152cd62214dSMasahiro Yamada }; 1534e7f8de4SMasahiro Yamada opp-1100000000 { 154cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 155cd62214dSMasahiro Yamada clock-latency-ns = <300>; 156cd62214dSMasahiro Yamada }; 157cd62214dSMasahiro Yamada }; 158cd62214dSMasahiro Yamada 159cd62214dSMasahiro Yamada psci { 160cd62214dSMasahiro Yamada compatible = "arm,psci-1.0"; 161cd62214dSMasahiro Yamada method = "smc"; 162cd62214dSMasahiro Yamada }; 163cd62214dSMasahiro Yamada 16452159d27SMasahiro Yamada clocks { 16552159d27SMasahiro Yamada refclk: ref { 16652159d27SMasahiro Yamada compatible = "fixed-clock"; 16752159d27SMasahiro Yamada #clock-cells = <0>; 16852159d27SMasahiro Yamada clock-frequency = <25000000>; 16952159d27SMasahiro Yamada }; 17052159d27SMasahiro Yamada }; 17152159d27SMasahiro Yamada 172b443fb42SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 173b443fb42SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 174b443fb42SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 175b443fb42SMasahiro Yamada }; 176b443fb42SMasahiro Yamada 17752159d27SMasahiro Yamada timer { 17852159d27SMasahiro Yamada compatible = "arm,armv8-timer"; 17952159d27SMasahiro Yamada interrupts = <1 13 4>, 18052159d27SMasahiro Yamada <1 14 4>, 18152159d27SMasahiro Yamada <1 11 4>, 18252159d27SMasahiro Yamada <1 10 4>; 18352159d27SMasahiro Yamada }; 18452159d27SMasahiro Yamada 185b443fb42SMasahiro Yamada thermal-zones { 186b443fb42SMasahiro Yamada cpu-thermal { 187b443fb42SMasahiro Yamada polling-delay-passive = <250>; /* 250ms */ 188b443fb42SMasahiro Yamada polling-delay = <1000>; /* 1000ms */ 189b443fb42SMasahiro Yamada thermal-sensors = <&pvtctl>; 190b443fb42SMasahiro Yamada 191b443fb42SMasahiro Yamada trips { 192b443fb42SMasahiro Yamada cpu_crit: cpu-crit { 193b443fb42SMasahiro Yamada temperature = <110000>; /* 110C */ 194b443fb42SMasahiro Yamada hysteresis = <2000>; 195b443fb42SMasahiro Yamada type = "critical"; 196b443fb42SMasahiro Yamada }; 197b443fb42SMasahiro Yamada cpu_alert: cpu-alert { 198b443fb42SMasahiro Yamada temperature = <100000>; /* 100C */ 199b443fb42SMasahiro Yamada hysteresis = <2000>; 200b443fb42SMasahiro Yamada type = "passive"; 201b443fb42SMasahiro Yamada }; 202b443fb42SMasahiro Yamada }; 203b443fb42SMasahiro Yamada 204b443fb42SMasahiro Yamada cooling-maps { 205b443fb42SMasahiro Yamada map0 { 206b443fb42SMasahiro Yamada trip = <&cpu_alert>; 207b443fb42SMasahiro Yamada cooling-device = <&cpu0 208b443fb42SMasahiro Yamada THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 209b443fb42SMasahiro Yamada }; 210b443fb42SMasahiro Yamada map1 { 211b443fb42SMasahiro Yamada trip = <&cpu_alert>; 212b443fb42SMasahiro Yamada cooling-device = <&cpu2 213b443fb42SMasahiro Yamada THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 214b443fb42SMasahiro Yamada }; 215b443fb42SMasahiro Yamada }; 216b443fb42SMasahiro Yamada }; 217b443fb42SMasahiro Yamada }; 218b443fb42SMasahiro Yamada 2197ad79c12SMasahiro Yamada soc@0 { 22052159d27SMasahiro Yamada compatible = "simple-bus"; 22152159d27SMasahiro Yamada #address-cells = <1>; 22252159d27SMasahiro Yamada #size-cells = <1>; 22352159d27SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 22452159d27SMasahiro Yamada 22552159d27SMasahiro Yamada serial0: serial@54006800 { 22652159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 22752159d27SMasahiro Yamada status = "disabled"; 22852159d27SMasahiro Yamada reg = <0x54006800 0x40>; 22952159d27SMasahiro Yamada interrupts = <0 33 4>; 23052159d27SMasahiro Yamada pinctrl-names = "default"; 23152159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 23252159d27SMasahiro Yamada clocks = <&peri_clk 0>; 23352159d27SMasahiro Yamada clock-frequency = <58820000>; 234b443fb42SMasahiro Yamada resets = <&peri_rst 0>; 23552159d27SMasahiro Yamada }; 23652159d27SMasahiro Yamada 23752159d27SMasahiro Yamada serial1: serial@54006900 { 23852159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 23952159d27SMasahiro Yamada status = "disabled"; 24052159d27SMasahiro Yamada reg = <0x54006900 0x40>; 24152159d27SMasahiro Yamada interrupts = <0 35 4>; 24252159d27SMasahiro Yamada pinctrl-names = "default"; 24352159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 24452159d27SMasahiro Yamada clocks = <&peri_clk 1>; 24552159d27SMasahiro Yamada clock-frequency = <58820000>; 246b443fb42SMasahiro Yamada resets = <&peri_rst 1>; 24752159d27SMasahiro Yamada }; 24852159d27SMasahiro Yamada 24952159d27SMasahiro Yamada serial2: serial@54006a00 { 25052159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 25152159d27SMasahiro Yamada status = "disabled"; 25252159d27SMasahiro Yamada reg = <0x54006a00 0x40>; 25352159d27SMasahiro Yamada interrupts = <0 37 4>; 25452159d27SMasahiro Yamada pinctrl-names = "default"; 25552159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 25652159d27SMasahiro Yamada clocks = <&peri_clk 2>; 25752159d27SMasahiro Yamada clock-frequency = <58820000>; 258b443fb42SMasahiro Yamada resets = <&peri_rst 2>; 25952159d27SMasahiro Yamada }; 26052159d27SMasahiro Yamada 26152159d27SMasahiro Yamada serial3: serial@54006b00 { 26252159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 26352159d27SMasahiro Yamada status = "disabled"; 26452159d27SMasahiro Yamada reg = <0x54006b00 0x40>; 26552159d27SMasahiro Yamada interrupts = <0 177 4>; 26652159d27SMasahiro Yamada pinctrl-names = "default"; 26752159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 26852159d27SMasahiro Yamada clocks = <&peri_clk 3>; 26952159d27SMasahiro Yamada clock-frequency = <58820000>; 270b443fb42SMasahiro Yamada resets = <&peri_rst 3>; 27152159d27SMasahiro Yamada }; 27252159d27SMasahiro Yamada 27327287487SMasahiro Yamada gpio: gpio@55000000 { 27427287487SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 27527287487SMasahiro Yamada reg = <0x55000000 0x200>; 27627287487SMasahiro Yamada interrupt-parent = <&aidet>; 27727287487SMasahiro Yamada interrupt-controller; 27827287487SMasahiro Yamada #interrupt-cells = <2>; 27927287487SMasahiro Yamada gpio-controller; 28027287487SMasahiro Yamada #gpio-cells = <2>; 28127287487SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 28227287487SMasahiro Yamada <&pinctrl 96 0 0>, 28327287487SMasahiro Yamada <&pinctrl 160 0 0>; 28427287487SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 28527287487SMasahiro Yamada "gpio_range1", 28627287487SMasahiro Yamada "gpio_range2"; 28727287487SMasahiro Yamada ngpios = <205>; 28827287487SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 28927287487SMasahiro Yamada <21 217 3>; 29027287487SMasahiro Yamada }; 29127287487SMasahiro Yamada 292*3e98fc12SMasahiro Yamada audio@56000000 { 293*3e98fc12SMasahiro Yamada compatible = "socionext,uniphier-ld20-aio"; 294*3e98fc12SMasahiro Yamada reg = <0x56000000 0x80000>; 295*3e98fc12SMasahiro Yamada interrupts = <0 144 4>; 296*3e98fc12SMasahiro Yamada pinctrl-names = "default"; 297*3e98fc12SMasahiro Yamada pinctrl-0 = <&pinctrl_aout1>, 298*3e98fc12SMasahiro Yamada <&pinctrl_aoutiec1>; 299*3e98fc12SMasahiro Yamada clock-names = "aio"; 300*3e98fc12SMasahiro Yamada clocks = <&sys_clk 40>; 301*3e98fc12SMasahiro Yamada reset-names = "aio"; 302*3e98fc12SMasahiro Yamada resets = <&sys_rst 40>; 303*3e98fc12SMasahiro Yamada #sound-dai-cells = <1>; 304*3e98fc12SMasahiro Yamada socionext,syscon = <&soc_glue>; 305*3e98fc12SMasahiro Yamada 306*3e98fc12SMasahiro Yamada i2s_port0: port@0 { 307*3e98fc12SMasahiro Yamada i2s_hdmi: endpoint { 308*3e98fc12SMasahiro Yamada }; 309*3e98fc12SMasahiro Yamada }; 310*3e98fc12SMasahiro Yamada 311*3e98fc12SMasahiro Yamada i2s_port1: port@1 { 312*3e98fc12SMasahiro Yamada i2s_pcmin2: endpoint { 313*3e98fc12SMasahiro Yamada }; 314*3e98fc12SMasahiro Yamada }; 315*3e98fc12SMasahiro Yamada 316*3e98fc12SMasahiro Yamada i2s_port2: port@2 { 317*3e98fc12SMasahiro Yamada i2s_line: endpoint { 318*3e98fc12SMasahiro Yamada dai-format = "i2s"; 319*3e98fc12SMasahiro Yamada remote-endpoint = <&evea_line>; 320*3e98fc12SMasahiro Yamada }; 321*3e98fc12SMasahiro Yamada }; 322*3e98fc12SMasahiro Yamada 323*3e98fc12SMasahiro Yamada i2s_port3: port@3 { 324*3e98fc12SMasahiro Yamada i2s_hpcmout1: endpoint { 325*3e98fc12SMasahiro Yamada }; 326*3e98fc12SMasahiro Yamada }; 327*3e98fc12SMasahiro Yamada 328*3e98fc12SMasahiro Yamada i2s_port4: port@4 { 329*3e98fc12SMasahiro Yamada i2s_hp: endpoint { 330*3e98fc12SMasahiro Yamada dai-format = "i2s"; 331*3e98fc12SMasahiro Yamada remote-endpoint = <&evea_hp>; 332*3e98fc12SMasahiro Yamada }; 333*3e98fc12SMasahiro Yamada }; 334*3e98fc12SMasahiro Yamada 335*3e98fc12SMasahiro Yamada spdif_port0: port@5 { 336*3e98fc12SMasahiro Yamada spdif_hiecout1: endpoint { 337*3e98fc12SMasahiro Yamada }; 338*3e98fc12SMasahiro Yamada }; 339*3e98fc12SMasahiro Yamada 340*3e98fc12SMasahiro Yamada src_port0: port@6 { 341*3e98fc12SMasahiro Yamada i2s_epcmout2: endpoint { 342*3e98fc12SMasahiro Yamada }; 343*3e98fc12SMasahiro Yamada }; 344*3e98fc12SMasahiro Yamada 345*3e98fc12SMasahiro Yamada src_port1: port@7 { 346*3e98fc12SMasahiro Yamada i2s_epcmout3: endpoint { 347*3e98fc12SMasahiro Yamada }; 348*3e98fc12SMasahiro Yamada }; 349*3e98fc12SMasahiro Yamada 350*3e98fc12SMasahiro Yamada comp_spdif_port0: port@8 { 351*3e98fc12SMasahiro Yamada comp_spdif_hiecout1: endpoint { 352*3e98fc12SMasahiro Yamada }; 353*3e98fc12SMasahiro Yamada }; 354*3e98fc12SMasahiro Yamada }; 355*3e98fc12SMasahiro Yamada 356*3e98fc12SMasahiro Yamada codec@57900000 { 357*3e98fc12SMasahiro Yamada compatible = "socionext,uniphier-evea"; 358*3e98fc12SMasahiro Yamada reg = <0x57900000 0x1000>; 359*3e98fc12SMasahiro Yamada clock-names = "evea", "exiv"; 360*3e98fc12SMasahiro Yamada clocks = <&sys_clk 41>, <&sys_clk 42>; 361*3e98fc12SMasahiro Yamada reset-names = "evea", "exiv", "adamv"; 362*3e98fc12SMasahiro Yamada resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 363*3e98fc12SMasahiro Yamada #sound-dai-cells = <1>; 364*3e98fc12SMasahiro Yamada 365*3e98fc12SMasahiro Yamada port@0 { 366*3e98fc12SMasahiro Yamada evea_line: endpoint { 367*3e98fc12SMasahiro Yamada remote-endpoint = <&i2s_line>; 368*3e98fc12SMasahiro Yamada }; 369*3e98fc12SMasahiro Yamada }; 370*3e98fc12SMasahiro Yamada 371*3e98fc12SMasahiro Yamada port@1 { 372*3e98fc12SMasahiro Yamada evea_hp: endpoint { 373*3e98fc12SMasahiro Yamada remote-endpoint = <&i2s_hp>; 374*3e98fc12SMasahiro Yamada }; 375*3e98fc12SMasahiro Yamada }; 376*3e98fc12SMasahiro Yamada }; 377*3e98fc12SMasahiro Yamada 37827287487SMasahiro Yamada adamv@57920000 { 37927287487SMasahiro Yamada compatible = "socionext,uniphier-ld20-adamv", 38027287487SMasahiro Yamada "simple-mfd", "syscon"; 38127287487SMasahiro Yamada reg = <0x57920000 0x1000>; 38227287487SMasahiro Yamada 38327287487SMasahiro Yamada adamv_rst: reset { 38427287487SMasahiro Yamada compatible = "socionext,uniphier-ld20-adamv-reset"; 38527287487SMasahiro Yamada #reset-cells = <1>; 38627287487SMasahiro Yamada }; 38727287487SMasahiro Yamada }; 38827287487SMasahiro Yamada 38952159d27SMasahiro Yamada i2c0: i2c@58780000 { 39052159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 39152159d27SMasahiro Yamada status = "disabled"; 39252159d27SMasahiro Yamada reg = <0x58780000 0x80>; 39352159d27SMasahiro Yamada #address-cells = <1>; 39452159d27SMasahiro Yamada #size-cells = <0>; 39552159d27SMasahiro Yamada interrupts = <0 41 4>; 39652159d27SMasahiro Yamada pinctrl-names = "default"; 39752159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 398cd62214dSMasahiro Yamada clocks = <&peri_clk 4>; 399b443fb42SMasahiro Yamada resets = <&peri_rst 4>; 40052159d27SMasahiro Yamada clock-frequency = <100000>; 40152159d27SMasahiro Yamada }; 40252159d27SMasahiro Yamada 40352159d27SMasahiro Yamada i2c1: i2c@58781000 { 40452159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 40552159d27SMasahiro Yamada status = "disabled"; 40652159d27SMasahiro Yamada reg = <0x58781000 0x80>; 40752159d27SMasahiro Yamada #address-cells = <1>; 40852159d27SMasahiro Yamada #size-cells = <0>; 40952159d27SMasahiro Yamada interrupts = <0 42 4>; 41052159d27SMasahiro Yamada pinctrl-names = "default"; 41152159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 412cd62214dSMasahiro Yamada clocks = <&peri_clk 5>; 413b443fb42SMasahiro Yamada resets = <&peri_rst 5>; 41452159d27SMasahiro Yamada clock-frequency = <100000>; 41552159d27SMasahiro Yamada }; 41652159d27SMasahiro Yamada 41752159d27SMasahiro Yamada i2c2: i2c@58782000 { 41852159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 41952159d27SMasahiro Yamada reg = <0x58782000 0x80>; 42052159d27SMasahiro Yamada #address-cells = <1>; 42152159d27SMasahiro Yamada #size-cells = <0>; 42252159d27SMasahiro Yamada interrupts = <0 43 4>; 423cd62214dSMasahiro Yamada clocks = <&peri_clk 6>; 424b443fb42SMasahiro Yamada resets = <&peri_rst 6>; 42552159d27SMasahiro Yamada clock-frequency = <400000>; 42652159d27SMasahiro Yamada }; 42752159d27SMasahiro Yamada 42852159d27SMasahiro Yamada i2c3: i2c@58783000 { 42952159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 43052159d27SMasahiro Yamada status = "disabled"; 43152159d27SMasahiro Yamada reg = <0x58783000 0x80>; 43252159d27SMasahiro Yamada #address-cells = <1>; 43352159d27SMasahiro Yamada #size-cells = <0>; 43452159d27SMasahiro Yamada interrupts = <0 44 4>; 43552159d27SMasahiro Yamada pinctrl-names = "default"; 43652159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 437cd62214dSMasahiro Yamada clocks = <&peri_clk 7>; 438b443fb42SMasahiro Yamada resets = <&peri_rst 7>; 43952159d27SMasahiro Yamada clock-frequency = <100000>; 44052159d27SMasahiro Yamada }; 44152159d27SMasahiro Yamada 44252159d27SMasahiro Yamada i2c4: i2c@58784000 { 44352159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 44452159d27SMasahiro Yamada status = "disabled"; 44552159d27SMasahiro Yamada reg = <0x58784000 0x80>; 44652159d27SMasahiro Yamada #address-cells = <1>; 44752159d27SMasahiro Yamada #size-cells = <0>; 44852159d27SMasahiro Yamada interrupts = <0 45 4>; 44952159d27SMasahiro Yamada pinctrl-names = "default"; 45052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 451cd62214dSMasahiro Yamada clocks = <&peri_clk 8>; 452b443fb42SMasahiro Yamada resets = <&peri_rst 8>; 45352159d27SMasahiro Yamada clock-frequency = <100000>; 45452159d27SMasahiro Yamada }; 45552159d27SMasahiro Yamada 45652159d27SMasahiro Yamada i2c5: i2c@58785000 { 45752159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 45852159d27SMasahiro Yamada reg = <0x58785000 0x80>; 45952159d27SMasahiro Yamada #address-cells = <1>; 46052159d27SMasahiro Yamada #size-cells = <0>; 46152159d27SMasahiro Yamada interrupts = <0 25 4>; 462cd62214dSMasahiro Yamada clocks = <&peri_clk 9>; 463b443fb42SMasahiro Yamada resets = <&peri_rst 9>; 46452159d27SMasahiro Yamada clock-frequency = <400000>; 46552159d27SMasahiro Yamada }; 46652159d27SMasahiro Yamada 46752159d27SMasahiro Yamada system_bus: system-bus@58c00000 { 46852159d27SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 46952159d27SMasahiro Yamada status = "disabled"; 47052159d27SMasahiro Yamada reg = <0x58c00000 0x400>; 47152159d27SMasahiro Yamada #address-cells = <2>; 47252159d27SMasahiro Yamada #size-cells = <1>; 47352159d27SMasahiro Yamada pinctrl-names = "default"; 47452159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 47552159d27SMasahiro Yamada }; 47652159d27SMasahiro Yamada 477abb6ac25SMasahiro Yamada smpctrl@59801000 { 47852159d27SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 47952159d27SMasahiro Yamada reg = <0x59801000 0x400>; 48052159d27SMasahiro Yamada }; 48152159d27SMasahiro Yamada 482cd62214dSMasahiro Yamada sdctrl@59810000 { 483cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 48452159d27SMasahiro Yamada "simple-mfd", "syscon"; 4856c9e46efSMasahiro Yamada reg = <0x59810000 0x400>; 48652159d27SMasahiro Yamada 487cd62214dSMasahiro Yamada sd_clk: clock { 488cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 48952159d27SMasahiro Yamada #clock-cells = <1>; 49052159d27SMasahiro Yamada }; 49152159d27SMasahiro Yamada 492cd62214dSMasahiro Yamada sd_rst: reset { 493cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 49452159d27SMasahiro Yamada #reset-cells = <1>; 49552159d27SMasahiro Yamada }; 49652159d27SMasahiro Yamada }; 49752159d27SMasahiro Yamada 49852159d27SMasahiro Yamada perictrl@59820000 { 499cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 50052159d27SMasahiro Yamada "simple-mfd", "syscon"; 50152159d27SMasahiro Yamada reg = <0x59820000 0x200>; 50252159d27SMasahiro Yamada 50352159d27SMasahiro Yamada peri_clk: clock { 50452159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 50552159d27SMasahiro Yamada #clock-cells = <1>; 50652159d27SMasahiro Yamada }; 50752159d27SMasahiro Yamada 50852159d27SMasahiro Yamada peri_rst: reset { 50952159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 51052159d27SMasahiro Yamada #reset-cells = <1>; 51152159d27SMasahiro Yamada }; 51252159d27SMasahiro Yamada }; 51352159d27SMasahiro Yamada 514cd62214dSMasahiro Yamada emmc: sdhc@5a000000 { 5157a6139c9SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 516cd62214dSMasahiro Yamada reg = <0x5a000000 0x400>; 517cd62214dSMasahiro Yamada interrupts = <0 78 4>; 518cd62214dSMasahiro Yamada pinctrl-names = "default"; 519cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_emmc_1v8>; 520cd62214dSMasahiro Yamada clocks = <&sys_clk 4>; 521b443fb42SMasahiro Yamada resets = <&sys_rst 4>; 522cd62214dSMasahiro Yamada bus-width = <8>; 523cd62214dSMasahiro Yamada mmc-ddr-1_8v; 524cd62214dSMasahiro Yamada mmc-hs200-1_8v; 525b443fb42SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 5264e7f8de4SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 5274e7f8de4SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 5284e7f8de4SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 5294e7f8de4SMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 5304e7f8de4SMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 531cd62214dSMasahiro Yamada }; 532cd62214dSMasahiro Yamada 53352159d27SMasahiro Yamada sd: sdhc@5a400000 { 53452159d27SMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 53552159d27SMasahiro Yamada status = "disabled"; 53652159d27SMasahiro Yamada reg = <0x5a400000 0x800>; 53752159d27SMasahiro Yamada interrupts = <0 76 4>; 53852159d27SMasahiro Yamada pinctrl-names = "default"; 53952159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 540cd62214dSMasahiro Yamada clocks = <&sd_clk 0>; 54152159d27SMasahiro Yamada reset-names = "host"; 542cd62214dSMasahiro Yamada resets = <&sd_rst 0>; 54352159d27SMasahiro Yamada bus-width = <4>; 544cd62214dSMasahiro Yamada cap-sd-highspeed; 54552159d27SMasahiro Yamada }; 54652159d27SMasahiro Yamada 547*3e98fc12SMasahiro Yamada soc_glue: soc-glue@5f800000 { 548cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 54952159d27SMasahiro Yamada "simple-mfd", "syscon"; 55052159d27SMasahiro Yamada reg = <0x5f800000 0x2000>; 55152159d27SMasahiro Yamada 55252159d27SMasahiro Yamada pinctrl: pinctrl { 55352159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 55452159d27SMasahiro Yamada }; 55552159d27SMasahiro Yamada }; 55652159d27SMasahiro Yamada 557b443fb42SMasahiro Yamada soc-glue@5f900000 { 558b443fb42SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue-debug", 559b443fb42SMasahiro Yamada "simple-mfd"; 560b443fb42SMasahiro Yamada #address-cells = <1>; 561b443fb42SMasahiro Yamada #size-cells = <1>; 562b443fb42SMasahiro Yamada ranges = <0 0x5f900000 0x2000>; 563b443fb42SMasahiro Yamada 564b443fb42SMasahiro Yamada efuse@100 { 565b443fb42SMasahiro Yamada compatible = "socionext,uniphier-efuse"; 566b443fb42SMasahiro Yamada reg = <0x100 0x28>; 567b443fb42SMasahiro Yamada }; 568b443fb42SMasahiro Yamada 569b443fb42SMasahiro Yamada efuse@200 { 570b443fb42SMasahiro Yamada compatible = "socionext,uniphier-efuse"; 571b443fb42SMasahiro Yamada reg = <0x200 0x68>; 572b443fb42SMasahiro Yamada }; 573b443fb42SMasahiro Yamada }; 574b443fb42SMasahiro Yamada 5756c9e46efSMasahiro Yamada aidet: aidet@5fc20000 { 5766c9e46efSMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 57752159d27SMasahiro Yamada reg = <0x5fc20000 0x200>; 5786c9e46efSMasahiro Yamada interrupt-controller; 5796c9e46efSMasahiro Yamada #interrupt-cells = <2>; 58052159d27SMasahiro Yamada }; 58152159d27SMasahiro Yamada 58252159d27SMasahiro Yamada gic: interrupt-controller@5fe00000 { 58352159d27SMasahiro Yamada compatible = "arm,gic-v3"; 58452159d27SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 58552159d27SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 58652159d27SMasahiro Yamada interrupt-controller; 58752159d27SMasahiro Yamada #interrupt-cells = <3>; 58852159d27SMasahiro Yamada interrupts = <1 9 4>; 58952159d27SMasahiro Yamada }; 59052159d27SMasahiro Yamada 59152159d27SMasahiro Yamada sysctrl@61840000 { 592cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 59352159d27SMasahiro Yamada "simple-mfd", "syscon"; 594cd62214dSMasahiro Yamada reg = <0x61840000 0x10000>; 59552159d27SMasahiro Yamada 59652159d27SMasahiro Yamada sys_clk: clock { 59752159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 59852159d27SMasahiro Yamada #clock-cells = <1>; 59952159d27SMasahiro Yamada }; 60052159d27SMasahiro Yamada 60152159d27SMasahiro Yamada sys_rst: reset { 60252159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 60352159d27SMasahiro Yamada #reset-cells = <1>; 60452159d27SMasahiro Yamada }; 6056c9e46efSMasahiro Yamada 6066c9e46efSMasahiro Yamada watchdog { 6076c9e46efSMasahiro Yamada compatible = "socionext,uniphier-wdt"; 6086c9e46efSMasahiro Yamada }; 609b443fb42SMasahiro Yamada 610b443fb42SMasahiro Yamada pvtctl: pvtctl { 611b443fb42SMasahiro Yamada compatible = "socionext,uniphier-ld20-thermal"; 612b443fb42SMasahiro Yamada interrupts = <0 3 4>; 613b443fb42SMasahiro Yamada #thermal-sensor-cells = <0>; 614b443fb42SMasahiro Yamada socionext,tmod-calibration = <0x0f22 0x68ee>; 615b443fb42SMasahiro Yamada }; 61652159d27SMasahiro Yamada }; 617cd62214dSMasahiro Yamada 618*3e98fc12SMasahiro Yamada eth: ethernet@65000000 { 619*3e98fc12SMasahiro Yamada compatible = "socionext,uniphier-ld20-ave4"; 620*3e98fc12SMasahiro Yamada status = "disabled"; 621*3e98fc12SMasahiro Yamada reg = <0x65000000 0x8500>; 622*3e98fc12SMasahiro Yamada interrupts = <0 66 4>; 623*3e98fc12SMasahiro Yamada pinctrl-names = "default"; 624*3e98fc12SMasahiro Yamada pinctrl-0 = <&pinctrl_ether_rgmii>; 625*3e98fc12SMasahiro Yamada clocks = <&sys_clk 6>; 626*3e98fc12SMasahiro Yamada resets = <&sys_rst 6>; 627*3e98fc12SMasahiro Yamada phy-mode = "rgmii"; 628*3e98fc12SMasahiro Yamada local-mac-address = [00 00 00 00 00 00]; 629*3e98fc12SMasahiro Yamada 630*3e98fc12SMasahiro Yamada mdio: mdio { 631*3e98fc12SMasahiro Yamada #address-cells = <1>; 632*3e98fc12SMasahiro Yamada #size-cells = <0>; 633*3e98fc12SMasahiro Yamada }; 634*3e98fc12SMasahiro Yamada }; 635*3e98fc12SMasahiro Yamada 636cd62214dSMasahiro Yamada usb: usb@65b00000 { 637cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-dwc3"; 638cd62214dSMasahiro Yamada reg = <0x65b00000 0x1000>; 639cd62214dSMasahiro Yamada #address-cells = <1>; 640cd62214dSMasahiro Yamada #size-cells = <1>; 641cd62214dSMasahiro Yamada ranges; 642cd62214dSMasahiro Yamada pinctrl-names = "default"; 643cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 644cd62214dSMasahiro Yamada <&pinctrl_usb2>, <&pinctrl_usb3>; 645cd62214dSMasahiro Yamada dwc3@65a00000 { 646cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 647cd62214dSMasahiro Yamada reg = <0x65a00000 0x10000>; 648cd62214dSMasahiro Yamada interrupts = <0 134 4>; 6493444d1d4SMasahiro Yamada dr_mode = "host"; 650cd62214dSMasahiro Yamada tx-fifo-resize; 651cd62214dSMasahiro Yamada }; 652cd62214dSMasahiro Yamada }; 653cd62214dSMasahiro Yamada 654cd62214dSMasahiro Yamada nand: nand@68000000 { 6554e7f8de4SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 656cd62214dSMasahiro Yamada status = "disabled"; 657cd62214dSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 658cd62214dSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 659cd62214dSMasahiro Yamada interrupts = <0 65 4>; 660cd62214dSMasahiro Yamada pinctrl-names = "default"; 661cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 662cd62214dSMasahiro Yamada clocks = <&sys_clk 2>; 663b443fb42SMasahiro Yamada resets = <&sys_rst 2>; 664cd62214dSMasahiro Yamada }; 66552159d27SMasahiro Yamada }; 66652159d27SMasahiro Yamada}; 66752159d27SMasahiro Yamada 6686c9e46efSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 669*3e98fc12SMasahiro Yamada 670*3e98fc12SMasahiro Yamada&pinctrl_aout1 { 671*3e98fc12SMasahiro Yamada drive-strength = <4>; /* default: 3.5mA */ 672*3e98fc12SMasahiro Yamada 673*3e98fc12SMasahiro Yamada ao1dacck { 674*3e98fc12SMasahiro Yamada pins = "AO1DACCK"; 675*3e98fc12SMasahiro Yamada drive-strength = <5>; /* 5mA */ 676*3e98fc12SMasahiro Yamada }; 677*3e98fc12SMasahiro Yamada}; 678*3e98fc12SMasahiro Yamada 679*3e98fc12SMasahiro Yamada&pinctrl_aoutiec1 { 680*3e98fc12SMasahiro Yamada drive-strength = <4>; /* default: 3.5mA */ 681*3e98fc12SMasahiro Yamada 682*3e98fc12SMasahiro Yamada ao1arc { 683*3e98fc12SMasahiro Yamada pins = "AO1ARC"; 684*3e98fc12SMasahiro Yamada drive-strength = <11>; /* 11mA */ 685*3e98fc12SMasahiro Yamada }; 686*3e98fc12SMasahiro Yamada}; 687