152159d27SMasahiro Yamada/* 252159d27SMasahiro Yamada * Device Tree Source for UniPhier LD20 SoC 352159d27SMasahiro Yamada * 452159d27SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 552159d27SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 652159d27SMasahiro Yamada * 7d9403001SMasahiro Yamada * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 852159d27SMasahiro Yamada */ 952159d27SMasahiro Yamada 10d9403001SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 1152159d27SMasahiro Yamada 1252159d27SMasahiro Yamada/ { 1352159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 1452159d27SMasahiro Yamada #address-cells = <2>; 1552159d27SMasahiro Yamada #size-cells = <2>; 1652159d27SMasahiro Yamada interrupt-parent = <&gic>; 1752159d27SMasahiro Yamada 1852159d27SMasahiro Yamada cpus { 1952159d27SMasahiro Yamada #address-cells = <2>; 2052159d27SMasahiro Yamada #size-cells = <0>; 2152159d27SMasahiro Yamada 2252159d27SMasahiro Yamada cpu-map { 2352159d27SMasahiro Yamada cluster0 { 2452159d27SMasahiro Yamada core0 { 2552159d27SMasahiro Yamada cpu = <&cpu0>; 2652159d27SMasahiro Yamada }; 2752159d27SMasahiro Yamada core1 { 2852159d27SMasahiro Yamada cpu = <&cpu1>; 2952159d27SMasahiro Yamada }; 3052159d27SMasahiro Yamada }; 3152159d27SMasahiro Yamada 3252159d27SMasahiro Yamada cluster1 { 3352159d27SMasahiro Yamada core0 { 3452159d27SMasahiro Yamada cpu = <&cpu2>; 3552159d27SMasahiro Yamada }; 3652159d27SMasahiro Yamada core1 { 3752159d27SMasahiro Yamada cpu = <&cpu3>; 3852159d27SMasahiro Yamada }; 3952159d27SMasahiro Yamada }; 4052159d27SMasahiro Yamada }; 4152159d27SMasahiro Yamada 4252159d27SMasahiro Yamada cpu0: cpu@0 { 4352159d27SMasahiro Yamada device_type = "cpu"; 4452159d27SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 4552159d27SMasahiro Yamada reg = <0 0x000>; 46cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 47cd62214dSMasahiro Yamada enable-method = "psci"; 48cd62214dSMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 4952159d27SMasahiro Yamada }; 5052159d27SMasahiro Yamada 5152159d27SMasahiro Yamada cpu1: cpu@1 { 5252159d27SMasahiro Yamada device_type = "cpu"; 5352159d27SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 5452159d27SMasahiro Yamada reg = <0 0x001>; 55cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 56cd62214dSMasahiro Yamada enable-method = "psci"; 57cd62214dSMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 5852159d27SMasahiro Yamada }; 5952159d27SMasahiro Yamada 6052159d27SMasahiro Yamada cpu2: cpu@100 { 6152159d27SMasahiro Yamada device_type = "cpu"; 6252159d27SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 6352159d27SMasahiro Yamada reg = <0 0x100>; 64cd62214dSMasahiro Yamada clocks = <&sys_clk 33>; 65cd62214dSMasahiro Yamada enable-method = "psci"; 66cd62214dSMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 6752159d27SMasahiro Yamada }; 6852159d27SMasahiro Yamada 6952159d27SMasahiro Yamada cpu3: cpu@101 { 7052159d27SMasahiro Yamada device_type = "cpu"; 7152159d27SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 7252159d27SMasahiro Yamada reg = <0 0x101>; 73cd62214dSMasahiro Yamada clocks = <&sys_clk 33>; 74cd62214dSMasahiro Yamada enable-method = "psci"; 75cd62214dSMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 7652159d27SMasahiro Yamada }; 7752159d27SMasahiro Yamada }; 7852159d27SMasahiro Yamada 79cd62214dSMasahiro Yamada cluster0_opp: opp_table0 { 80cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 81cd62214dSMasahiro Yamada opp-shared; 82cd62214dSMasahiro Yamada 834e7f8de4SMasahiro Yamada opp-250000000 { 84cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 85cd62214dSMasahiro Yamada clock-latency-ns = <300>; 86cd62214dSMasahiro Yamada }; 874e7f8de4SMasahiro Yamada opp-275000000 { 88cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 89cd62214dSMasahiro Yamada clock-latency-ns = <300>; 90cd62214dSMasahiro Yamada }; 914e7f8de4SMasahiro Yamada opp-500000000 { 92cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 93cd62214dSMasahiro Yamada clock-latency-ns = <300>; 94cd62214dSMasahiro Yamada }; 954e7f8de4SMasahiro Yamada opp-550000000 { 96cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 97cd62214dSMasahiro Yamada clock-latency-ns = <300>; 98cd62214dSMasahiro Yamada }; 994e7f8de4SMasahiro Yamada opp-666667000 { 100cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 101cd62214dSMasahiro Yamada clock-latency-ns = <300>; 102cd62214dSMasahiro Yamada }; 1034e7f8de4SMasahiro Yamada opp-733334000 { 104cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 105cd62214dSMasahiro Yamada clock-latency-ns = <300>; 106cd62214dSMasahiro Yamada }; 1074e7f8de4SMasahiro Yamada opp-1000000000 { 108cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 109cd62214dSMasahiro Yamada clock-latency-ns = <300>; 110cd62214dSMasahiro Yamada }; 1114e7f8de4SMasahiro Yamada opp-1100000000 { 112cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 113cd62214dSMasahiro Yamada clock-latency-ns = <300>; 114cd62214dSMasahiro Yamada }; 115cd62214dSMasahiro Yamada }; 116cd62214dSMasahiro Yamada 117cd62214dSMasahiro Yamada cluster1_opp: opp_table1 { 118cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 119cd62214dSMasahiro Yamada opp-shared; 120cd62214dSMasahiro Yamada 1214e7f8de4SMasahiro Yamada opp-250000000 { 122cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 123cd62214dSMasahiro Yamada clock-latency-ns = <300>; 124cd62214dSMasahiro Yamada }; 1254e7f8de4SMasahiro Yamada opp-275000000 { 126cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 127cd62214dSMasahiro Yamada clock-latency-ns = <300>; 128cd62214dSMasahiro Yamada }; 1294e7f8de4SMasahiro Yamada opp-500000000 { 130cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 131cd62214dSMasahiro Yamada clock-latency-ns = <300>; 132cd62214dSMasahiro Yamada }; 1334e7f8de4SMasahiro Yamada opp-550000000 { 134cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 135cd62214dSMasahiro Yamada clock-latency-ns = <300>; 136cd62214dSMasahiro Yamada }; 1374e7f8de4SMasahiro Yamada opp-666667000 { 138cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 139cd62214dSMasahiro Yamada clock-latency-ns = <300>; 140cd62214dSMasahiro Yamada }; 1414e7f8de4SMasahiro Yamada opp-733334000 { 142cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 143cd62214dSMasahiro Yamada clock-latency-ns = <300>; 144cd62214dSMasahiro Yamada }; 1454e7f8de4SMasahiro Yamada opp-1000000000 { 146cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 147cd62214dSMasahiro Yamada clock-latency-ns = <300>; 148cd62214dSMasahiro Yamada }; 1494e7f8de4SMasahiro Yamada opp-1100000000 { 150cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 151cd62214dSMasahiro Yamada clock-latency-ns = <300>; 152cd62214dSMasahiro Yamada }; 153cd62214dSMasahiro Yamada }; 154cd62214dSMasahiro Yamada 155cd62214dSMasahiro Yamada psci { 156cd62214dSMasahiro Yamada compatible = "arm,psci-1.0"; 157cd62214dSMasahiro Yamada method = "smc"; 158cd62214dSMasahiro Yamada }; 159cd62214dSMasahiro Yamada 16052159d27SMasahiro Yamada clocks { 16152159d27SMasahiro Yamada refclk: ref { 16252159d27SMasahiro Yamada compatible = "fixed-clock"; 16352159d27SMasahiro Yamada #clock-cells = <0>; 16452159d27SMasahiro Yamada clock-frequency = <25000000>; 16552159d27SMasahiro Yamada }; 16652159d27SMasahiro Yamada }; 16752159d27SMasahiro Yamada 16852159d27SMasahiro Yamada timer { 16952159d27SMasahiro Yamada compatible = "arm,armv8-timer"; 17052159d27SMasahiro Yamada interrupts = <1 13 4>, 17152159d27SMasahiro Yamada <1 14 4>, 17252159d27SMasahiro Yamada <1 11 4>, 17352159d27SMasahiro Yamada <1 10 4>; 17452159d27SMasahiro Yamada }; 17552159d27SMasahiro Yamada 1767ad79c12SMasahiro Yamada soc@0 { 17752159d27SMasahiro Yamada compatible = "simple-bus"; 17852159d27SMasahiro Yamada #address-cells = <1>; 17952159d27SMasahiro Yamada #size-cells = <1>; 18052159d27SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 18152159d27SMasahiro Yamada 18252159d27SMasahiro Yamada serial0: serial@54006800 { 18352159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 18452159d27SMasahiro Yamada status = "disabled"; 18552159d27SMasahiro Yamada reg = <0x54006800 0x40>; 18652159d27SMasahiro Yamada interrupts = <0 33 4>; 18752159d27SMasahiro Yamada pinctrl-names = "default"; 18852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 18952159d27SMasahiro Yamada clocks = <&peri_clk 0>; 19052159d27SMasahiro Yamada clock-frequency = <58820000>; 19152159d27SMasahiro Yamada }; 19252159d27SMasahiro Yamada 19352159d27SMasahiro Yamada serial1: serial@54006900 { 19452159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 19552159d27SMasahiro Yamada status = "disabled"; 19652159d27SMasahiro Yamada reg = <0x54006900 0x40>; 19752159d27SMasahiro Yamada interrupts = <0 35 4>; 19852159d27SMasahiro Yamada pinctrl-names = "default"; 19952159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 20052159d27SMasahiro Yamada clocks = <&peri_clk 1>; 20152159d27SMasahiro Yamada clock-frequency = <58820000>; 20252159d27SMasahiro Yamada }; 20352159d27SMasahiro Yamada 20452159d27SMasahiro Yamada serial2: serial@54006a00 { 20552159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 20652159d27SMasahiro Yamada status = "disabled"; 20752159d27SMasahiro Yamada reg = <0x54006a00 0x40>; 20852159d27SMasahiro Yamada interrupts = <0 37 4>; 20952159d27SMasahiro Yamada pinctrl-names = "default"; 21052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 21152159d27SMasahiro Yamada clocks = <&peri_clk 2>; 21252159d27SMasahiro Yamada clock-frequency = <58820000>; 21352159d27SMasahiro Yamada }; 21452159d27SMasahiro Yamada 21552159d27SMasahiro Yamada serial3: serial@54006b00 { 21652159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 21752159d27SMasahiro Yamada status = "disabled"; 21852159d27SMasahiro Yamada reg = <0x54006b00 0x40>; 21952159d27SMasahiro Yamada interrupts = <0 177 4>; 22052159d27SMasahiro Yamada pinctrl-names = "default"; 22152159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 22252159d27SMasahiro Yamada clocks = <&peri_clk 3>; 22352159d27SMasahiro Yamada clock-frequency = <58820000>; 22452159d27SMasahiro Yamada }; 22552159d27SMasahiro Yamada 226*27287487SMasahiro Yamada gpio: gpio@55000000 { 227*27287487SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 228*27287487SMasahiro Yamada reg = <0x55000000 0x200>; 229*27287487SMasahiro Yamada interrupt-parent = <&aidet>; 230*27287487SMasahiro Yamada interrupt-controller; 231*27287487SMasahiro Yamada #interrupt-cells = <2>; 232*27287487SMasahiro Yamada gpio-controller; 233*27287487SMasahiro Yamada #gpio-cells = <2>; 234*27287487SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 235*27287487SMasahiro Yamada <&pinctrl 96 0 0>, 236*27287487SMasahiro Yamada <&pinctrl 160 0 0>; 237*27287487SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 238*27287487SMasahiro Yamada "gpio_range1", 239*27287487SMasahiro Yamada "gpio_range2"; 240*27287487SMasahiro Yamada ngpios = <205>; 241*27287487SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 242*27287487SMasahiro Yamada <21 217 3>; 243*27287487SMasahiro Yamada }; 244*27287487SMasahiro Yamada 245*27287487SMasahiro Yamada adamv@57920000 { 246*27287487SMasahiro Yamada compatible = "socionext,uniphier-ld20-adamv", 247*27287487SMasahiro Yamada "simple-mfd", "syscon"; 248*27287487SMasahiro Yamada reg = <0x57920000 0x1000>; 249*27287487SMasahiro Yamada 250*27287487SMasahiro Yamada adamv_rst: reset { 251*27287487SMasahiro Yamada compatible = "socionext,uniphier-ld20-adamv-reset"; 252*27287487SMasahiro Yamada #reset-cells = <1>; 253*27287487SMasahiro Yamada }; 254*27287487SMasahiro Yamada }; 255*27287487SMasahiro Yamada 25652159d27SMasahiro Yamada i2c0: i2c@58780000 { 25752159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 25852159d27SMasahiro Yamada status = "disabled"; 25952159d27SMasahiro Yamada reg = <0x58780000 0x80>; 26052159d27SMasahiro Yamada #address-cells = <1>; 26152159d27SMasahiro Yamada #size-cells = <0>; 26252159d27SMasahiro Yamada interrupts = <0 41 4>; 26352159d27SMasahiro Yamada pinctrl-names = "default"; 26452159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 265cd62214dSMasahiro Yamada clocks = <&peri_clk 4>; 26652159d27SMasahiro Yamada clock-frequency = <100000>; 26752159d27SMasahiro Yamada }; 26852159d27SMasahiro Yamada 26952159d27SMasahiro Yamada i2c1: i2c@58781000 { 27052159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 27152159d27SMasahiro Yamada status = "disabled"; 27252159d27SMasahiro Yamada reg = <0x58781000 0x80>; 27352159d27SMasahiro Yamada #address-cells = <1>; 27452159d27SMasahiro Yamada #size-cells = <0>; 27552159d27SMasahiro Yamada interrupts = <0 42 4>; 27652159d27SMasahiro Yamada pinctrl-names = "default"; 27752159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 278cd62214dSMasahiro Yamada clocks = <&peri_clk 5>; 27952159d27SMasahiro Yamada clock-frequency = <100000>; 28052159d27SMasahiro Yamada }; 28152159d27SMasahiro Yamada 28252159d27SMasahiro Yamada i2c2: i2c@58782000 { 28352159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 28452159d27SMasahiro Yamada reg = <0x58782000 0x80>; 28552159d27SMasahiro Yamada #address-cells = <1>; 28652159d27SMasahiro Yamada #size-cells = <0>; 28752159d27SMasahiro Yamada interrupts = <0 43 4>; 288cd62214dSMasahiro Yamada clocks = <&peri_clk 6>; 28952159d27SMasahiro Yamada clock-frequency = <400000>; 29052159d27SMasahiro Yamada }; 29152159d27SMasahiro Yamada 29252159d27SMasahiro Yamada i2c3: i2c@58783000 { 29352159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 29452159d27SMasahiro Yamada status = "disabled"; 29552159d27SMasahiro Yamada reg = <0x58783000 0x80>; 29652159d27SMasahiro Yamada #address-cells = <1>; 29752159d27SMasahiro Yamada #size-cells = <0>; 29852159d27SMasahiro Yamada interrupts = <0 44 4>; 29952159d27SMasahiro Yamada pinctrl-names = "default"; 30052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 301cd62214dSMasahiro Yamada clocks = <&peri_clk 7>; 30252159d27SMasahiro Yamada clock-frequency = <100000>; 30352159d27SMasahiro Yamada }; 30452159d27SMasahiro Yamada 30552159d27SMasahiro Yamada i2c4: i2c@58784000 { 30652159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 30752159d27SMasahiro Yamada status = "disabled"; 30852159d27SMasahiro Yamada reg = <0x58784000 0x80>; 30952159d27SMasahiro Yamada #address-cells = <1>; 31052159d27SMasahiro Yamada #size-cells = <0>; 31152159d27SMasahiro Yamada interrupts = <0 45 4>; 31252159d27SMasahiro Yamada pinctrl-names = "default"; 31352159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 314cd62214dSMasahiro Yamada clocks = <&peri_clk 8>; 31552159d27SMasahiro Yamada clock-frequency = <100000>; 31652159d27SMasahiro Yamada }; 31752159d27SMasahiro Yamada 31852159d27SMasahiro Yamada i2c5: i2c@58785000 { 31952159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 32052159d27SMasahiro Yamada reg = <0x58785000 0x80>; 32152159d27SMasahiro Yamada #address-cells = <1>; 32252159d27SMasahiro Yamada #size-cells = <0>; 32352159d27SMasahiro Yamada interrupts = <0 25 4>; 324cd62214dSMasahiro Yamada clocks = <&peri_clk 9>; 32552159d27SMasahiro Yamada clock-frequency = <400000>; 32652159d27SMasahiro Yamada }; 32752159d27SMasahiro Yamada 32852159d27SMasahiro Yamada system_bus: system-bus@58c00000 { 32952159d27SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 33052159d27SMasahiro Yamada status = "disabled"; 33152159d27SMasahiro Yamada reg = <0x58c00000 0x400>; 33252159d27SMasahiro Yamada #address-cells = <2>; 33352159d27SMasahiro Yamada #size-cells = <1>; 33452159d27SMasahiro Yamada pinctrl-names = "default"; 33552159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 33652159d27SMasahiro Yamada }; 33752159d27SMasahiro Yamada 338abb6ac25SMasahiro Yamada smpctrl@59801000 { 33952159d27SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 34052159d27SMasahiro Yamada reg = <0x59801000 0x400>; 34152159d27SMasahiro Yamada }; 34252159d27SMasahiro Yamada 343cd62214dSMasahiro Yamada sdctrl@59810000 { 344cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 34552159d27SMasahiro Yamada "simple-mfd", "syscon"; 3466c9e46efSMasahiro Yamada reg = <0x59810000 0x400>; 34752159d27SMasahiro Yamada 348cd62214dSMasahiro Yamada sd_clk: clock { 349cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 35052159d27SMasahiro Yamada #clock-cells = <1>; 35152159d27SMasahiro Yamada }; 35252159d27SMasahiro Yamada 353cd62214dSMasahiro Yamada sd_rst: reset { 354cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 35552159d27SMasahiro Yamada #reset-cells = <1>; 35652159d27SMasahiro Yamada }; 35752159d27SMasahiro Yamada }; 35852159d27SMasahiro Yamada 35952159d27SMasahiro Yamada perictrl@59820000 { 360cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 36152159d27SMasahiro Yamada "simple-mfd", "syscon"; 36252159d27SMasahiro Yamada reg = <0x59820000 0x200>; 36352159d27SMasahiro Yamada 36452159d27SMasahiro Yamada peri_clk: clock { 36552159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 36652159d27SMasahiro Yamada #clock-cells = <1>; 36752159d27SMasahiro Yamada }; 36852159d27SMasahiro Yamada 36952159d27SMasahiro Yamada peri_rst: reset { 37052159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 37152159d27SMasahiro Yamada #reset-cells = <1>; 37252159d27SMasahiro Yamada }; 37352159d27SMasahiro Yamada }; 37452159d27SMasahiro Yamada 375cd62214dSMasahiro Yamada emmc: sdhc@5a000000 { 3767a6139c9SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 377cd62214dSMasahiro Yamada reg = <0x5a000000 0x400>; 378cd62214dSMasahiro Yamada interrupts = <0 78 4>; 379cd62214dSMasahiro Yamada pinctrl-names = "default"; 380cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_emmc_1v8>; 381cd62214dSMasahiro Yamada clocks = <&sys_clk 4>; 382cd62214dSMasahiro Yamada bus-width = <8>; 383cd62214dSMasahiro Yamada mmc-ddr-1_8v; 384cd62214dSMasahiro Yamada mmc-hs200-1_8v; 3854e7f8de4SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 3864e7f8de4SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 3874e7f8de4SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 3884e7f8de4SMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 3894e7f8de4SMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 390cd62214dSMasahiro Yamada }; 391cd62214dSMasahiro Yamada 39252159d27SMasahiro Yamada sd: sdhc@5a400000 { 39352159d27SMasahiro Yamada compatible = "socionext,uniphier-sdhc"; 39452159d27SMasahiro Yamada status = "disabled"; 39552159d27SMasahiro Yamada reg = <0x5a400000 0x800>; 39652159d27SMasahiro Yamada interrupts = <0 76 4>; 39752159d27SMasahiro Yamada pinctrl-names = "default"; 39852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 399cd62214dSMasahiro Yamada clocks = <&sd_clk 0>; 40052159d27SMasahiro Yamada reset-names = "host"; 401cd62214dSMasahiro Yamada resets = <&sd_rst 0>; 40252159d27SMasahiro Yamada bus-width = <4>; 403cd62214dSMasahiro Yamada cap-sd-highspeed; 40452159d27SMasahiro Yamada }; 40552159d27SMasahiro Yamada 40652159d27SMasahiro Yamada soc-glue@5f800000 { 407cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 40852159d27SMasahiro Yamada "simple-mfd", "syscon"; 40952159d27SMasahiro Yamada reg = <0x5f800000 0x2000>; 41052159d27SMasahiro Yamada 41152159d27SMasahiro Yamada pinctrl: pinctrl { 41252159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 41352159d27SMasahiro Yamada }; 41452159d27SMasahiro Yamada }; 41552159d27SMasahiro Yamada 4166c9e46efSMasahiro Yamada aidet: aidet@5fc20000 { 4176c9e46efSMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 41852159d27SMasahiro Yamada reg = <0x5fc20000 0x200>; 4196c9e46efSMasahiro Yamada interrupt-controller; 4206c9e46efSMasahiro Yamada #interrupt-cells = <2>; 42152159d27SMasahiro Yamada }; 42252159d27SMasahiro Yamada 42352159d27SMasahiro Yamada gic: interrupt-controller@5fe00000 { 42452159d27SMasahiro Yamada compatible = "arm,gic-v3"; 42552159d27SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 42652159d27SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 42752159d27SMasahiro Yamada interrupt-controller; 42852159d27SMasahiro Yamada #interrupt-cells = <3>; 42952159d27SMasahiro Yamada interrupts = <1 9 4>; 43052159d27SMasahiro Yamada }; 43152159d27SMasahiro Yamada 43252159d27SMasahiro Yamada sysctrl@61840000 { 433cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 43452159d27SMasahiro Yamada "simple-mfd", "syscon"; 435cd62214dSMasahiro Yamada reg = <0x61840000 0x10000>; 43652159d27SMasahiro Yamada 43752159d27SMasahiro Yamada sys_clk: clock { 43852159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 43952159d27SMasahiro Yamada #clock-cells = <1>; 44052159d27SMasahiro Yamada }; 44152159d27SMasahiro Yamada 44252159d27SMasahiro Yamada sys_rst: reset { 44352159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 44452159d27SMasahiro Yamada #reset-cells = <1>; 44552159d27SMasahiro Yamada }; 4466c9e46efSMasahiro Yamada 4476c9e46efSMasahiro Yamada watchdog { 4486c9e46efSMasahiro Yamada compatible = "socionext,uniphier-wdt"; 4496c9e46efSMasahiro Yamada }; 45052159d27SMasahiro Yamada }; 451cd62214dSMasahiro Yamada 452cd62214dSMasahiro Yamada usb: usb@65b00000 { 453cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-dwc3"; 454cd62214dSMasahiro Yamada reg = <0x65b00000 0x1000>; 455cd62214dSMasahiro Yamada #address-cells = <1>; 456cd62214dSMasahiro Yamada #size-cells = <1>; 457cd62214dSMasahiro Yamada ranges; 458cd62214dSMasahiro Yamada pinctrl-names = "default"; 459cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 460cd62214dSMasahiro Yamada <&pinctrl_usb2>, <&pinctrl_usb3>; 461cd62214dSMasahiro Yamada dwc3@65a00000 { 462cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 463cd62214dSMasahiro Yamada reg = <0x65a00000 0x10000>; 464cd62214dSMasahiro Yamada interrupts = <0 134 4>; 4653444d1d4SMasahiro Yamada dr_mode = "host"; 466cd62214dSMasahiro Yamada tx-fifo-resize; 467cd62214dSMasahiro Yamada }; 468cd62214dSMasahiro Yamada }; 469cd62214dSMasahiro Yamada 470cd62214dSMasahiro Yamada nand: nand@68000000 { 4714e7f8de4SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 472cd62214dSMasahiro Yamada status = "disabled"; 473cd62214dSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 474cd62214dSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 475cd62214dSMasahiro Yamada interrupts = <0 65 4>; 476cd62214dSMasahiro Yamada pinctrl-names = "default"; 477cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 478cd62214dSMasahiro Yamada clocks = <&sys_clk 2>; 479cd62214dSMasahiro Yamada }; 48052159d27SMasahiro Yamada }; 48152159d27SMasahiro Yamada}; 48252159d27SMasahiro Yamada 4836c9e46efSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 484