xref: /openbmc/u-boot/arch/arm/dts/ulcb.dtsi (revision cbd2fba1) 
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2.  This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14
15/ {
16	model = "Renesas R-Car Gen3 ULCB board";
17
18	aliases {
19		serial0 = &scif2;
20		ethernet0 = &avb;
21	};
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26
27	cpld {
28		compatible = "renesas,ulcb-cpld";
29		status = "okay";
30		gpio-sck = <&gpio6 8 0>;
31		gpio-mosi = <&gpio6 7 0>;
32		gpio-miso = <&gpio6 10 0>;
33		gpio-sstbz = <&gpio2 3 0>;
34	};
35
36	audio_clkout: audio-clkout {
37		/*
38		 * This is same as <&rcar_sound 0>
39		 * but needed to avoid cs2000/rcar_sound probe dead-lock
40		 */
41		compatible = "fixed-clock";
42		#clock-cells = <0>;
43		clock-frequency = <12288000>;
44	};
45
46	hdmi0-out {
47		compatible = "hdmi-connector";
48		type = "a";
49
50		port {
51			hdmi0_con: endpoint {
52			};
53		};
54	};
55
56	keyboard {
57		compatible = "gpio-keys";
58
59		key-1 {
60			linux,code = <KEY_1>;
61			label = "SW3";
62			wakeup-source;
63			debounce-interval = <20>;
64			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
65		};
66	};
67
68	leds {
69		compatible = "gpio-leds";
70
71		led5 {
72			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
73		};
74		led6 {
75			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
76		};
77	};
78
79	reg_1p8v: regulator0 {
80		compatible = "regulator-fixed";
81		regulator-name = "fixed-1.8V";
82		regulator-min-microvolt = <1800000>;
83		regulator-max-microvolt = <1800000>;
84		regulator-boot-on;
85		regulator-always-on;
86	};
87
88	reg_3p3v: regulator1 {
89		compatible = "regulator-fixed";
90		regulator-name = "fixed-3.3V";
91		regulator-min-microvolt = <3300000>;
92		regulator-max-microvolt = <3300000>;
93		regulator-boot-on;
94		regulator-always-on;
95	};
96
97	rsnd_ak4613: sound {
98		compatible = "simple-audio-card";
99
100		simple-audio-card,format = "left_j";
101		simple-audio-card,bitclock-master = <&sndcpu>;
102		simple-audio-card,frame-master = <&sndcpu>;
103
104		sndcpu: simple-audio-card,cpu {
105			sound-dai = <&rcar_sound>;
106		};
107
108		sndcodec: simple-audio-card,codec {
109			sound-dai = <&ak4613>;
110		};
111	};
112
113	vcc_sdhi0: regulator-vcc-sdhi0 {
114		compatible = "regulator-fixed";
115
116		regulator-name = "SDHI0 Vcc";
117		regulator-min-microvolt = <3300000>;
118		regulator-max-microvolt = <3300000>;
119
120		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
121		enable-active-high;
122	};
123
124	vccq_sdhi0: regulator-vccq-sdhi0 {
125		compatible = "regulator-gpio";
126
127		regulator-name = "SDHI0 VccQ";
128		regulator-min-microvolt = <1800000>;
129		regulator-max-microvolt = <3300000>;
130
131		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
132		gpios-states = <1>;
133		states = <3300000 1
134			  1800000 0>;
135	};
136
137	x12_clk: x12 {
138		compatible = "fixed-clock";
139		#clock-cells = <0>;
140		clock-frequency = <24576000>;
141	};
142
143	x23_clk: x23-clock {
144		compatible = "fixed-clock";
145		#clock-cells = <0>;
146		clock-frequency = <25000000>;
147	};
148};
149
150&audio_clk_a {
151	clock-frequency = <22579200>;
152};
153
154&avb {
155	pinctrl-0 = <&avb_pins>;
156	pinctrl-names = "default";
157	phy-handle = <&phy0>;
158	phy-mode = "rgmii-txid";
159	status = "okay";
160
161	phy0: ethernet-phy@0 {
162		rxc-skew-ps = <1500>;
163		reg = <0>;
164		interrupt-parent = <&gpio2>;
165		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
166		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
167	};
168};
169
170&du {
171	status = "okay";
172};
173
174&ehci1 {
175	status = "okay";
176};
177
178&extal_clk {
179	clock-frequency = <16666666>;
180};
181
182&extalr_clk {
183	clock-frequency = <32768>;
184};
185
186&hdmi0 {
187	status = "okay";
188
189	ports {
190		port@1 {
191			reg = <1>;
192			rcar_dw_hdmi0_out: endpoint {
193				remote-endpoint = <&hdmi0_con>;
194			};
195		};
196	};
197};
198
199&hdmi0_con {
200	remote-endpoint = <&rcar_dw_hdmi0_out>;
201};
202
203&i2c2 {
204	pinctrl-0 = <&i2c2_pins>;
205	pinctrl-names = "default";
206
207	status = "okay";
208
209	clock-frequency = <100000>;
210
211	ak4613: codec@10 {
212		compatible = "asahi-kasei,ak4613";
213		#sound-dai-cells = <0>;
214		reg = <0x10>;
215		clocks = <&rcar_sound 3>;
216
217		asahi-kasei,in1-single-end;
218		asahi-kasei,in2-single-end;
219		asahi-kasei,out1-single-end;
220		asahi-kasei,out2-single-end;
221		asahi-kasei,out3-single-end;
222		asahi-kasei,out4-single-end;
223		asahi-kasei,out5-single-end;
224		asahi-kasei,out6-single-end;
225	};
226
227	cs2000: clk-multiplier@4f {
228		#clock-cells = <0>;
229		compatible = "cirrus,cs2000-cp";
230		reg = <0x4f>;
231		clocks = <&audio_clkout>, <&x12_clk>;
232		clock-names = "clk_in", "ref_clk";
233
234		assigned-clocks = <&cs2000>;
235		assigned-clock-rates = <24576000>; /* 1/1 divide */
236	};
237};
238
239&i2c4 {
240	status = "okay";
241
242	clock-frequency = <400000>;
243
244	versaclock5: clock-generator@6a {
245		compatible = "idt,5p49v5925";
246		reg = <0x6a>;
247		#clock-cells = <1>;
248		clocks = <&x23_clk>;
249		clock-names = "xin";
250	};
251};
252
253&i2c_dvfs {
254	status = "okay";
255};
256
257&ohci1 {
258	status = "okay";
259};
260
261&pfc {
262	pinctrl-0 = <&scif_clk_pins>;
263	pinctrl-names = "default";
264
265	avb_pins: avb {
266		mux {
267			groups = "avb_link", "avb_mdc", "avb_mii";
268			function = "avb";
269		};
270
271		pins_mdc {
272			groups = "avb_mdc";
273			drive-strength = <24>;
274		};
275
276		pins_mii_tx {
277			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
278			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
279			drive-strength = <12>;
280		};
281	};
282
283	i2c2_pins: i2c2 {
284		groups = "i2c2_a";
285		function = "i2c2";
286	};
287
288	scif2_pins: scif2 {
289		groups = "scif2_data_a";
290		function = "scif2";
291	};
292
293	scif_clk_pins: scif_clk {
294		groups = "scif_clk_a";
295		function = "scif_clk";
296	};
297
298	sdhi0_pins: sd0 {
299		groups = "sdhi0_data4", "sdhi0_ctrl";
300		function = "sdhi0";
301		power-source = <3300>;
302	};
303
304	sdhi0_pins_uhs: sd0_uhs {
305		groups = "sdhi0_data4", "sdhi0_ctrl";
306		function = "sdhi0";
307		power-source = <1800>;
308	};
309
310	sdhi2_pins: sd2 {
311		groups = "sdhi2_data8", "sdhi2_ctrl";
312		function = "sdhi2";
313		power-source = <1800>;
314	};
315
316	sdhi2_pins_uhs: sd2_uhs {
317		groups = "sdhi2_data8", "sdhi2_ctrl";
318		function = "sdhi2";
319		power-source = <1800>;
320	};
321
322	sound_pins: sound {
323		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
324		function = "ssi";
325	};
326
327	sound_clk_pins: sound-clk {
328		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
329			 "audio_clkout_a", "audio_clkout3_a";
330		function = "audio_clk";
331	};
332
333	usb1_pins: usb1 {
334		groups = "usb1";
335		function = "usb1";
336	};
337};
338
339&rcar_sound {
340	pinctrl-0 = <&sound_pins &sound_clk_pins>;
341	pinctrl-names = "default";
342
343	/* Single DAI */
344	#sound-dai-cells = <0>;
345
346	/* audio_clkout0/1/2/3 */
347	#clock-cells = <1>;
348	clock-frequency = <12288000 11289600>;
349
350	status = "okay";
351
352	/* update <audio_clk_b> to <cs2000> */
353	clocks = <&cpg CPG_MOD 1005>,
354		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
355		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
356		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
357		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
358		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
359		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
360		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
361		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
362		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
363		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
364		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
365		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
366		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
367		 <&audio_clk_a>, <&cs2000>,
368		 <&audio_clk_c>,
369		 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
370
371	rcar_sound,dai {
372		dai0 {
373			playback = <&ssi0 &src0 &dvc0>;
374			capture  = <&ssi1 &src1 &dvc1>;
375		};
376	};
377};
378
379&scif2 {
380	pinctrl-0 = <&scif2_pins>;
381	pinctrl-names = "default";
382
383	status = "okay";
384};
385
386&scif_clk {
387	clock-frequency = <14745600>;
388};
389
390&sdhi0 {
391	pinctrl-0 = <&sdhi0_pins>;
392	pinctrl-1 = <&sdhi0_pins_uhs>;
393	pinctrl-names = "default", "state_uhs";
394
395	vmmc-supply = <&vcc_sdhi0>;
396	vqmmc-supply = <&vccq_sdhi0>;
397	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
398	bus-width = <4>;
399	sd-uhs-sdr50;
400	status = "okay";
401};
402
403&sdhi2 {
404	/* used for on-board 8bit eMMC */
405	pinctrl-0 = <&sdhi2_pins>;
406	pinctrl-1 = <&sdhi2_pins_uhs>;
407	pinctrl-names = "default", "state_uhs";
408
409	vmmc-supply = <&reg_3p3v>;
410	vqmmc-supply = <&reg_1p8v>;
411	bus-width = <8>;
412	mmc-hs200-1_8v;
413	non-removable;
414	status = "okay";
415};
416
417&ssi1 {
418	shared-pin;
419};
420
421&usb2_phy1 {
422	pinctrl-0 = <&usb1_pins>;
423	pinctrl-names = "default";
424
425	status = "okay";
426};
427
428&wdt0 {
429	timeout-sec = <60>;
430	status = "okay";
431};
432