xref: /openbmc/u-boot/arch/arm/dts/ulcb.dtsi (revision 8f240a3b) 
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2.  This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14
15/ {
16	model = "Renesas R-Car Gen3 ULCB board";
17
18	aliases {
19		serial0 = &scif2;
20		ethernet0 = &avb;
21	};
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26
27	cpld {
28		compatible = "renesas,ulcb-cpld";
29		status = "okay";
30		gpio-sck = <&gpio6 8 0>;
31		gpio-mosi = <&gpio6 7 0>;
32		gpio-miso = <&gpio6 10 0>;
33		gpio-sstbz = <&gpio2 3 0>;
34	};
35
36	audio_clkout: audio-clkout {
37		/*
38		 * This is same as <&rcar_sound 0>
39		 * but needed to avoid cs2000/rcar_sound probe dead-lock
40		 */
41		compatible = "fixed-clock";
42		#clock-cells = <0>;
43		clock-frequency = <11289600>;
44	};
45
46	hdmi0-out {
47		compatible = "hdmi-connector";
48		type = "a";
49
50		port {
51			hdmi0_con: endpoint {
52			};
53		};
54	};
55
56	keyboard {
57		compatible = "gpio-keys";
58
59		key-1 {
60			linux,code = <KEY_1>;
61			label = "SW3";
62			wakeup-source;
63			debounce-interval = <20>;
64			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
65		};
66	};
67
68	leds {
69		compatible = "gpio-leds";
70
71		led5 {
72			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
73		};
74		led6 {
75			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
76		};
77	};
78
79	reg_1p8v: regulator0 {
80		compatible = "regulator-fixed";
81		regulator-name = "fixed-1.8V";
82		regulator-min-microvolt = <1800000>;
83		regulator-max-microvolt = <1800000>;
84		regulator-boot-on;
85		regulator-always-on;
86	};
87
88	reg_3p3v: regulator1 {
89		compatible = "regulator-fixed";
90		regulator-name = "fixed-3.3V";
91		regulator-min-microvolt = <3300000>;
92		regulator-max-microvolt = <3300000>;
93		regulator-boot-on;
94		regulator-always-on;
95	};
96
97	rsnd_ak4613: sound {
98		compatible = "simple-audio-card";
99
100		simple-audio-card,format = "left_j";
101		simple-audio-card,bitclock-master = <&sndcpu>;
102		simple-audio-card,frame-master = <&sndcpu>;
103
104		sndcpu: simple-audio-card,cpu {
105			sound-dai = <&rcar_sound>;
106		};
107
108		sndcodec: simple-audio-card,codec {
109			sound-dai = <&ak4613>;
110		};
111	};
112
113	vcc_sdhi0: regulator-vcc-sdhi0 {
114		compatible = "regulator-fixed";
115
116		regulator-name = "SDHI0 Vcc";
117		regulator-min-microvolt = <3300000>;
118		regulator-max-microvolt = <3300000>;
119
120		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
121		enable-active-high;
122	};
123
124	vccq_sdhi0: regulator-vccq-sdhi0 {
125		compatible = "regulator-gpio";
126
127		regulator-name = "SDHI0 VccQ";
128		regulator-min-microvolt = <1800000>;
129		regulator-max-microvolt = <3300000>;
130
131		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
132		gpios-states = <1>;
133		states = <3300000 1
134			  1800000 0>;
135	};
136
137	x12_clk: x12 {
138		compatible = "fixed-clock";
139		#clock-cells = <0>;
140		clock-frequency = <24576000>;
141	};
142
143	x23_clk: x23-clock {
144		compatible = "fixed-clock";
145		#clock-cells = <0>;
146		clock-frequency = <25000000>;
147	};
148};
149
150&audio_clk_a {
151	clock-frequency = <22579200>;
152};
153
154&avb {
155	pinctrl-0 = <&avb_pins>;
156	pinctrl-names = "default";
157	renesas,no-ether-link;
158	phy-handle = <&phy0>;
159	reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
160	status = "okay";
161
162	phy0: ethernet-phy@0 {
163		rxc-skew-ps = <1500>;
164		reg = <0>;
165		interrupt-parent = <&gpio2>;
166		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
167	};
168};
169
170&ehci1 {
171	status = "okay";
172};
173
174&extal_clk {
175	clock-frequency = <16666666>;
176};
177
178&extalr_clk {
179	clock-frequency = <32768>;
180};
181
182&hdmi0 {
183	status = "okay";
184
185	ports {
186		port@1 {
187			reg = <1>;
188			rcar_dw_hdmi0_out: endpoint {
189				remote-endpoint = <&hdmi0_con>;
190			};
191		};
192	};
193};
194
195&hdmi0_con {
196	remote-endpoint = <&rcar_dw_hdmi0_out>;
197};
198
199&i2c2 {
200	pinctrl-0 = <&i2c2_pins>;
201	pinctrl-names = "default";
202
203	status = "okay";
204
205	clock-frequency = <100000>;
206
207	ak4613: codec@10 {
208		compatible = "asahi-kasei,ak4613";
209		#sound-dai-cells = <0>;
210		reg = <0x10>;
211		clocks = <&rcar_sound 3>;
212
213		asahi-kasei,in1-single-end;
214		asahi-kasei,in2-single-end;
215		asahi-kasei,out1-single-end;
216		asahi-kasei,out2-single-end;
217		asahi-kasei,out3-single-end;
218		asahi-kasei,out4-single-end;
219		asahi-kasei,out5-single-end;
220		asahi-kasei,out6-single-end;
221	};
222
223	cs2000: clk-multiplier@4f {
224		#clock-cells = <0>;
225		compatible = "cirrus,cs2000-cp";
226		reg = <0x4f>;
227		clocks = <&audio_clkout>, <&x12_clk>;
228		clock-names = "clk_in", "ref_clk";
229
230		assigned-clocks = <&cs2000>;
231		assigned-clock-rates = <24576000>; /* 1/1 divide */
232	};
233};
234
235&i2c4 {
236	status = "okay";
237
238	clock-frequency = <400000>;
239
240	versaclock5: clock-generator@6a {
241		compatible = "idt,5p49v5925";
242		reg = <0x6a>;
243		#clock-cells = <1>;
244		clocks = <&x23_clk>;
245		clock-names = "xin";
246	};
247};
248
249&i2c_dvfs {
250	status = "okay";
251};
252
253&ohci1 {
254	status = "okay";
255};
256
257&pfc {
258	pinctrl-0 = <&scif_clk_pins>;
259	pinctrl-names = "default";
260
261	avb_pins: avb {
262		mux {
263			groups = "avb_link", "avb_phy_int", "avb_mdc",
264				 "avb_mii";
265			function = "avb";
266		};
267
268		pins_mdc {
269			groups = "avb_mdc";
270			drive-strength = <24>;
271		};
272
273		pins_mii_tx {
274			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
275			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
276			drive-strength = <12>;
277		};
278	};
279
280	i2c2_pins: i2c2 {
281		groups = "i2c2_a";
282		function = "i2c2";
283	};
284
285	scif2_pins: scif2 {
286		groups = "scif2_data_a";
287		function = "scif2";
288	};
289
290	scif_clk_pins: scif_clk {
291		groups = "scif_clk_a";
292		function = "scif_clk";
293	};
294
295	sdhi0_pins: sd0 {
296		groups = "sdhi0_data4", "sdhi0_ctrl";
297		function = "sdhi0";
298		power-source = <3300>;
299	};
300
301	sdhi0_pins_uhs: sd0_uhs {
302		groups = "sdhi0_data4", "sdhi0_ctrl";
303		function = "sdhi0";
304		power-source = <1800>;
305	};
306
307	sdhi2_pins: sd2 {
308		groups = "sdhi2_data8", "sdhi2_ctrl";
309		function = "sdhi2";
310		power-source = <1800>;
311	};
312
313	sdhi2_pins_uhs: sd2_uhs {
314		groups = "sdhi2_data8", "sdhi2_ctrl";
315		function = "sdhi2";
316		power-source = <1800>;
317	};
318
319	sound_pins: sound {
320		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
321		function = "ssi";
322	};
323
324	sound_clk_pins: sound-clk {
325		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
326			 "audio_clkout_a", "audio_clkout3_a";
327		function = "audio_clk";
328	};
329
330	usb1_pins: usb1 {
331		groups = "usb1";
332		function = "usb1";
333	};
334};
335
336&rcar_sound {
337	pinctrl-0 = <&sound_pins &sound_clk_pins>;
338	pinctrl-names = "default";
339
340	/* Single DAI */
341	#sound-dai-cells = <0>;
342
343	/* audio_clkout0/1/2/3 */
344	#clock-cells = <1>;
345	clock-frequency = <12288000 11289600>;
346
347	status = "okay";
348
349	/* update <audio_clk_b> to <cs2000> */
350	clocks = <&cpg CPG_MOD 1005>,
351		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
352		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
353		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
354		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
355		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
356		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
357		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
358		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
359		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
360		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
361		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
362		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
363		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
364		 <&audio_clk_a>, <&cs2000>,
365		 <&audio_clk_c>,
366		 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
367
368	rcar_sound,dai {
369		dai0 {
370			playback = <&ssi0 &src0 &dvc0>;
371			capture  = <&ssi1 &src1 &dvc1>;
372		};
373	};
374};
375
376&scif2 {
377	pinctrl-0 = <&scif2_pins>;
378	pinctrl-names = "default";
379
380	status = "okay";
381};
382
383&scif_clk {
384	clock-frequency = <14745600>;
385};
386
387&sdhi0 {
388	pinctrl-0 = <&sdhi0_pins>;
389	pinctrl-1 = <&sdhi0_pins_uhs>;
390	pinctrl-names = "default", "state_uhs";
391
392	vmmc-supply = <&vcc_sdhi0>;
393	vqmmc-supply = <&vccq_sdhi0>;
394	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
395	bus-width = <4>;
396	sd-uhs-sdr50;
397	status = "okay";
398};
399
400&sdhi2 {
401	/* used for on-board 8bit eMMC */
402	pinctrl-0 = <&sdhi2_pins>;
403	pinctrl-1 = <&sdhi2_pins_uhs>;
404	pinctrl-names = "default", "state_uhs";
405
406	vmmc-supply = <&reg_3p3v>;
407	vqmmc-supply = <&reg_1p8v>;
408	bus-width = <8>;
409	mmc-hs200-1_8v;
410	non-removable;
411	status = "okay";
412};
413
414&ssi1 {
415	shared-pin;
416};
417
418&usb2_phy1 {
419	pinctrl-0 = <&usb1_pins>;
420	pinctrl-names = "default";
421
422	status = "okay";
423};
424
425&wdt0 {
426	timeout-sec = <60>;
427	status = "okay";
428};
429