1/dts-v1/;
2
3#include "tegra30.dtsi"
4
5/ {
6	model = "Toradex Colibri T30";
7	compatible = "toradex,colibri_t30", "nvidia,tegra30";
8
9	chosen {
10		stdout-path = &uarta;
11	};
12
13	aliases {
14		i2c0 = "/i2c@7000d000";
15		i2c1 = "/i2c@7000c000";
16		i2c2 = "/i2c@7000c700";
17		mmc0 = "/sdhci@78000600";
18		mmc1 = "/sdhci@78000200";
19		spi0 = "/spi@7000d400";
20		usb0 = "/usb@7d000000";
21		usb1 = "/usb@7d004000"; /* on module only, for ASIX */
22		usb2 = "/usb@7d008000";
23	};
24
25	memory {
26		device_type = "memory";
27		reg = <0x80000000 0x40000000>;
28	};
29
30	/*
31	 * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
32	 * board)
33	 */
34	i2c@7000c000 {
35		status = "okay";
36		clock-frequency = <100000>;
37	};
38
39	/* GEN2_I2C: unused */
40
41	/* CAM_I2C: unused */
42
43	/* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
44	i2c@7000c700 {
45		status = "okay";
46		clock-frequency = <100000>;
47	};
48
49	/*
50	 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
51	 * touch screen controller
52	 */
53	i2c@7000d000 {
54		status = "okay";
55		clock-frequency = <100000>;
56	};
57
58	/* SPI1: Colibri SSP */
59	spi@7000d400 {
60		status = "okay";
61		spi-max-frequency = <25000000>;
62	};
63
64	sdhci@78000200 {
65		status = "okay";
66		bus-width = <4>;
67		cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
68	};
69
70	sdhci@78000600 {
71		status = "okay";
72		bus-width = <8>;
73		non-removable;
74	};
75
76	/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
77	usb@7d000000 {
78		status = "okay";
79		dr_mode = "otg";
80	};
81
82	/* EHCI instance 1: USB2_DP/N -> AX88772B */
83	usb@7d004000 {
84		status = "okay";
85		/* VBUS_LAN */
86		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
87	};
88
89	/* EHCI instance 2: USB3_DP/N -> USBH_P/N */
90	usb@7d008000 {
91		status = "okay";
92		/* USBH_PEN */
93		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
94	};
95
96	clocks {
97		compatible = "simple-bus";
98		#address-cells = <1>;
99		#size-cells = <0>;
100
101		clk32k_in: clk@0 {
102			compatible = "fixed-clock";
103			reg=<0>;
104			#clock-cells = <0>;
105			clock-frequency = <32768>;
106		};
107	};
108};
109