1/dts-v1/; 2 3#include "tegra30.dtsi" 4 5/ { 6 model = "Toradex Apalis T30"; 7 compatible = "toradex,apalis_t30", "nvidia,tegra30"; 8 9 chosen { 10 stdout-path = &uarta; 11 }; 12 13 aliases { 14 i2c0 = "/i2c@7000d000"; 15 i2c1 = "/i2c@7000c000"; 16 i2c2 = "/i2c@7000c500"; 17 i2c3 = "/i2c@7000c700"; 18 mmc0 = "/sdhci@78000600"; 19 mmc1 = "/sdhci@78000400"; 20 mmc2 = "/sdhci@78000000"; 21 spi0 = "/spi@7000d400"; 22 spi1 = "/spi@7000dc00"; 23 spi2 = "/spi@7000de00"; 24 spi3 = "/spi@7000da00"; 25 usb0 = "/usb@7d000000"; 26 usb1 = "/usb@7d004000"; 27 usb2 = "/usb@7d008000"; 28 }; 29 30 memory { 31 device_type = "memory"; 32 reg = <0x80000000 0x40000000>; 33 }; 34 35 pcie-controller@00003000 { 36 status = "okay"; 37 avdd-pexa-supply = <&vdd2_reg>; 38 vdd-pexa-supply = <&vdd2_reg>; 39 avdd-pexb-supply = <&vdd2_reg>; 40 vdd-pexb-supply = <&vdd2_reg>; 41 avdd-pex-pll-supply = <&vdd2_reg>; 42 avdd-plle-supply = <&ldo6_reg>; 43 vddio-pex-ctl-supply = <&sys_3v3_reg>; 44 hvdd-pex-supply = <&sys_3v3_reg>; 45 46 /* Apalis Type Specific 4 Lane PCIe */ 47 pci@1,0 { 48 /* TS_DIFF1/2/3/4 left disabled */ 49 nvidia,num-lanes = <4>; 50 }; 51 52 /* Apalis PCIe */ 53 pci@2,0 { 54 /* PCIE1_RX/TX left disabled */ 55 nvidia,num-lanes = <1>; 56 }; 57 58 /* I210 Gigabit Ethernet Controller (On-module) */ 59 pci@3,0 { 60 status = "okay"; 61 nvidia,num-lanes = <1>; 62 }; 63 }; 64 65 /* 66 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier 67 * board) 68 */ 69 i2c@7000c000 { 70 status = "okay"; 71 clock-frequency = <400000>; 72 }; 73 74 /* GEN2_I2C: unused */ 75 76 /* 77 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on 78 * carrier board) 79 */ 80 i2c@7000c500 { 81 status = "okay"; 82 clock-frequency = <400000>; 83 }; 84 85 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */ 86 i2c@7000c700 { 87 status = "okay"; 88 clock-frequency = <10000>; 89 }; 90 91 /* 92 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and 93 * touch screen controller 94 */ 95 i2c@7000d000 { 96 status = "okay"; 97 clock-frequency = <100000>; 98 99 pmic: tps65911@2d { 100 compatible = "ti,tps65911"; 101 reg = <0x2d>; 102 103 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 104 #interrupt-cells = <2>; 105 interrupt-controller; 106 107 ti,system-power-controller; 108 109 #gpio-cells = <2>; 110 gpio-controller; 111 112 vcc1-supply = <&sys_3v3_reg>; 113 vcc2-supply = <&sys_3v3_reg>; 114 vcc3-supply = <&vio_reg>; 115 vcc4-supply = <&sys_3v3_reg>; 116 vcc5-supply = <&sys_3v3_reg>; 117 vcc6-supply = <&vio_reg>; 118 vcc7-supply = <&charge_pump_5v0_reg>; 119 vccio-supply = <&sys_3v3_reg>; 120 121 regulators { 122 #address-cells = <1>; 123 #size-cells = <0>; 124 125 /* SW1: +V1.35_VDDIO_DDR */ 126 vdd1_reg: vdd1 { 127 regulator-name = "vddio_ddr_1v35"; 128 regulator-min-microvolt = <1350000>; 129 regulator-max-microvolt = <1350000>; 130 regulator-always-on; 131 }; 132 133 /* SW2: +V1.05 */ 134 vdd2_reg: vdd2 { 135 regulator-name = 136 "vdd_pexa,vdd_pexb,vdd_sata"; 137 regulator-min-microvolt = <1050000>; 138 regulator-max-microvolt = <1050000>; 139 }; 140 141 /* SW CTRL: +V1.0_VDD_CPU */ 142 vddctrl_reg: vddctrl { 143 regulator-name = "vdd_cpu,vdd_sys"; 144 regulator-min-microvolt = <1150000>; 145 regulator-max-microvolt = <1150000>; 146 regulator-always-on; 147 }; 148 149 /* SWIO: +V1.8 */ 150 vio_reg: vio { 151 regulator-name = "vdd_1v8_gen"; 152 regulator-min-microvolt = <1800000>; 153 regulator-max-microvolt = <1800000>; 154 regulator-always-on; 155 }; 156 157 /* LDO1: unused */ 158 159 /* 160 * EN_+V3.3 switching via FET: 161 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN 162 * see also v3_3 fixed supply 163 */ 164 ldo2_reg: ldo2 { 165 regulator-name = "en_3v3"; 166 regulator-min-microvolt = <3300000>; 167 regulator-max-microvolt = <3300000>; 168 regulator-always-on; 169 }; 170 171 /* +V1.2_CSI */ 172 ldo3_reg: ldo3 { 173 regulator-name = 174 "avdd_dsi_csi,pwrdet_mipi"; 175 regulator-min-microvolt = <1200000>; 176 regulator-max-microvolt = <1200000>; 177 }; 178 179 /* +V1.2_VDD_RTC */ 180 ldo4_reg: ldo4 { 181 regulator-name = "vdd_rtc"; 182 regulator-min-microvolt = <1200000>; 183 regulator-max-microvolt = <1200000>; 184 regulator-always-on; 185 }; 186 187 /* 188 * +V2.8_AVDD_VDAC: 189 * only required for analog RGB 190 */ 191 ldo5_reg: ldo5 { 192 regulator-name = "avdd_vdac"; 193 regulator-min-microvolt = <2800000>; 194 regulator-max-microvolt = <2800000>; 195 regulator-always-on; 196 }; 197 198 /* 199 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V 200 * but LDO6 can't set voltage in 50mV 201 * granularity 202 */ 203 ldo6_reg: ldo6 { 204 regulator-name = "avdd_plle"; 205 regulator-min-microvolt = <1100000>; 206 regulator-max-microvolt = <1100000>; 207 }; 208 209 /* +V1.2_AVDD_PLL */ 210 ldo7_reg: ldo7 { 211 regulator-name = "avdd_pll"; 212 regulator-min-microvolt = <1200000>; 213 regulator-max-microvolt = <1200000>; 214 regulator-always-on; 215 }; 216 217 /* +V1.0_VDD_DDR_HS */ 218 ldo8_reg: ldo8 { 219 regulator-name = "vdd_ddr_hs"; 220 regulator-min-microvolt = <1000000>; 221 regulator-max-microvolt = <1000000>; 222 regulator-always-on; 223 }; 224 }; 225 }; 226 }; 227 228 /* SPI1: Apalis SPI1 */ 229 spi@7000d400 { 230 status = "okay"; 231 spi-max-frequency = <25000000>; 232 }; 233 234 /* SPI4: CAN2 */ 235 spi@7000da00 { 236 status = "okay"; 237 spi-max-frequency = <25000000>; 238 }; 239 240 /* SPI5: Apalis SPI2 */ 241 spi@7000dc00 { 242 status = "okay"; 243 spi-max-frequency = <25000000>; 244 }; 245 246 /* SPI6: CAN1 */ 247 spi@7000de00 { 248 status = "okay"; 249 spi-max-frequency = <25000000>; 250 }; 251 252 sdhci@78000000 { 253 status = "okay"; 254 bus-width = <4>; 255 /* SD1_CD# */ 256 cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>; 257 }; 258 259 sdhci@78000400 { 260 status = "okay"; 261 bus-width = <8>; 262 /* MMC1_CD# */ 263 cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>; 264 }; 265 266 sdhci@78000600 { 267 status = "okay"; 268 bus-width = <8>; 269 non-removable; 270 }; 271 272 /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */ 273 usb@7d000000 { 274 status = "okay"; 275 dr_mode = "otg"; 276 /* USBO1_EN */ 277 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>; 278 }; 279 280 /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */ 281 usb@7d004000 { 282 status = "okay"; 283 /* USBH_EN */ 284 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>; 285 }; 286 287 /* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */ 288 usb@7d008000 { 289 status = "okay"; 290 /* USBH_EN */ 291 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>; 292 }; 293 294 clocks { 295 compatible = "simple-bus"; 296 #address-cells = <1>; 297 #size-cells = <0>; 298 299 clk32k_in: clk@0 { 300 compatible = "fixed-clock"; 301 reg=<0>; 302 #clock-cells = <0>; 303 clock-frequency = <32768>; 304 }; 305 clk16m: clk@1 { 306 compatible = "fixed-clock"; 307 reg=<1>; 308 #clock-cells = <0>; 309 clock-frequency = <16000000>; 310 clock-output-names = "clk16m"; 311 }; 312 }; 313 314 regulators { 315 compatible = "simple-bus"; 316 #address-cells = <1>; 317 #size-cells = <0>; 318 319 sys_3v3_reg: regulator@100 { 320 compatible = "regulator-fixed"; 321 reg = <100>; 322 regulator-name = "3v3"; 323 regulator-min-microvolt = <3300000>; 324 regulator-max-microvolt = <3300000>; 325 regulator-always-on; 326 }; 327 328 charge_pump_5v0_reg: regulator@101 { 329 compatible = "regulator-fixed"; 330 reg = <101>; 331 regulator-name = "5v0"; 332 regulator-min-microvolt = <5000000>; 333 regulator-max-microvolt = <5000000>; 334 regulator-always-on; 335 }; 336 }; 337}; 338 339&uarta { 340 status = "okay"; 341}; 342