1/include/ "skeleton.dtsi" 2 3/ { 4 compatible = "nvidia,tegra20"; 5 interrupt-parent = <&intc>; 6 7 intc: interrupt-controller@50041000 { 8 compatible = "nvidia,tegra20-gic"; 9 interrupt-controller; 10 #interrupt-cells = <1>; 11 reg = < 0x50041000 0x1000 >, 12 < 0x50040100 0x0100 >; 13 }; 14 15 i2c@7000c000 { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 compatible = "nvidia,tegra20-i2c"; 19 reg = <0x7000C000 0x100>; 20 interrupts = < 70 >; 21 }; 22 23 i2c@7000c400 { 24 #address-cells = <1>; 25 #size-cells = <0>; 26 compatible = "nvidia,tegra20-i2c"; 27 reg = <0x7000C400 0x100>; 28 interrupts = < 116 >; 29 }; 30 31 i2c@7000c500 { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 compatible = "nvidia,tegra20-i2c"; 35 reg = <0x7000C500 0x100>; 36 interrupts = < 124 >; 37 }; 38 39 i2c@7000d000 { 40 #address-cells = <1>; 41 #size-cells = <0>; 42 compatible = "nvidia,tegra20-i2c"; 43 reg = <0x7000D000 0x200>; 44 interrupts = < 85 >; 45 }; 46 47 i2s@70002800 { 48 #address-cells = <1>; 49 #size-cells = <0>; 50 compatible = "nvidia,tegra20-i2s"; 51 reg = <0x70002800 0x200>; 52 interrupts = < 45 >; 53 dma-channel = < 2 >; 54 }; 55 56 i2s@70002a00 { 57 #address-cells = <1>; 58 #size-cells = <0>; 59 compatible = "nvidia,tegra20-i2s"; 60 reg = <0x70002a00 0x200>; 61 interrupts = < 35 >; 62 dma-channel = < 1 >; 63 }; 64 65 das@70000c00 { 66 #address-cells = <1>; 67 #size-cells = <0>; 68 compatible = "nvidia,tegra20-das"; 69 reg = <0x70000c00 0x80>; 70 }; 71 72 gpio: gpio@6000d000 { 73 compatible = "nvidia,tegra20-gpio"; 74 reg = < 0x6000d000 0x1000 >; 75 interrupts = < 64 65 66 67 87 119 121 >; 76 #gpio-cells = <2>; 77 gpio-controller; 78 }; 79 80 pinmux: pinmux@70000000 { 81 compatible = "nvidia,tegra20-pinmux"; 82 reg = < 0x70000014 0x10 /* Tri-state registers */ 83 0x70000080 0x20 /* Mux registers */ 84 0x700000a0 0x14 /* Pull-up/down registers */ 85 0x70000868 0xa8 >; /* Pad control registers */ 86 }; 87 88 serial@70006000 { 89 compatible = "nvidia,tegra20-uart"; 90 reg = <0x70006000 0x40>; 91 reg-shift = <2>; 92 interrupts = < 68 >; 93 }; 94 95 serial@70006040 { 96 compatible = "nvidia,tegra20-uart"; 97 reg = <0x70006040 0x40>; 98 reg-shift = <2>; 99 interrupts = < 69 >; 100 }; 101 102 serial@70006200 { 103 compatible = "nvidia,tegra20-uart"; 104 reg = <0x70006200 0x100>; 105 reg-shift = <2>; 106 interrupts = < 78 >; 107 }; 108 109 serial@70006300 { 110 compatible = "nvidia,tegra20-uart"; 111 reg = <0x70006300 0x100>; 112 reg-shift = <2>; 113 interrupts = < 122 >; 114 }; 115 116 serial@70006400 { 117 compatible = "nvidia,tegra20-uart"; 118 reg = <0x70006400 0x100>; 119 reg-shift = <2>; 120 interrupts = < 123 >; 121 }; 122 123 sdhci@c8000000 { 124 compatible = "nvidia,tegra20-sdhci"; 125 reg = <0xc8000000 0x200>; 126 interrupts = < 46 >; 127 }; 128 129 sdhci@c8000200 { 130 compatible = "nvidia,tegra20-sdhci"; 131 reg = <0xc8000200 0x200>; 132 interrupts = < 47 >; 133 }; 134 135 sdhci@c8000400 { 136 compatible = "nvidia,tegra20-sdhci"; 137 reg = <0xc8000400 0x200>; 138 interrupts = < 51 >; 139 }; 140 141 sdhci@c8000600 { 142 compatible = "nvidia,tegra20-sdhci"; 143 reg = <0xc8000600 0x200>; 144 interrupts = < 63 >; 145 }; 146 147 usb@c5000000 { 148 compatible = "nvidia,tegra20-ehci", "usb-ehci"; 149 reg = <0xc5000000 0x4000>; 150 interrupts = < 52 >; 151 phy_type = "utmi"; 152 }; 153 154 usb@c5004000 { 155 compatible = "nvidia,tegra20-ehci", "usb-ehci"; 156 reg = <0xc5004000 0x4000>; 157 interrupts = < 53 >; 158 phy_type = "ulpi"; 159 }; 160 161 usb@c5008000 { 162 compatible = "nvidia,tegra20-ehci", "usb-ehci"; 163 reg = <0xc5008000 0x4000>; 164 interrupts = < 129 >; 165 phy_type = "utmi"; 166 }; 167 168}; 169