1/dts-v1/;
2
3#include "tegra20.dtsi"
4
5/ {
6	model = "NVIDIA Seaboard";
7	compatible = "nvidia,seaboard", "nvidia,tegra20";
8
9	chosen {
10		bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
11	};
12
13	aliases {
14		/* This defines the order of our ports */
15		usb0 = "/usb@c5008000";
16		usb1 = "/usb@c5000000";
17		i2c0 = "/i2c@7000d000";
18		i2c1 = "/i2c@7000c000";
19		i2c2 = "/i2c@7000c400";
20		i2c3 = "/i2c@7000c500";
21		sdhci0 = "/sdhci@c8000600";
22		sdhci1 = "/sdhci@c8000400";
23	};
24
25	memory {
26		device_type = "memory";
27		reg = < 0x00000000 0x40000000 >;
28	};
29
30	host1x {
31		status = "okay";
32		dc@54200000 {
33			status = "okay";
34			rgb {
35				status = "okay";
36				nvidia,panel = <&lcd_panel>;
37			};
38		};
39	};
40
41	/* This is not used in U-Boot, but is expected to be in kernel .dts */
42	i2c@7000d000 {
43		clock-frequency = <100000>;
44		pmic@34 {
45			compatible = "ti,tps6586x";
46			reg = <0x34>;
47
48			clk_32k: clock {
49				compatible = "fixed-clock";
50				/*
51				 * leave out for now due to CPP:
52				 * #clock-cells = <0>;
53				 */
54				clock-frequency = <32768>;
55			};
56		};
57	};
58
59	serial@70006300 {
60		clock-frequency = < 216000000 >;
61	};
62
63	nand-controller@70008000 {
64		nvidia,wp-gpios = <&gpio 59 0>;		/* PH3 */
65		nvidia,width = <8>;
66		nvidia,timing = <26 100 20 80 20 10 12 10 70>;
67		nand@0 {
68			reg = <0>;
69			compatible = "hynix,hy27uf4g2b", "nand-flash";
70		};
71	};
72
73	i2c@7000c000 {
74		clock-frequency = <100000>;
75	};
76
77	i2c@7000c400 {
78		status = "disabled";
79	};
80
81	i2c@7000c500 {
82		clock-frequency = <100000>;
83	};
84
85	kbc@7000e200 {
86		linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c
87			0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006
88			0x03010005 0x03020013 0x03030012 0x03040021 0x03050020
89			0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023
90			0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a
91			0x05010009 0x05020016 0x05030015 0x05040024 0x05050031
92			0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018
93			0x06030017 0x06040026 0x06050025 0x06060033 0x06070032
94			0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036
95			0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019
96			0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044
97			0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067
98			0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068
99			0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057
100			0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d
101			0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f
102			0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040
103			0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f
104			0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050
105			0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053
106			0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072
107			0x1d0700e1 0x1e000045 0x1e010046 0x1e020071
108			0x1f04008a>;
109		linux,fn-keymap = <0x05040002>;
110	};
111
112	emc@7000f400 {
113		emc-table@190000 {
114			reg = < 190000 >;
115			compatible = "nvidia,tegra20-emc-table";
116			clock-frequency = < 190000 >;
117			nvidia,emc-registers = < 0x0000000c 0x00000026
118				0x00000009 0x00000003 0x00000004 0x00000004
119				0x00000002 0x0000000c 0x00000003 0x00000003
120				0x00000002 0x00000001 0x00000004 0x00000005
121				0x00000004 0x00000009 0x0000000d 0x0000059f
122				0x00000000 0x00000003 0x00000003 0x00000003
123				0x00000003 0x00000001 0x0000000b 0x000000c8
124				0x00000003 0x00000007 0x00000004 0x0000000f
125				0x00000002 0x00000000 0x00000000 0x00000002
126				0x00000000 0x00000000 0x00000083 0xa06204ae
127				0x007dc010 0x00000000 0x00000000 0x00000000
128				0x00000000 0x00000000 0x00000000 0x00000000 >;
129		};
130		emc-table@380000 {
131			reg = < 380000 >;
132			compatible = "nvidia,tegra20-emc-table";
133			clock-frequency = < 380000 >;
134			nvidia,emc-registers = < 0x00000017 0x0000004b
135				0x00000012 0x00000006 0x00000004 0x00000005
136				0x00000003 0x0000000c 0x00000006 0x00000006
137				0x00000003 0x00000001 0x00000004 0x00000005
138				0x00000004 0x00000009 0x0000000d 0x00000b5f
139				0x00000000 0x00000003 0x00000003 0x00000006
140				0x00000006 0x00000001 0x00000011 0x000000c8
141				0x00000003 0x0000000e 0x00000007 0x0000000f
142				0x00000002 0x00000000 0x00000000 0x00000002
143				0x00000000 0x00000000 0x00000083 0xe044048b
144				0x007d8010 0x00000000 0x00000000 0x00000000
145				0x00000000 0x00000000 0x00000000 0x00000000 >;
146		};
147	};
148
149	usb@c5000000 {
150		nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
151		dr_mode = "otg";
152	};
153
154	usb@c5004000 {
155		status = "disabled";
156	};
157
158	sdhci@c8000400 {
159		status = "okay";
160		cd-gpios = <&gpio 69 1>; /* gpio PI5 */
161		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
162		power-gpios = <&gpio 70 0>; /* gpio PI6 */
163		bus-width = <4>;
164	};
165
166	sdhci@c8000600 {
167		status = "okay";
168		bus-width = <8>;
169	};
170
171	lcd_panel: panel {
172		/* Seaboard has 1366x768 */
173		clock = <70600000>;
174		xres = <1366>;
175		yres = <768>;
176		left-margin = <58>;
177		right-margin = <58>;
178		hsync-len = <58>;
179		lower-margin = <4>;
180		upper-margin = <4>;
181		vsync-len = <4>;
182		hsync-active-high;
183		nvidia,bits-per-pixel = <16>;
184		nvidia,pwm = <&pwm 2 0>;
185		nvidia,backlight-enable-gpios = <&gpio 28 0>;	/* PD4 */
186		nvidia,lvds-shutdown-gpios = <&gpio 10 0>;	/* PB2 */
187		nvidia,backlight-vdd-gpios = <&gpio 176 0>;	/* PW0 */
188		nvidia,panel-vdd-gpios = <&gpio 22 0>;		/* PC6 */
189		nvidia,panel-timings = <400 4 203 17 15>;
190	};
191};
192