1/dts-v1/; 2 3#include <dt-bindings/input/input.h> 4#include "tegra20.dtsi" 5 6/ { 7 model = "NVIDIA Tegra20 Harmony evaluation board"; 8 compatible = "nvidia,harmony", "nvidia,tegra20"; 9 10 chosen { 11 stdout-path = &uartd; 12 }; 13 14 aliases { 15 rtc0 = "/i2c@7000d000/tps6586x@34"; 16 rtc1 = "/rtc@7000e000"; 17 serial0 = &uartd; 18 usb0 = "/usb@c5008000"; 19 usb1 = "/usb@c5004000"; 20 sdhci0 = "/sdhci@c8000600"; 21 sdhci1 = "/sdhci@c8000200"; 22 }; 23 24 memory { 25 reg = <0x00000000 0x40000000>; 26 }; 27 28 host1x@50000000 { 29 status = "okay"; 30 dc@54200000 { 31 status = "okay"; 32 rgb { 33 status = "okay"; 34 35 nvidia,panel = <&panel>; 36 37 display-timings { 38 timing@0 { 39 /* Seaboard has 1366x768 */ 40 clock-frequency = <42430000>; 41 hactive = <1024>; 42 vactive = <600>; 43 hback-porch = <138>; 44 hfront-porch = <34>; 45 hsync-len = <136>; 46 vback-porch = <21>; 47 vfront-porch = <4>; 48 vsync-len = <4>; 49 }; 50 }; 51 }; 52 }; 53 54 hdmi@54280000 { 55 status = "okay"; 56 57 hdmi-supply = <&vdd_5v0_hdmi>; 58 vdd-supply = <&hdmi_vdd_reg>; 59 pll-supply = <&hdmi_pll_reg>; 60 61 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 62 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) 63 GPIO_ACTIVE_HIGH>; 64 }; 65 }; 66 67 pinmux@70000014 { 68 pinctrl-names = "default"; 69 pinctrl-0 = <&state_default>; 70 71 state_default: pinmux { 72 ata { 73 nvidia,pins = "ata"; 74 nvidia,function = "ide"; 75 }; 76 atb { 77 nvidia,pins = "atb", "gma", "gme"; 78 nvidia,function = "sdio4"; 79 }; 80 atc { 81 nvidia,pins = "atc"; 82 nvidia,function = "nand"; 83 }; 84 atd { 85 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu", 86 "spia", "spib", "spic"; 87 nvidia,function = "gmi"; 88 }; 89 cdev1 { 90 nvidia,pins = "cdev1"; 91 nvidia,function = "plla_out"; 92 }; 93 cdev2 { 94 nvidia,pins = "cdev2"; 95 nvidia,function = "pllp_out4"; 96 }; 97 crtp { 98 nvidia,pins = "crtp"; 99 nvidia,function = "crt"; 100 }; 101 csus { 102 nvidia,pins = "csus"; 103 nvidia,function = "vi_sensor_clk"; 104 }; 105 dap1 { 106 nvidia,pins = "dap1"; 107 nvidia,function = "dap1"; 108 }; 109 dap2 { 110 nvidia,pins = "dap2"; 111 nvidia,function = "dap2"; 112 }; 113 dap3 { 114 nvidia,pins = "dap3"; 115 nvidia,function = "dap3"; 116 }; 117 dap4 { 118 nvidia,pins = "dap4"; 119 nvidia,function = "dap4"; 120 }; 121 ddc { 122 nvidia,pins = "ddc"; 123 nvidia,function = "i2c2"; 124 }; 125 dta { 126 nvidia,pins = "dta", "dtd"; 127 nvidia,function = "sdio2"; 128 }; 129 dtb { 130 nvidia,pins = "dtb", "dtc", "dte"; 131 nvidia,function = "rsvd1"; 132 }; 133 dtf { 134 nvidia,pins = "dtf"; 135 nvidia,function = "i2c3"; 136 }; 137 gmc { 138 nvidia,pins = "gmc"; 139 nvidia,function = "uartd"; 140 }; 141 gpu7 { 142 nvidia,pins = "gpu7"; 143 nvidia,function = "rtck"; 144 }; 145 gpv { 146 nvidia,pins = "gpv", "slxa", "slxk"; 147 nvidia,function = "pcie"; 148 }; 149 hdint { 150 nvidia,pins = "hdint", "pta"; 151 nvidia,function = "hdmi"; 152 }; 153 i2cp { 154 nvidia,pins = "i2cp"; 155 nvidia,function = "i2cp"; 156 }; 157 irrx { 158 nvidia,pins = "irrx", "irtx"; 159 nvidia,function = "uarta"; 160 }; 161 kbca { 162 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", 163 "kbce", "kbcf"; 164 nvidia,function = "kbc"; 165 }; 166 lcsn { 167 nvidia,pins = "lcsn", "ld0", "ld1", "ld2", 168 "ld3", "ld4", "ld5", "ld6", "ld7", 169 "ld8", "ld9", "ld10", "ld11", "ld12", 170 "ld13", "ld14", "ld15", "ld16", "ld17", 171 "ldc", "ldi", "lhp0", "lhp1", "lhp2", 172 "lhs", "lm0", "lm1", "lpp", "lpw0", 173 "lpw1", "lpw2", "lsc0", "lsc1", "lsck", 174 "lsda", "lsdi", "lspi", "lvp0", "lvp1", 175 "lvs"; 176 nvidia,function = "displaya"; 177 }; 178 owc { 179 nvidia,pins = "owc", "spdi", "spdo", "uac"; 180 nvidia,function = "rsvd2"; 181 }; 182 pmc { 183 nvidia,pins = "pmc"; 184 nvidia,function = "pwr_on"; 185 }; 186 rm { 187 nvidia,pins = "rm"; 188 nvidia,function = "i2c1"; 189 }; 190 sdb { 191 nvidia,pins = "sdb", "sdc", "sdd"; 192 nvidia,function = "pwm"; 193 }; 194 sdio1 { 195 nvidia,pins = "sdio1"; 196 nvidia,function = "sdio1"; 197 }; 198 slxc { 199 nvidia,pins = "slxc", "slxd"; 200 nvidia,function = "spdif"; 201 }; 202 spid { 203 nvidia,pins = "spid", "spie", "spif"; 204 nvidia,function = "spi1"; 205 }; 206 spig { 207 nvidia,pins = "spig", "spih"; 208 nvidia,function = "spi2_alt"; 209 }; 210 uaa { 211 nvidia,pins = "uaa", "uab", "uda"; 212 nvidia,function = "ulpi"; 213 }; 214 uad { 215 nvidia,pins = "uad"; 216 nvidia,function = "irda"; 217 }; 218 uca { 219 nvidia,pins = "uca", "ucb"; 220 nvidia,function = "uartc"; 221 }; 222 conf_ata { 223 nvidia,pins = "ata", "atb", "atc", "atd", "ate", 224 "cdev1", "cdev2", "dap1", "dtb", "gma", 225 "gmb", "gmc", "gmd", "gme", "gpu7", 226 "gpv", "i2cp", "pta", "rm", "slxa", 227 "slxk", "spia", "spib", "uac"; 228 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 229 nvidia,tristate = <TEGRA_PIN_DISABLE>; 230 }; 231 conf_ck32 { 232 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", 233 "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; 234 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 235 }; 236 conf_csus { 237 nvidia,pins = "csus", "spid", "spif"; 238 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 239 nvidia,tristate = <TEGRA_PIN_ENABLE>; 240 }; 241 conf_crtp { 242 nvidia,pins = "crtp", "dap2", "dap3", "dap4", 243 "dtc", "dte", "dtf", "gpu", "sdio1", 244 "slxc", "slxd", "spdi", "spdo", "spig", 245 "uda"; 246 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 247 nvidia,tristate = <TEGRA_PIN_ENABLE>; 248 }; 249 conf_ddc { 250 nvidia,pins = "ddc", "dta", "dtd", "kbca", 251 "kbcb", "kbcc", "kbcd", "kbce", "kbcf", 252 "sdc"; 253 nvidia,pull = <TEGRA_PIN_PULL_UP>; 254 nvidia,tristate = <TEGRA_PIN_DISABLE>; 255 }; 256 conf_hdint { 257 nvidia,pins = "hdint", "lcsn", "ldc", "lm1", 258 "lpw1", "lsc1", "lsck", "lsda", "lsdi", 259 "lvp0", "owc", "sdb"; 260 nvidia,tristate = <TEGRA_PIN_ENABLE>; 261 }; 262 conf_irrx { 263 nvidia,pins = "irrx", "irtx", "sdd", "spic", 264 "spie", "spih", "uaa", "uab", "uad", 265 "uca", "ucb"; 266 nvidia,pull = <TEGRA_PIN_PULL_UP>; 267 nvidia,tristate = <TEGRA_PIN_ENABLE>; 268 }; 269 conf_lc { 270 nvidia,pins = "lc", "ls"; 271 nvidia,pull = <TEGRA_PIN_PULL_UP>; 272 }; 273 conf_ld0 { 274 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", 275 "ld5", "ld6", "ld7", "ld8", "ld9", 276 "ld10", "ld11", "ld12", "ld13", "ld14", 277 "ld15", "ld16", "ld17", "ldi", "lhp0", 278 "lhp1", "lhp2", "lhs", "lm0", "lpp", 279 "lpw0", "lpw2", "lsc0", "lspi", "lvp1", 280 "lvs", "pmc"; 281 nvidia,tristate = <TEGRA_PIN_DISABLE>; 282 }; 283 conf_ld17_0 { 284 nvidia,pins = "ld17_0", "ld19_18", "ld21_20", 285 "ld23_22"; 286 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 287 }; 288 }; 289 }; 290 291 i2s@70002800 { 292 status = "okay"; 293 }; 294 295 serial@70006300 { 296 status = "okay"; 297 clock-frequency = < 216000000 >; 298 }; 299 300 pwm: pwm@7000a000 { 301 status = "okay"; 302 }; 303 304 i2c@7000c000 { 305 status = "okay"; 306 clock-frequency = <400000>; 307 308 wm8903: wm8903@1a { 309 compatible = "wlf,wm8903"; 310 reg = <0x1a>; 311 interrupt-parent = <&gpio>; 312 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; 313 314 gpio-controller; 315 #gpio-cells = <2>; 316 317 micdet-cfg = <0>; 318 micdet-delay = <100>; 319 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; 320 }; 321 }; 322 323 nand-controller@70008000 { 324 nvidia,wp-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; 325 nvidia,width = <8>; 326 nvidia,timing = <26 100 20 80 20 10 12 10 70>; 327 nand@0 { 328 reg = <0>; 329 compatible = "hynix,hy27uf4g2b", "nand-flash"; 330 }; 331 }; 332 333 hdmi_ddc: i2c@7000c400 { 334 status = "okay"; 335 clock-frequency = <100000>; 336 }; 337 338 i2c@7000c500 { 339 status = "okay"; 340 clock-frequency = <400000>; 341 }; 342 343 i2c@7000d000 { 344 status = "okay"; 345 clock-frequency = <400000>; 346 347 pmic: tps6586x@34 { 348 compatible = "ti,tps6586x"; 349 reg = <0x34>; 350 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 351 352 ti,system-power-controller; 353 354 #gpio-cells = <2>; 355 gpio-controller; 356 357 sys-supply = <&vdd_5v0_reg>; 358 vin-sm0-supply = <&sys_reg>; 359 vin-sm1-supply = <&sys_reg>; 360 vin-sm2-supply = <&sys_reg>; 361 vinldo01-supply = <&sm2_reg>; 362 vinldo23-supply = <&sm2_reg>; 363 vinldo4-supply = <&sm2_reg>; 364 vinldo678-supply = <&sm2_reg>; 365 vinldo9-supply = <&sm2_reg>; 366 367 regulators { 368 sys_reg: sys { 369 regulator-name = "vdd_sys"; 370 regulator-always-on; 371 }; 372 373 sm0 { 374 regulator-name = "vdd_sm0,vdd_core"; 375 regulator-min-microvolt = <1200000>; 376 regulator-max-microvolt = <1200000>; 377 regulator-always-on; 378 }; 379 380 sm1 { 381 regulator-name = "vdd_sm1,vdd_cpu"; 382 regulator-min-microvolt = <1000000>; 383 regulator-max-microvolt = <1000000>; 384 regulator-always-on; 385 }; 386 387 sm2_reg: sm2 { 388 regulator-name = "vdd_sm2,vin_ldo*"; 389 regulator-min-microvolt = <3700000>; 390 regulator-max-microvolt = <3700000>; 391 regulator-always-on; 392 }; 393 394 pci_clk_reg: ldo0 { 395 regulator-name = "vdd_ldo0,vddio_pex_clk"; 396 regulator-min-microvolt = <3300000>; 397 regulator-max-microvolt = <3300000>; 398 }; 399 400 ldo1 { 401 regulator-name = "vdd_ldo1,avdd_pll*"; 402 regulator-min-microvolt = <1100000>; 403 regulator-max-microvolt = <1100000>; 404 regulator-always-on; 405 }; 406 407 ldo2 { 408 regulator-name = "vdd_ldo2,vdd_rtc"; 409 regulator-min-microvolt = <1200000>; 410 regulator-max-microvolt = <1200000>; 411 }; 412 413 ldo3 { 414 regulator-name = "vdd_ldo3,avdd_usb*"; 415 regulator-min-microvolt = <3300000>; 416 regulator-max-microvolt = <3300000>; 417 regulator-always-on; 418 }; 419 420 ldo4 { 421 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; 422 regulator-min-microvolt = <1800000>; 423 regulator-max-microvolt = <1800000>; 424 regulator-always-on; 425 }; 426 427 ldo5 { 428 regulator-name = "vdd_ldo5,vcore_mmc"; 429 regulator-min-microvolt = <2850000>; 430 regulator-max-microvolt = <2850000>; 431 regulator-always-on; 432 }; 433 434 ldo6 { 435 regulator-name = "vdd_ldo6,avdd_vdac"; 436 regulator-min-microvolt = <1800000>; 437 regulator-max-microvolt = <1800000>; 438 }; 439 440 hdmi_vdd_reg: ldo7 { 441 regulator-name = "vdd_ldo7,avdd_hdmi"; 442 regulator-min-microvolt = <3300000>; 443 regulator-max-microvolt = <3300000>; 444 }; 445 446 hdmi_pll_reg: ldo8 { 447 regulator-name = "vdd_ldo8,avdd_hdmi_pll"; 448 regulator-min-microvolt = <1800000>; 449 regulator-max-microvolt = <1800000>; 450 }; 451 452 ldo9 { 453 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; 454 regulator-min-microvolt = <2850000>; 455 regulator-max-microvolt = <2850000>; 456 regulator-always-on; 457 }; 458 459 ldo_rtc { 460 regulator-name = "vdd_rtc_out,vdd_cell"; 461 regulator-min-microvolt = <3300000>; 462 regulator-max-microvolt = <3300000>; 463 regulator-always-on; 464 }; 465 }; 466 }; 467 468 temperature-sensor@4c { 469 compatible = "adi,adt7461"; 470 reg = <0x4c>; 471 }; 472 }; 473 474 kbc@7000e200 { 475 status = "okay"; 476 nvidia,debounce-delay-ms = <2>; 477 nvidia,repeat-delay-ms = <160>; 478 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; 479 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>; 480 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W) 481 MATRIX_KEY(0x00, 0x03, KEY_S) 482 MATRIX_KEY(0x00, 0x04, KEY_A) 483 MATRIX_KEY(0x00, 0x05, KEY_Z) 484 MATRIX_KEY(0x00, 0x07, KEY_FN) 485 MATRIX_KEY(0x01, 0x07, KEY_MENU) 486 MATRIX_KEY(0x02, 0x06, KEY_LEFTALT) 487 MATRIX_KEY(0x02, 0x07, KEY_RIGHTALT) 488 MATRIX_KEY(0x03, 0x00, KEY_5) 489 MATRIX_KEY(0x03, 0x01, KEY_4) 490 MATRIX_KEY(0x03, 0x02, KEY_R) 491 MATRIX_KEY(0x03, 0x03, KEY_E) 492 MATRIX_KEY(0x03, 0x04, KEY_F) 493 MATRIX_KEY(0x03, 0x05, KEY_D) 494 MATRIX_KEY(0x03, 0x06, KEY_X) 495 MATRIX_KEY(0x04, 0x00, KEY_7) 496 MATRIX_KEY(0x04, 0x01, KEY_6) 497 MATRIX_KEY(0x04, 0x02, KEY_T) 498 MATRIX_KEY(0x04, 0x03, KEY_H) 499 MATRIX_KEY(0x04, 0x04, KEY_G) 500 MATRIX_KEY(0x04, 0x05, KEY_V) 501 MATRIX_KEY(0x04, 0x06, KEY_C) 502 MATRIX_KEY(0x04, 0x07, KEY_SPACE) 503 MATRIX_KEY(0x05, 0x00, KEY_9) 504 MATRIX_KEY(0x05, 0x01, KEY_8) 505 MATRIX_KEY(0x05, 0x02, KEY_U) 506 MATRIX_KEY(0x05, 0x03, KEY_Y) 507 MATRIX_KEY(0x05, 0x04, KEY_J) 508 MATRIX_KEY(0x05, 0x05, KEY_N) 509 MATRIX_KEY(0x05, 0x06, KEY_B) 510 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH) 511 MATRIX_KEY(0x06, 0x00, KEY_MINUS) 512 MATRIX_KEY(0x06, 0x01, KEY_0) 513 MATRIX_KEY(0x06, 0x02, KEY_O) 514 MATRIX_KEY(0x06, 0x03, KEY_I) 515 MATRIX_KEY(0x06, 0x04, KEY_L) 516 MATRIX_KEY(0x06, 0x05, KEY_K) 517 MATRIX_KEY(0x06, 0x06, KEY_COMMA) 518 MATRIX_KEY(0x06, 0x07, KEY_M) 519 MATRIX_KEY(0x07, 0x01, KEY_EQUAL) 520 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE) 521 MATRIX_KEY(0x07, 0x03, KEY_ENTER) 522 MATRIX_KEY(0x07, 0x07, KEY_MENU) 523 MATRIX_KEY(0x08, 0x04, KEY_LEFTSHIFT) 524 MATRIX_KEY(0x08, 0x05, KEY_RIGHTSHIFT) 525 MATRIX_KEY(0x09, 0x05, KEY_LEFTCTRL) 526 MATRIX_KEY(0x09, 0x07, KEY_RIGHTCTRL) 527 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE) 528 MATRIX_KEY(0x0B, 0x01, KEY_P) 529 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE) 530 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON) 531 MATRIX_KEY(0x0B, 0x04, KEY_SLASH) 532 MATRIX_KEY(0x0B, 0x05, KEY_DOT) 533 MATRIX_KEY(0x0C, 0x00, KEY_F10) 534 MATRIX_KEY(0x0C, 0x01, KEY_F9) 535 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE) 536 MATRIX_KEY(0x0C, 0x03, KEY_3) 537 MATRIX_KEY(0x0C, 0x04, KEY_2) 538 MATRIX_KEY(0x0C, 0x05, KEY_UP) 539 MATRIX_KEY(0x0C, 0x06, KEY_PRINT) 540 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE) 541 MATRIX_KEY(0x0D, 0x00, KEY_INSERT) 542 MATRIX_KEY(0x0D, 0x01, KEY_DELETE) 543 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP ) 544 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN) 545 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT) 546 MATRIX_KEY(0x0D, 0x06, KEY_DOWN) 547 MATRIX_KEY(0x0D, 0x07, KEY_LEFT) 548 MATRIX_KEY(0x0E, 0x00, KEY_F11) 549 MATRIX_KEY(0x0E, 0x01, KEY_F12) 550 MATRIX_KEY(0x0E, 0x02, KEY_F8) 551 MATRIX_KEY(0x0E, 0x03, KEY_Q) 552 MATRIX_KEY(0x0E, 0x04, KEY_F4) 553 MATRIX_KEY(0x0E, 0x05, KEY_F3) 554 MATRIX_KEY(0x0E, 0x06, KEY_1) 555 MATRIX_KEY(0x0E, 0x07, KEY_F7) 556 MATRIX_KEY(0x0F, 0x00, KEY_ESC) 557 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE) 558 MATRIX_KEY(0x0F, 0x02, KEY_F5) 559 MATRIX_KEY(0x0F, 0x03, KEY_TAB) 560 MATRIX_KEY(0x0F, 0x04, KEY_F1) 561 MATRIX_KEY(0x0F, 0x05, KEY_F2) 562 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK) 563 MATRIX_KEY(0x0F, 0x07, KEY_F6) 564 MATRIX_KEY(0x14, 0x00, KEY_KP7) 565 MATRIX_KEY(0x15, 0x00, KEY_KP9) 566 MATRIX_KEY(0x15, 0x01, KEY_KP8) 567 MATRIX_KEY(0x15, 0x02, KEY_KP4) 568 MATRIX_KEY(0x15, 0x04, KEY_KP1) 569 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH) 570 MATRIX_KEY(0x16, 0x02, KEY_KP6) 571 MATRIX_KEY(0x16, 0x03, KEY_KP5) 572 MATRIX_KEY(0x16, 0x04, KEY_KP3) 573 MATRIX_KEY(0x16, 0x05, KEY_KP2) 574 MATRIX_KEY(0x16, 0x07, KEY_KP0) 575 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK) 576 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS) 577 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS) 578 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT) 579 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP) 580 MATRIX_KEY(0x1D, 0x03, KEY_HOME) 581 MATRIX_KEY(0x1D, 0x04, KEY_END) 582 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSUP) 583 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN) 584 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSDOWN) 585 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK) 586 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK) 587 MATRIX_KEY(0x1E, 0x02, KEY_MUTE) 588 MATRIX_KEY(0x1F, 0x04, KEY_QUESTION)>; 589 }; 590 591 pmc@7000e400 { 592 nvidia,invert-interrupt; 593 nvidia,suspend-mode = <1>; 594 nvidia,cpu-pwr-good-time = <5000>; 595 nvidia,cpu-pwr-off-time = <5000>; 596 nvidia,core-pwr-good-time = <3845 3845>; 597 nvidia,core-pwr-off-time = <3875>; 598 nvidia,sys-clock-req-active-high; 599 }; 600 601 pcie-controller@80003000 { 602 status = "okay"; 603 604 avdd-pex-supply = <&pci_vdd_reg>; 605 vdd-pex-supply = <&pci_vdd_reg>; 606 avdd-pex-pll-supply = <&pci_vdd_reg>; 607 avdd-plle-supply = <&pci_vdd_reg>; 608 vddio-pex-clk-supply = <&pci_clk_reg>; 609 610 pci@1,0 { 611 status = "okay"; 612 }; 613 614 pci@2,0 { 615 status = "okay"; 616 }; 617 }; 618 619 usb@c5000000 { 620 status = "okay"; 621 }; 622 623 usb-phy@c5000000 { 624 status = "okay"; 625 }; 626 627 usb@c5004000 { 628 status = "okay"; 629 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) 0>; 630 }; 631 632 usb-phy@c5004000 { 633 status = "okay"; 634 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) 635 GPIO_ACTIVE_LOW>; 636 }; 637 638 usb@c5008000 { 639 status = "okay"; 640 }; 641 642 usb-phy@c5008000 { 643 status = "okay"; 644 }; 645 646 sdhci@c8000200 { 647 status = "okay"; 648 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 649 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 650 power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; 651 bus-width = <4>; 652 }; 653 654 sdhci@c8000600 { 655 status = "okay"; 656 cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>; 657 wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 658 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; 659 bus-width = <8>; 660 }; 661 662 backlight: backlight { 663 compatible = "pwm-backlight"; 664 665 enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>; 666 power-supply = <&vdd_bl_reg>; 667 pwms = <&pwm 0 5000000>; 668 669 brightness-levels = <0 4 8 16 32 64 128 255>; 670 default-brightness-level = <6>; 671 }; 672 673 clocks { 674 compatible = "simple-bus"; 675 #address-cells = <1>; 676 #size-cells = <0>; 677 678 clk32k_in: clock@0 { 679 compatible = "fixed-clock"; 680 reg=<0>; 681 #clock-cells = <0>; 682 clock-frequency = <32768>; 683 }; 684 }; 685 686 gpio-keys { 687 compatible = "gpio-keys"; 688 689 power { 690 label = "Power"; 691 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; 692 linux,code = <KEY_POWER>; 693 gpio-key,wakeup; 694 }; 695 }; 696 697 panel: panel { 698 compatible = "auo,b101aw03", "simple-panel"; 699 700 power-supply = <&vdd_pnl_reg>; 701 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>; 702 703 backlight = <&backlight>; 704 }; 705 706 regulators { 707 compatible = "simple-bus"; 708 #address-cells = <1>; 709 #size-cells = <0>; 710 711 vdd_5v0_reg: regulator@0 { 712 compatible = "regulator-fixed"; 713 reg = <0>; 714 regulator-name = "vdd_5v0"; 715 regulator-min-microvolt = <5000000>; 716 regulator-max-microvolt = <5000000>; 717 regulator-always-on; 718 }; 719 720 regulator@1 { 721 compatible = "regulator-fixed"; 722 reg = <1>; 723 regulator-name = "vdd_1v5"; 724 regulator-min-microvolt = <1500000>; 725 regulator-max-microvolt = <1500000>; 726 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; 727 }; 728 729 regulator@2 { 730 compatible = "regulator-fixed"; 731 reg = <2>; 732 regulator-name = "vdd_1v2"; 733 regulator-min-microvolt = <1200000>; 734 regulator-max-microvolt = <1200000>; 735 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; 736 enable-active-high; 737 }; 738 739 pci_vdd_reg: regulator@3 { 740 compatible = "regulator-fixed"; 741 reg = <3>; 742 regulator-name = "vdd_1v05"; 743 regulator-min-microvolt = <1050000>; 744 regulator-max-microvolt = <1050000>; 745 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; 746 enable-active-high; 747 }; 748 749 vdd_pnl_reg: regulator@4 { 750 compatible = "regulator-fixed"; 751 reg = <4>; 752 regulator-name = "vdd_pnl"; 753 regulator-min-microvolt = <2800000>; 754 regulator-max-microvolt = <2800000>; 755 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>; 756 enable-active-high; 757 }; 758 759 vdd_bl_reg: regulator@5 { 760 compatible = "regulator-fixed"; 761 reg = <5>; 762 regulator-name = "vdd_bl"; 763 regulator-min-microvolt = <2800000>; 764 regulator-max-microvolt = <2800000>; 765 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; 766 enable-active-high; 767 }; 768 769 vdd_5v0_hdmi: regulator@6 { 770 compatible = "regulator-fixed"; 771 reg = <6>; 772 regulator-name = "VDDIO_HDMI"; 773 regulator-min-microvolt = <5000000>; 774 regulator-max-microvolt = <5000000>; 775 gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>; 776 enable-active-high; 777 vin-supply = <&vdd_5v0_reg>; 778 }; 779 }; 780 781 sound { 782 compatible = "nvidia,tegra-audio-wm8903-harmony", 783 "nvidia,tegra-audio-wm8903"; 784 nvidia,model = "NVIDIA Tegra Harmony"; 785 786 nvidia,audio-routing = 787 "Headphone Jack", "HPOUTR", 788 "Headphone Jack", "HPOUTL", 789 "Int Spk", "ROP", 790 "Int Spk", "RON", 791 "Int Spk", "LOP", 792 "Int Spk", "LON", 793 "Mic Jack", "MICBIAS", 794 "IN1L", "Mic Jack"; 795 796 nvidia,i2s-controller = <&tegra_i2s1>; 797 nvidia,audio-codec = <&wm8903>; 798 799 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; 800 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) 801 GPIO_ACTIVE_HIGH>; 802 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0) 803 GPIO_ACTIVE_HIGH>; 804 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1) 805 GPIO_ACTIVE_HIGH>; 806 807 clocks = <&tegra_car TEGRA20_CLK_PLL_A>, 808 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, 809 <&tegra_car TEGRA20_CLK_CDEV1>; 810 clock-names = "pll_a", "pll_a_out0", "mclk"; 811 }; 812}; 813