1/dts-v1/;
2
3#include <dt-bindings/input/input.h>
4#include "tegra20.dtsi"
5
6/ {
7	model = "NVIDIA Tegra20 Harmony evaluation board";
8	compatible = "nvidia,harmony", "nvidia,tegra20";
9
10	chosen {
11		stdout-path = &uartd;
12	};
13
14	aliases {
15		rtc0 = "/i2c@7000d000/tps6586x@34";
16		rtc1 = "/rtc@7000e000";
17		serial0 = &uartd;
18		usb0 = "/usb@c5000000";
19		usb1 = "/usb@c5004000";
20		usb2 = "/usb@c5008000";
21		mmc0 = "/sdhci@c8000600";
22		mmc1 = "/sdhci@c8000200";
23	};
24
25	memory {
26		reg = <0x00000000 0x40000000>;
27	};
28
29	host1x@50000000 {
30		status = "okay";
31		dc@54200000 {
32			status = "okay";
33			rgb {
34				status = "okay";
35
36				nvidia,panel = <&panel>;
37
38				display-timings {
39					timing@0 {
40						/* Seaboard has 1366x768 */
41						clock-frequency = <42430000>;
42						hactive = <1024>;
43						vactive = <600>;
44						hback-porch = <138>;
45						hfront-porch = <34>;
46						hsync-len = <136>;
47						vback-porch = <21>;
48						vfront-porch = <4>;
49						vsync-len = <4>;
50					};
51				};
52			};
53		};
54
55		hdmi@54280000 {
56			status = "okay";
57
58			hdmi-supply = <&vdd_5v0_hdmi>;
59			vdd-supply = <&hdmi_vdd_reg>;
60			pll-supply = <&hdmi_pll_reg>;
61
62			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
63			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
64				GPIO_ACTIVE_HIGH>;
65		};
66	};
67
68	pinmux@70000014 {
69		pinctrl-names = "default";
70		pinctrl-0 = <&state_default>;
71
72		state_default: pinmux {
73			ata {
74				nvidia,pins = "ata";
75				nvidia,function = "ide";
76			};
77			atb {
78				nvidia,pins = "atb", "gma", "gme";
79				nvidia,function = "sdio4";
80			};
81			atc {
82				nvidia,pins = "atc";
83				nvidia,function = "nand";
84			};
85			atd {
86				nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
87					"spia", "spib", "spic";
88				nvidia,function = "gmi";
89			};
90			cdev1 {
91				nvidia,pins = "cdev1";
92				nvidia,function = "plla_out";
93			};
94			cdev2 {
95				nvidia,pins = "cdev2";
96				nvidia,function = "pllp_out4";
97			};
98			crtp {
99				nvidia,pins = "crtp";
100				nvidia,function = "crt";
101			};
102			csus {
103				nvidia,pins = "csus";
104				nvidia,function = "vi_sensor_clk";
105			};
106			dap1 {
107				nvidia,pins = "dap1";
108				nvidia,function = "dap1";
109			};
110			dap2 {
111				nvidia,pins = "dap2";
112				nvidia,function = "dap2";
113			};
114			dap3 {
115				nvidia,pins = "dap3";
116				nvidia,function = "dap3";
117			};
118			dap4 {
119				nvidia,pins = "dap4";
120				nvidia,function = "dap4";
121			};
122			ddc {
123				nvidia,pins = "ddc";
124				nvidia,function = "i2c2";
125			};
126			dta {
127				nvidia,pins = "dta", "dtd";
128				nvidia,function = "sdio2";
129			};
130			dtb {
131				nvidia,pins = "dtb", "dtc", "dte";
132				nvidia,function = "rsvd1";
133			};
134			dtf {
135				nvidia,pins = "dtf";
136				nvidia,function = "i2c3";
137			};
138			gmc {
139				nvidia,pins = "gmc";
140				nvidia,function = "uartd";
141			};
142			gpu7 {
143				nvidia,pins = "gpu7";
144				nvidia,function = "rtck";
145			};
146			gpv {
147				nvidia,pins = "gpv", "slxa", "slxk";
148				nvidia,function = "pcie";
149			};
150			hdint {
151				nvidia,pins = "hdint", "pta";
152				nvidia,function = "hdmi";
153			};
154			i2cp {
155				nvidia,pins = "i2cp";
156				nvidia,function = "i2cp";
157			};
158			irrx {
159				nvidia,pins = "irrx", "irtx";
160				nvidia,function = "uarta";
161			};
162			kbca {
163				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
164					"kbce", "kbcf";
165				nvidia,function = "kbc";
166			};
167			lcsn {
168				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
169					"ld3", "ld4", "ld5", "ld6", "ld7",
170					"ld8", "ld9", "ld10", "ld11", "ld12",
171					"ld13", "ld14", "ld15", "ld16", "ld17",
172					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
173					"lhs", "lm0", "lm1", "lpp", "lpw0",
174					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
175					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
176					"lvs";
177				nvidia,function = "displaya";
178			};
179			owc {
180				nvidia,pins = "owc", "spdi", "spdo", "uac";
181				nvidia,function = "rsvd2";
182			};
183			pmc {
184				nvidia,pins = "pmc";
185				nvidia,function = "pwr_on";
186			};
187			rm {
188				nvidia,pins = "rm";
189				nvidia,function = "i2c1";
190			};
191			sdb {
192				nvidia,pins = "sdb", "sdc", "sdd";
193				nvidia,function = "pwm";
194			};
195			sdio1 {
196				nvidia,pins = "sdio1";
197				nvidia,function = "sdio1";
198			};
199			slxc {
200				nvidia,pins = "slxc", "slxd";
201				nvidia,function = "spdif";
202			};
203			spid {
204				nvidia,pins = "spid", "spie", "spif";
205				nvidia,function = "spi1";
206			};
207			spig {
208				nvidia,pins = "spig", "spih";
209				nvidia,function = "spi2_alt";
210			};
211			uaa {
212				nvidia,pins = "uaa", "uab", "uda";
213				nvidia,function = "ulpi";
214			};
215			uad {
216				nvidia,pins = "uad";
217				nvidia,function = "irda";
218			};
219			uca {
220				nvidia,pins = "uca", "ucb";
221				nvidia,function = "uartc";
222			};
223			conf_ata {
224				nvidia,pins = "ata", "atb", "atc", "atd", "ate",
225					"cdev1", "cdev2", "dap1", "dtb", "gma",
226					"gmb", "gmc", "gmd", "gme", "gpu7",
227					"gpv", "i2cp", "pta", "rm", "slxa",
228					"slxk", "spia", "spib", "uac";
229				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
230				nvidia,tristate = <TEGRA_PIN_DISABLE>;
231			};
232			conf_ck32 {
233				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
234					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
235				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
236			};
237			conf_csus {
238				nvidia,pins = "csus", "spid", "spif";
239				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
240				nvidia,tristate = <TEGRA_PIN_ENABLE>;
241			};
242			conf_crtp {
243				nvidia,pins = "crtp", "dap2", "dap3", "dap4",
244					"dtc", "dte", "dtf", "gpu", "sdio1",
245					"slxc", "slxd", "spdi", "spdo", "spig",
246					"uda";
247				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
248				nvidia,tristate = <TEGRA_PIN_ENABLE>;
249			};
250			conf_ddc {
251				nvidia,pins = "ddc", "dta", "dtd", "kbca",
252					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
253					"sdc";
254				nvidia,pull = <TEGRA_PIN_PULL_UP>;
255				nvidia,tristate = <TEGRA_PIN_DISABLE>;
256			};
257			conf_hdint {
258				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
259					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
260					"lvp0", "owc", "sdb";
261				nvidia,tristate = <TEGRA_PIN_ENABLE>;
262			};
263			conf_irrx {
264				nvidia,pins = "irrx", "irtx", "sdd", "spic",
265					"spie", "spih", "uaa", "uab", "uad",
266					"uca", "ucb";
267				nvidia,pull = <TEGRA_PIN_PULL_UP>;
268				nvidia,tristate = <TEGRA_PIN_ENABLE>;
269			};
270			conf_lc {
271				nvidia,pins = "lc", "ls";
272				nvidia,pull = <TEGRA_PIN_PULL_UP>;
273			};
274			conf_ld0 {
275				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
276					"ld5", "ld6", "ld7", "ld8", "ld9",
277					"ld10", "ld11", "ld12", "ld13", "ld14",
278					"ld15", "ld16", "ld17", "ldi", "lhp0",
279					"lhp1", "lhp2", "lhs", "lm0", "lpp",
280					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
281					"lvs", "pmc";
282				nvidia,tristate = <TEGRA_PIN_DISABLE>;
283			};
284			conf_ld17_0 {
285				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
286					"ld23_22";
287				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
288			};
289		};
290	};
291
292	i2s@70002800 {
293		status = "okay";
294	};
295
296	serial@70006300 {
297		status = "okay";
298		clock-frequency = < 216000000 >;
299	};
300
301	pwm: pwm@7000a000 {
302		status = "okay";
303	};
304
305	i2c@7000c000 {
306		status = "okay";
307		clock-frequency = <400000>;
308
309		wm8903: wm8903@1a {
310			compatible = "wlf,wm8903";
311			reg = <0x1a>;
312			interrupt-parent = <&gpio>;
313			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
314
315			gpio-controller;
316			#gpio-cells = <2>;
317
318			micdet-cfg = <0>;
319			micdet-delay = <100>;
320			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
321		};
322	};
323
324	nand-controller@70008000 {
325		nvidia,wp-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
326		nvidia,width = <8>;
327		nvidia,timing = <26 100 20 80 20 10 12 10 70>;
328		nand@0 {
329			reg = <0>;
330			compatible = "hynix,hy27uf4g2b", "nand-flash";
331		};
332	};
333
334	hdmi_ddc: i2c@7000c400 {
335		status = "okay";
336		clock-frequency = <100000>;
337	};
338
339	i2c@7000c500 {
340		status = "okay";
341		clock-frequency = <400000>;
342	};
343
344	i2c@7000d000 {
345		status = "okay";
346		clock-frequency = <400000>;
347
348		pmic: tps6586x@34 {
349			compatible = "ti,tps6586x";
350			reg = <0x34>;
351			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
352
353			ti,system-power-controller;
354
355			#gpio-cells = <2>;
356			gpio-controller;
357
358			sys-supply = <&vdd_5v0_reg>;
359			vin-sm0-supply = <&sys_reg>;
360			vin-sm1-supply = <&sys_reg>;
361			vin-sm2-supply = <&sys_reg>;
362			vinldo01-supply = <&sm2_reg>;
363			vinldo23-supply = <&sm2_reg>;
364			vinldo4-supply = <&sm2_reg>;
365			vinldo678-supply = <&sm2_reg>;
366			vinldo9-supply = <&sm2_reg>;
367
368			regulators {
369				sys_reg: sys {
370					regulator-name = "vdd_sys";
371					regulator-always-on;
372				};
373
374				sm0 {
375					regulator-name = "vdd_sm0,vdd_core";
376					regulator-min-microvolt = <1200000>;
377					regulator-max-microvolt = <1200000>;
378					regulator-always-on;
379				};
380
381				sm1 {
382					regulator-name = "vdd_sm1,vdd_cpu";
383					regulator-min-microvolt = <1000000>;
384					regulator-max-microvolt = <1000000>;
385					regulator-always-on;
386				};
387
388				sm2_reg: sm2 {
389					regulator-name = "vdd_sm2,vin_ldo*";
390					regulator-min-microvolt = <3700000>;
391					regulator-max-microvolt = <3700000>;
392					regulator-always-on;
393				};
394
395				pci_clk_reg: ldo0 {
396					regulator-name = "vdd_ldo0,vddio_pex_clk";
397					regulator-min-microvolt = <3300000>;
398					regulator-max-microvolt = <3300000>;
399				};
400
401				ldo1 {
402					regulator-name = "vdd_ldo1,avdd_pll*";
403					regulator-min-microvolt = <1100000>;
404					regulator-max-microvolt = <1100000>;
405					regulator-always-on;
406				};
407
408				ldo2 {
409					regulator-name = "vdd_ldo2,vdd_rtc";
410					regulator-min-microvolt = <1200000>;
411					regulator-max-microvolt = <1200000>;
412				};
413
414				ldo3 {
415					regulator-name = "vdd_ldo3,avdd_usb*";
416					regulator-min-microvolt = <3300000>;
417					regulator-max-microvolt = <3300000>;
418					regulator-always-on;
419				};
420
421				ldo4 {
422					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
423					regulator-min-microvolt = <1800000>;
424					regulator-max-microvolt = <1800000>;
425					regulator-always-on;
426				};
427
428				ldo5 {
429					regulator-name = "vdd_ldo5,vcore_mmc";
430					regulator-min-microvolt = <2850000>;
431					regulator-max-microvolt = <2850000>;
432					regulator-always-on;
433				};
434
435				ldo6 {
436					regulator-name = "vdd_ldo6,avdd_vdac";
437					regulator-min-microvolt = <1800000>;
438					regulator-max-microvolt = <1800000>;
439				};
440
441				hdmi_vdd_reg: ldo7 {
442					regulator-name = "vdd_ldo7,avdd_hdmi";
443					regulator-min-microvolt = <3300000>;
444					regulator-max-microvolt = <3300000>;
445				};
446
447				hdmi_pll_reg: ldo8 {
448					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
449					regulator-min-microvolt = <1800000>;
450					regulator-max-microvolt = <1800000>;
451				};
452
453				ldo9 {
454					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
455					regulator-min-microvolt = <2850000>;
456					regulator-max-microvolt = <2850000>;
457					regulator-always-on;
458				};
459
460				ldo_rtc {
461					regulator-name = "vdd_rtc_out,vdd_cell";
462					regulator-min-microvolt = <3300000>;
463					regulator-max-microvolt = <3300000>;
464					regulator-always-on;
465				};
466			};
467		};
468
469		temperature-sensor@4c {
470			compatible = "adi,adt7461";
471			reg = <0x4c>;
472		};
473	};
474
475	kbc@7000e200 {
476		status = "okay";
477		nvidia,debounce-delay-ms = <2>;
478		nvidia,repeat-delay-ms = <160>;
479		nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
480		nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
481		linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
482				MATRIX_KEY(0x00, 0x03, KEY_S)
483				MATRIX_KEY(0x00, 0x04, KEY_A)
484				MATRIX_KEY(0x00, 0x05, KEY_Z)
485				MATRIX_KEY(0x00, 0x07, KEY_FN)
486				MATRIX_KEY(0x01, 0x07, KEY_MENU)
487				MATRIX_KEY(0x02, 0x06, KEY_LEFTALT)
488				MATRIX_KEY(0x02, 0x07, KEY_RIGHTALT)
489				MATRIX_KEY(0x03, 0x00, KEY_5)
490				MATRIX_KEY(0x03, 0x01, KEY_4)
491				MATRIX_KEY(0x03, 0x02, KEY_R)
492				MATRIX_KEY(0x03, 0x03, KEY_E)
493				MATRIX_KEY(0x03, 0x04, KEY_F)
494				MATRIX_KEY(0x03, 0x05, KEY_D)
495				MATRIX_KEY(0x03, 0x06, KEY_X)
496				MATRIX_KEY(0x04, 0x00, KEY_7)
497				MATRIX_KEY(0x04, 0x01, KEY_6)
498				MATRIX_KEY(0x04, 0x02, KEY_T)
499				MATRIX_KEY(0x04, 0x03, KEY_H)
500				MATRIX_KEY(0x04, 0x04, KEY_G)
501				MATRIX_KEY(0x04, 0x05, KEY_V)
502				MATRIX_KEY(0x04, 0x06, KEY_C)
503				MATRIX_KEY(0x04, 0x07, KEY_SPACE)
504				MATRIX_KEY(0x05, 0x00, KEY_9)
505				MATRIX_KEY(0x05, 0x01, KEY_8)
506				MATRIX_KEY(0x05, 0x02, KEY_U)
507				MATRIX_KEY(0x05, 0x03, KEY_Y)
508				MATRIX_KEY(0x05, 0x04, KEY_J)
509				MATRIX_KEY(0x05, 0x05, KEY_N)
510				MATRIX_KEY(0x05, 0x06, KEY_B)
511				MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
512				MATRIX_KEY(0x06, 0x00, KEY_MINUS)
513				MATRIX_KEY(0x06, 0x01, KEY_0)
514				MATRIX_KEY(0x06, 0x02, KEY_O)
515				MATRIX_KEY(0x06, 0x03, KEY_I)
516				MATRIX_KEY(0x06, 0x04, KEY_L)
517				MATRIX_KEY(0x06, 0x05, KEY_K)
518				MATRIX_KEY(0x06, 0x06, KEY_COMMA)
519				MATRIX_KEY(0x06, 0x07, KEY_M)
520				MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
521				MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
522				MATRIX_KEY(0x07, 0x03, KEY_ENTER)
523				MATRIX_KEY(0x07, 0x07, KEY_MENU)
524				MATRIX_KEY(0x08, 0x04, KEY_LEFTSHIFT)
525				MATRIX_KEY(0x08, 0x05, KEY_RIGHTSHIFT)
526				MATRIX_KEY(0x09, 0x05, KEY_LEFTCTRL)
527				MATRIX_KEY(0x09, 0x07, KEY_RIGHTCTRL)
528				MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
529				MATRIX_KEY(0x0B, 0x01, KEY_P)
530				MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
531				MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
532				MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
533				MATRIX_KEY(0x0B, 0x05, KEY_DOT)
534				MATRIX_KEY(0x0C, 0x00, KEY_F10)
535				MATRIX_KEY(0x0C, 0x01, KEY_F9)
536				MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
537				MATRIX_KEY(0x0C, 0x03, KEY_3)
538				MATRIX_KEY(0x0C, 0x04, KEY_2)
539				MATRIX_KEY(0x0C, 0x05, KEY_UP)
540				MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
541				MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
542				MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
543				MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
544				MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
545				MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
546				MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
547				MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
548				MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
549				MATRIX_KEY(0x0E, 0x00, KEY_F11)
550				MATRIX_KEY(0x0E, 0x01, KEY_F12)
551				MATRIX_KEY(0x0E, 0x02, KEY_F8)
552				MATRIX_KEY(0x0E, 0x03, KEY_Q)
553				MATRIX_KEY(0x0E, 0x04, KEY_F4)
554				MATRIX_KEY(0x0E, 0x05, KEY_F3)
555				MATRIX_KEY(0x0E, 0x06, KEY_1)
556				MATRIX_KEY(0x0E, 0x07, KEY_F7)
557				MATRIX_KEY(0x0F, 0x00, KEY_ESC)
558				MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
559				MATRIX_KEY(0x0F, 0x02, KEY_F5)
560				MATRIX_KEY(0x0F, 0x03, KEY_TAB)
561				MATRIX_KEY(0x0F, 0x04, KEY_F1)
562				MATRIX_KEY(0x0F, 0x05, KEY_F2)
563				MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
564				MATRIX_KEY(0x0F, 0x07, KEY_F6)
565				MATRIX_KEY(0x14, 0x00, KEY_KP7)
566				MATRIX_KEY(0x15, 0x00, KEY_KP9)
567				MATRIX_KEY(0x15, 0x01, KEY_KP8)
568				MATRIX_KEY(0x15, 0x02, KEY_KP4)
569				MATRIX_KEY(0x15, 0x04, KEY_KP1)
570				MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
571				MATRIX_KEY(0x16, 0x02, KEY_KP6)
572				MATRIX_KEY(0x16, 0x03, KEY_KP5)
573				MATRIX_KEY(0x16, 0x04, KEY_KP3)
574				MATRIX_KEY(0x16, 0x05, KEY_KP2)
575				MATRIX_KEY(0x16, 0x07, KEY_KP0)
576				MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
577				MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
578				MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
579				MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
580				MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
581				MATRIX_KEY(0x1D, 0x03, KEY_HOME)
582				MATRIX_KEY(0x1D, 0x04, KEY_END)
583				MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSUP)
584				MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
585				MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSDOWN)
586				MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
587				MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
588				MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
589				MATRIX_KEY(0x1F, 0x04, KEY_QUESTION)>;
590	};
591
592	pmc@7000e400 {
593		nvidia,invert-interrupt;
594		nvidia,suspend-mode = <1>;
595		nvidia,cpu-pwr-good-time = <5000>;
596		nvidia,cpu-pwr-off-time = <5000>;
597		nvidia,core-pwr-good-time = <3845 3845>;
598		nvidia,core-pwr-off-time = <3875>;
599		nvidia,sys-clock-req-active-high;
600	};
601
602	pcie-controller@80003000 {
603		status = "okay";
604
605		avdd-pex-supply = <&pci_vdd_reg>;
606		vdd-pex-supply = <&pci_vdd_reg>;
607		avdd-pex-pll-supply = <&pci_vdd_reg>;
608		avdd-plle-supply = <&pci_vdd_reg>;
609		vddio-pex-clk-supply = <&pci_clk_reg>;
610
611		pci@1,0 {
612			status = "okay";
613		};
614
615		pci@2,0 {
616			status = "okay";
617		};
618	};
619
620	usb@c5000000 {
621		status = "okay";
622	};
623
624	usb-phy@c5000000 {
625		status = "okay";
626	};
627
628	usb@c5004000 {
629		status = "okay";
630		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
631			GPIO_ACTIVE_LOW>;
632	};
633
634	usb-phy@c5004000 {
635		status = "okay";
636		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
637			GPIO_ACTIVE_LOW>;
638	};
639
640	usb@c5008000 {
641		status = "okay";
642	};
643
644	usb-phy@c5008000 {
645		status = "okay";
646	};
647
648	sdhci@c8000200 {
649		status = "okay";
650		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
651		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
652		power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
653		bus-width = <4>;
654	};
655
656	sdhci@c8000600 {
657		status = "okay";
658		cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
659		wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
660		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
661		bus-width = <8>;
662	};
663
664	backlight: backlight {
665		compatible = "pwm-backlight";
666
667		enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
668		power-supply = <&vdd_bl_reg>;
669		pwms = <&pwm 0 5000000>;
670
671		brightness-levels = <0 4 8 16 32 64 128 255>;
672		default-brightness-level = <6>;
673	};
674
675	clocks {
676		compatible = "simple-bus";
677		#address-cells = <1>;
678		#size-cells = <0>;
679
680		clk32k_in: clock@0 {
681			compatible = "fixed-clock";
682			reg=<0>;
683			#clock-cells = <0>;
684			clock-frequency = <32768>;
685		};
686	};
687
688	gpio-keys {
689		compatible = "gpio-keys";
690
691		power {
692			label = "Power";
693			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
694			linux,code = <KEY_POWER>;
695			gpio-key,wakeup;
696		};
697	};
698
699	panel: panel {
700		compatible = "auo,b101aw03", "simple-panel";
701
702		power-supply = <&vdd_pnl_reg>;
703		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
704
705		backlight = <&backlight>;
706	};
707
708	regulators {
709		compatible = "simple-bus";
710		#address-cells = <1>;
711		#size-cells = <0>;
712
713		vdd_5v0_reg: regulator@0 {
714			compatible = "regulator-fixed";
715			reg = <0>;
716			regulator-name = "vdd_5v0";
717			regulator-min-microvolt = <5000000>;
718			regulator-max-microvolt = <5000000>;
719			regulator-always-on;
720		};
721
722		regulator@1 {
723			compatible = "regulator-fixed";
724			reg = <1>;
725			regulator-name = "vdd_1v5";
726			regulator-min-microvolt = <1500000>;
727			regulator-max-microvolt = <1500000>;
728			gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
729		};
730
731		regulator@2 {
732			compatible = "regulator-fixed";
733			reg = <2>;
734			regulator-name = "vdd_1v2";
735			regulator-min-microvolt = <1200000>;
736			regulator-max-microvolt = <1200000>;
737			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
738			enable-active-high;
739		};
740
741		pci_vdd_reg: regulator@3 {
742			compatible = "regulator-fixed";
743			reg = <3>;
744			regulator-name = "vdd_1v05";
745			regulator-min-microvolt = <1050000>;
746			regulator-max-microvolt = <1050000>;
747			gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
748			enable-active-high;
749		};
750
751		vdd_pnl_reg: regulator@4 {
752			compatible = "regulator-fixed";
753			reg = <4>;
754			regulator-name = "vdd_pnl";
755			regulator-min-microvolt = <2800000>;
756			regulator-max-microvolt = <2800000>;
757			gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
758			enable-active-high;
759		};
760
761		vdd_bl_reg: regulator@5 {
762			compatible = "regulator-fixed";
763			reg = <5>;
764			regulator-name = "vdd_bl";
765			regulator-min-microvolt = <2800000>;
766			regulator-max-microvolt = <2800000>;
767			gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
768			enable-active-high;
769		};
770
771		vdd_5v0_hdmi: regulator@6 {
772			compatible = "regulator-fixed";
773			reg = <6>;
774			regulator-name = "VDDIO_HDMI";
775			regulator-min-microvolt = <5000000>;
776			regulator-max-microvolt = <5000000>;
777			gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
778			enable-active-high;
779			vin-supply = <&vdd_5v0_reg>;
780		};
781	};
782
783	sound {
784		compatible = "nvidia,tegra-audio-wm8903-harmony",
785			     "nvidia,tegra-audio-wm8903";
786		nvidia,model = "NVIDIA Tegra Harmony";
787
788		nvidia,audio-routing =
789			"Headphone Jack", "HPOUTR",
790			"Headphone Jack", "HPOUTL",
791			"Int Spk", "ROP",
792			"Int Spk", "RON",
793			"Int Spk", "LOP",
794			"Int Spk", "LON",
795			"Mic Jack", "MICBIAS",
796			"IN1L", "Mic Jack";
797
798		nvidia,i2s-controller = <&tegra_i2s1>;
799		nvidia,audio-codec = <&wm8903>;
800
801		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
802		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
803			GPIO_ACTIVE_HIGH>;
804		nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
805			GPIO_ACTIVE_HIGH>;
806		nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
807			GPIO_ACTIVE_HIGH>;
808
809		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
810			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
811			 <&tegra_car TEGRA20_CLK_CDEV1>;
812		clock-names = "pll_a", "pll_a_out0", "mclk";
813	};
814};
815
816&uartd {
817	status = "okay";
818};
819