xref: /openbmc/u-boot/arch/arm/dts/tegra186.dtsi (revision 9702ec00)
1#include "skeleton.dtsi"
2#include <dt-bindings/gpio/tegra-gpio.h>
3#include <dt-bindings/interrupt-controller/arm-gic.h>
4
5/ {
6	compatible = "nvidia,tegra186";
7	#address-cells = <2>;
8	#size-cells = <2>;
9
10	gpio@2200000 {
11		compatible = "nvidia,tegra186-gpio";
12		reg-names = "security", "gpio";
13		reg =
14			<0x0 0x2200000 0x0 0x10000>,
15			<0x0 0x2210000 0x0 0x10000>;
16		interrupts =
17			<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
18			<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
19			<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
20			<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
21			<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
22			<GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
23		gpio-controller;
24		#gpio-cells = <2>;
25		interrupt-controller;
26		#interrupt-cells = <2>;
27	};
28
29	uarta: serial@3100000 {
30		compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
31		reg = <0x0 0x03100000 0x0 0x10000>;
32		reg-shift = <2>;
33		status = "disabled";
34	};
35
36	sdhci@3460000 {
37		compatible = "nvidia,tegra186-sdhci";
38		reg = <0x0 0x03460000 0x0 0x200>;
39		interrupts = <GIC_SPI 31 0x04>;
40		status = "disabled";
41	};
42
43	gpio@c2f0000 {
44		compatible = "nvidia,tegra186-gpio-aon";
45		reg-names = "security", "gpio";
46		reg =
47			<0x0 0xc2f0000 0x0 0x1000>,
48			<0x0 0xc2f1000 0x0 0x1000>;
49		interrupts =
50			<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
51		gpio-controller;
52		#gpio-cells = <2>;
53		interrupt-controller;
54		#interrupt-cells = <2>;
55	};
56};
57