1#include <dt-bindings/clock/tegra124-car.h> 2#include <dt-bindings/gpio/tegra-gpio.h> 3#include <dt-bindings/interrupt-controller/arm-gic.h> 4 5#include "skeleton.dtsi" 6 7/ { 8 compatible = "nvidia,tegra124"; 9 10 tegra_car: clock@60006000 { 11 compatible = "nvidia,tegra124-car"; 12 reg = <0x60006000 0x1000>; 13 #clock-cells = <1>; 14 }; 15 16 apbdma: dma@60020000 { 17 compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma"; 18 reg = <0x60020000 0x1400>; 19 interrupts = <0 104 0x04 20 0 105 0x04 21 0 106 0x04 22 0 107 0x04 23 0 108 0x04 24 0 109 0x04 25 0 110 0x04 26 0 111 0x04 27 0 112 0x04 28 0 113 0x04 29 0 114 0x04 30 0 115 0x04 31 0 116 0x04 32 0 117 0x04 33 0 118 0x04 34 0 119 0x04 35 0 128 0x04 36 0 129 0x04 37 0 130 0x04 38 0 131 0x04 39 0 132 0x04 40 0 133 0x04 41 0 134 0x04 42 0 135 0x04 43 0 136 0x04 44 0 137 0x04 45 0 138 0x04 46 0 139 0x04 47 0 140 0x04 48 0 141 0x04 49 0 142 0x04 50 0 143 0x04>; 51 }; 52 53 gpio: gpio@6000d000 { 54 compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; 55 reg = <0x6000d000 0x1000>; 56 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 57 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 58 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 59 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 60 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 61 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 62 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 63 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 64 #gpio-cells = <2>; 65 gpio-controller; 66 #interrupt-cells = <2>; 67 interrupt-controller; 68 }; 69 70 i2c@7000c000 { 71 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; 72 reg = <0x7000c000 0x100>; 73 interrupts = <0 38 0x04>; 74 #address-cells = <1>; 75 #size-cells = <0>; 76 clocks = <&tegra_car 12>; 77 status = "disabled"; 78 }; 79 80 i2c@7000c400 { 81 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; 82 reg = <0x7000c400 0x100>; 83 interrupts = <0 84 0x04>; 84 #address-cells = <1>; 85 #size-cells = <0>; 86 clocks = <&tegra_car 54>; 87 status = "disabled"; 88 }; 89 90 i2c@7000c500 { 91 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; 92 reg = <0x7000c500 0x100>; 93 interrupts = <0 92 0x04>; 94 #address-cells = <1>; 95 #size-cells = <0>; 96 clocks = <&tegra_car 67>; 97 status = "disabled"; 98 }; 99 100 i2c@7000c700 { 101 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; 102 reg = <0x7000c700 0x100>; 103 interrupts = <0 120 0x04>; 104 #address-cells = <1>; 105 #size-cells = <0>; 106 clocks = <&tegra_car 103>; 107 status = "disabled"; 108 }; 109 110 i2c@7000d000 { 111 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; 112 reg = <0x7000d000 0x100>; 113 interrupts = <0 53 0x04>; 114 #address-cells = <1>; 115 #size-cells = <0>; 116 clocks = <&tegra_car 47>; 117 status = "disabled"; 118 }; 119 120 i2c@7000d100 { 121 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c"; 122 reg = <0x7000d100 0x100>; 123 interrupts = <0 53 0x04>; 124 #address-cells = <1>; 125 #size-cells = <0>; 126 clocks = <&tegra_car 47>; 127 status = "disabled"; 128 }; 129 130 uarta: serial@70006000 { 131 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; 132 reg = <0x70006000 0x40>; 133 reg-shift = <2>; 134 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 135 clocks = <&tegra_car TEGRA124_CLK_UARTA>; 136 resets = <&tegra_car 6>; 137 reset-names = "serial"; 138 dmas = <&apbdma 8>, <&apbdma 8>; 139 dma-names = "rx", "tx"; 140 status = "disabled"; 141 }; 142 143 uartb: serial@70006040 { 144 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; 145 reg = <0x70006040 0x40>; 146 reg-shift = <2>; 147 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 148 clocks = <&tegra_car TEGRA124_CLK_UARTB>; 149 resets = <&tegra_car 7>; 150 reset-names = "serial"; 151 dmas = <&apbdma 9>, <&apbdma 9>; 152 dma-names = "rx", "tx"; 153 status = "disabled"; 154 }; 155 156 uartc: serial@70006200 { 157 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; 158 reg = <0x70006200 0x40>; 159 reg-shift = <2>; 160 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 161 clocks = <&tegra_car TEGRA124_CLK_UARTC>; 162 resets = <&tegra_car 55>; 163 reset-names = "serial"; 164 dmas = <&apbdma 10>, <&apbdma 10>; 165 dma-names = "rx", "tx"; 166 status = "disabled"; 167 }; 168 169 uartd: serial@70006300 { 170 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; 171 reg = <0x70006300 0x40>; 172 reg-shift = <2>; 173 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 174 clocks = <&tegra_car TEGRA124_CLK_UARTD>; 175 resets = <&tegra_car 65>; 176 reset-names = "serial"; 177 dmas = <&apbdma 19>, <&apbdma 19>; 178 dma-names = "rx", "tx"; 179 status = "disabled"; 180 }; 181 182 uarte: serial@70006400 { 183 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; 184 reg = <0x70006400 0x40>; 185 reg-shift = <2>; 186 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 187 clocks = <&tegra_car TEGRA124_CLK_UARTE>; 188 resets = <&tegra_car 66>; 189 reset-names = "serial"; 190 dmas = <&apbdma 20>, <&apbdma 20>; 191 dma-names = "rx", "tx"; 192 status = "disabled"; 193 }; 194 195 spi@7000d400 { 196 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; 197 reg = <0x7000d400 0x200>; 198 interrupts = <0 59 0x04>; 199 nvidia,dma-request-selector = <&apbdma 15>; 200 #address-cells = <1>; 201 #size-cells = <0>; 202 status = "disabled"; 203 clocks = <&tegra_car 41>; 204 }; 205 206 spi@7000d600 { 207 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; 208 reg = <0x7000d600 0x200>; 209 interrupts = <0 82 0x04>; 210 nvidia,dma-request-selector = <&apbdma 16>; 211 #address-cells = <1>; 212 #size-cells = <0>; 213 status = "disabled"; 214 clocks = <&tegra_car 44>; 215 }; 216 217 spi@7000d800 { 218 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; 219 reg = <0x7000d800 0x200>; 220 interrupts = <0 83 0x04>; 221 nvidia,dma-request-selector = <&apbdma 17>; 222 #address-cells = <1>; 223 #size-cells = <0>; 224 status = "disabled"; 225 clocks = <&tegra_car 46>; 226 }; 227 228 spi@7000da00 { 229 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; 230 reg = <0x7000da00 0x200>; 231 interrupts = <0 93 0x04>; 232 nvidia,dma-request-selector = <&apbdma 18>; 233 #address-cells = <1>; 234 #size-cells = <0>; 235 status = "disabled"; 236 clocks = <&tegra_car 68>; 237 }; 238 239 spi@7000dc00 { 240 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; 241 reg = <0x7000dc00 0x200>; 242 interrupts = <0 94 0x04>; 243 nvidia,dma-request-selector = <&apbdma 27>; 244 #address-cells = <1>; 245 #size-cells = <0>; 246 status = "disabled"; 247 clocks = <&tegra_car 104>; 248 }; 249 250 spi@7000de00 { 251 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; 252 reg = <0x7000de00 0x200>; 253 interrupts = <0 79 0x04>; 254 nvidia,dma-request-selector = <&apbdma 28>; 255 #address-cells = <1>; 256 #size-cells = <0>; 257 status = "disabled"; 258 clocks = <&tegra_car 105>; 259 }; 260 261 sdhci@700b0000 { 262 compatible = "nvidia,tegra124-sdhci"; 263 reg = <0x700b0000 0x200>; 264 interrupts = <0 14 0x04>; 265 clocks = <&tegra_car 14>; 266 status = "disabled"; 267 }; 268 269 sdhci@700b0200 { 270 compatible = "nvidia,tegra124-sdhci"; 271 reg = <0x700b0200 0x200>; 272 interrupts = <0 15 0x04>; 273 clocks = <&tegra_car 9>; 274 status = "disabled"; 275 }; 276 277 sdhci@700b0400 { 278 compatible = "nvidia,tegra124-sdhci"; 279 reg = <0x700b0400 0x200>; 280 interrupts = <0 19 0x04>; 281 clocks = <&tegra_car 69>; 282 status = "disabled"; 283 }; 284 285 sdhci@700b0600 { 286 compatible = "nvidia,tegra124-sdhci"; 287 reg = <0x700b0600 0x200>; 288 interrupts = <0 31 0x04>; 289 clocks = <&tegra_car 15>; 290 status = "disabled"; 291 }; 292 293 usb@7d000000 { 294 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci"; 295 reg = <0x7d000000 0x4000>; 296 interrupts = < 52 >; 297 phy_type = "utmi"; 298 clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */ 299 status = "disabled"; 300 }; 301 302 usb@7d004000 { 303 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci"; 304 reg = <0x7d004000 0x4000>; 305 interrupts = < 53 >; 306 phy_type = "hsic"; 307 clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */ 308 status = "disabled"; 309 }; 310 311 usb@7d008000 { 312 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci"; 313 reg = <0x7d008000 0x4000>; 314 interrupts = < 129 >; 315 phy_type = "utmi"; 316 clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */ 317 status = "disabled"; 318 }; 319}; 320