1#include <dt-bindings/gpio/tegra-gpio.h> 2#include <dt-bindings/interrupt-controller/arm-gic.h> 3 4#include "skeleton.dtsi" 5 6/ { 7 compatible = "nvidia,tegra114"; 8 9 tegra_car: clock { 10 compatible = "nvidia,tegra114-car"; 11 reg = <0x60006000 0x1000>; 12 #clock-cells = <1>; 13 }; 14 15 apbdma: dma { 16 compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; 17 reg = <0x6000a000 0x1400>; 18 interrupts = <0 104 0x04 19 0 105 0x04 20 0 106 0x04 21 0 107 0x04 22 0 108 0x04 23 0 109 0x04 24 0 110 0x04 25 0 111 0x04 26 0 112 0x04 27 0 113 0x04 28 0 114 0x04 29 0 115 0x04 30 0 116 0x04 31 0 117 0x04 32 0 118 0x04 33 0 119 0x04 34 0 128 0x04 35 0 129 0x04 36 0 130 0x04 37 0 131 0x04 38 0 132 0x04 39 0 133 0x04 40 0 134 0x04 41 0 135 0x04 42 0 136 0x04 43 0 137 0x04 44 0 138 0x04 45 0 139 0x04 46 0 140 0x04 47 0 141 0x04 48 0 142 0x04 49 0 143 0x04>; 50 }; 51 52 gpio: gpio@6000d000 { 53 compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio"; 54 reg = <0x6000d000 0x1000>; 55 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 56 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 57 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 58 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 59 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 60 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 61 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 62 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 63 #gpio-cells = <2>; 64 gpio-controller; 65 #interrupt-cells = <2>; 66 interrupt-controller; 67 }; 68 69 i2c@7000c000 { 70 compatible = "nvidia,tegra114-i2c"; 71 reg = <0x7000c000 0x100>; 72 interrupts = <0 38 0x04>; 73 #address-cells = <1>; 74 #size-cells = <0>; 75 clocks = <&tegra_car 12>; 76 status = "disabled"; 77 }; 78 79 i2c@7000c400 { 80 compatible = "nvidia,tegra114-i2c"; 81 reg = <0x7000c400 0x100>; 82 interrupts = <0 84 0x04>; 83 #address-cells = <1>; 84 #size-cells = <0>; 85 clocks = <&tegra_car 54>; 86 status = "disabled"; 87 }; 88 89 i2c@7000c500 { 90 compatible = "nvidia,tegra114-i2c"; 91 reg = <0x7000c500 0x100>; 92 interrupts = <0 92 0x04>; 93 #address-cells = <1>; 94 #size-cells = <0>; 95 clocks = <&tegra_car 67>; 96 status = "disabled"; 97 }; 98 99 i2c@7000c700 { 100 compatible = "nvidia,tegra114-i2c"; 101 reg = <0x7000c700 0x100>; 102 interrupts = <0 120 0x04>; 103 #address-cells = <1>; 104 #size-cells = <0>; 105 clocks = <&tegra_car 103>; 106 status = "disabled"; 107 }; 108 109 i2c@7000d000 { 110 compatible = "nvidia,tegra114-i2c"; 111 reg = <0x7000d000 0x100>; 112 interrupts = <0 53 0x04>; 113 #address-cells = <1>; 114 #size-cells = <0>; 115 clocks = <&tegra_car 47>; 116 status = "disabled"; 117 }; 118 119 spi@7000d400 { 120 compatible = "nvidia,tegra114-spi"; 121 reg = <0x7000d400 0x200>; 122 interrupts = <0 59 0x04>; 123 nvidia,dma-request-selector = <&apbdma 15>; 124 #address-cells = <1>; 125 #size-cells = <0>; 126 status = "disabled"; 127 /* PERIPH_ID_SBC1, PLLP_OUT0 */ 128 clocks = <&tegra_car 41>; 129 }; 130 131 spi@7000d600 { 132 compatible = "nvidia,tegra114-spi"; 133 reg = <0x7000d600 0x200>; 134 interrupts = <0 82 0x04>; 135 nvidia,dma-request-selector = <&apbdma 16>; 136 #address-cells = <1>; 137 #size-cells = <0>; 138 status = "disabled"; 139 /* PERIPH_ID_SBC2, PLLP_OUT0 */ 140 clocks = <&tegra_car 44>; 141 }; 142 143 spi@7000d800 { 144 compatible = "nvidia,tegra114-spi"; 145 reg = <0x7000d800 0x200>; 146 interrupts = <0 83 0x04>; 147 nvidia,dma-request-selector = <&apbdma 17>; 148 #address-cells = <1>; 149 #size-cells = <0>; 150 status = "disabled"; 151 /* PERIPH_ID_SBC3, PLLP_OUT0 */ 152 clocks = <&tegra_car 46>; 153 }; 154 155 spi@7000da00 { 156 compatible = "nvidia,tegra114-spi"; 157 reg = <0x7000da00 0x200>; 158 interrupts = <0 93 0x04>; 159 nvidia,dma-request-selector = <&apbdma 18>; 160 #address-cells = <1>; 161 #size-cells = <0>; 162 status = "disabled"; 163 /* PERIPH_ID_SBC4, PLLP_OUT0 */ 164 clocks = <&tegra_car 68>; 165 }; 166 167 spi@7000dc00 { 168 compatible = "nvidia,tegra114-spi"; 169 reg = <0x7000dc00 0x200>; 170 interrupts = <0 94 0x04>; 171 nvidia,dma-request-selector = <&apbdma 27>; 172 #address-cells = <1>; 173 #size-cells = <0>; 174 status = "disabled"; 175 /* PERIPH_ID_SBC5, PLLP_OUT0 */ 176 clocks = <&tegra_car 104>; 177 }; 178 179 spi@7000de00 { 180 compatible = "nvidia,tegra114-spi"; 181 reg = <0x7000de00 0x200>; 182 interrupts = <0 79 0x04>; 183 nvidia,dma-request-selector = <&apbdma 28>; 184 #address-cells = <1>; 185 #size-cells = <0>; 186 status = "disabled"; 187 /* PERIPH_ID_SBC6, PLLP_OUT0 */ 188 clocks = <&tegra_car 105>; 189 }; 190 191 sdhci@78000000 { 192 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; 193 reg = <0x78000000 0x200>; 194 interrupts = <0 14 0x04>; 195 clocks = <&tegra_car 14>; 196 status = "disable"; 197 }; 198 199 sdhci@78000200 { 200 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; 201 reg = <0x78000200 0x200>; 202 interrupts = <0 15 0x04>; 203 clocks = <&tegra_car 9>; 204 status = "disable"; 205 }; 206 207 sdhci@78000400 { 208 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; 209 reg = <0x78000400 0x200>; 210 interrupts = <0 19 0x04>; 211 clocks = <&tegra_car 69>; 212 status = "disable"; 213 }; 214 215 sdhci@78000600 { 216 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; 217 reg = <0x78000600 0x200>; 218 interrupts = <0 31 0x04>; 219 clocks = <&tegra_car 15>; 220 status = "disable"; 221 }; 222 223 usb@7d000000 { 224 compatible = "nvidia,tegra114-ehci"; 225 reg = <0x7d000000 0x4000>; 226 interrupts = <52>; 227 phy_type = "utmi"; 228 clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */ 229 status = "disabled"; 230 }; 231 232 usb@7d004000 { 233 compatible = "nvidia,tegra114-ehci"; 234 reg = <0x7d004000 0x4000>; 235 interrupts = <53>; 236 phy_type = "hsic"; 237 clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */ 238 status = "disabled"; 239 }; 240 241 usb@7d008000 { 242 compatible = "nvidia,tegra114-ehci"; 243 reg = <0x7d008000 0x4000>; 244 interrupts = <129>; 245 phy_type = "utmi"; 246 clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */ 247 status = "disabled"; 248 }; 249}; 250