11328a816SChen-Yu Tsai/* 2*0ca4d40cSJagan Teki * Copyright 2017 Chen-Yu Tsai 3*0ca4d40cSJagan Teki * 4*0ca4d40cSJagan Teki * Chen-Yu Tsai <wens@csie.org> 51328a816SChen-Yu Tsai * 61328a816SChen-Yu Tsai * This file is dual-licensed: you can use it either under the terms 71328a816SChen-Yu Tsai * of the GPL or the X11 license, at your option. Note that this dual 81328a816SChen-Yu Tsai * licensing only applies to this file, and not this project as a 91328a816SChen-Yu Tsai * whole. 101328a816SChen-Yu Tsai * 111328a816SChen-Yu Tsai * a) This file is free software; you can redistribute it and/or 121328a816SChen-Yu Tsai * modify it under the terms of the GNU General Public License as 131328a816SChen-Yu Tsai * published by the Free Software Foundation; either version 2 of the 141328a816SChen-Yu Tsai * License, or (at your option) any later version. 151328a816SChen-Yu Tsai * 161328a816SChen-Yu Tsai * This file is distributed in the hope that it will be useful, 171328a816SChen-Yu Tsai * but WITHOUT ANY WARRANTY; without even the implied warranty of 181328a816SChen-Yu Tsai * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 191328a816SChen-Yu Tsai * GNU General Public License for more details. 201328a816SChen-Yu Tsai * 211328a816SChen-Yu Tsai * Or, alternatively, 221328a816SChen-Yu Tsai * 231328a816SChen-Yu Tsai * b) Permission is hereby granted, free of charge, to any person 241328a816SChen-Yu Tsai * obtaining a copy of this software and associated documentation 251328a816SChen-Yu Tsai * files (the "Software"), to deal in the Software without 261328a816SChen-Yu Tsai * restriction, including without limitation the rights to use, 271328a816SChen-Yu Tsai * copy, modify, merge, publish, distribute, sublicense, and/or 281328a816SChen-Yu Tsai * sell copies of the Software, and to permit persons to whom the 291328a816SChen-Yu Tsai * Software is furnished to do so, subject to the following 301328a816SChen-Yu Tsai * conditions: 311328a816SChen-Yu Tsai * 321328a816SChen-Yu Tsai * The above copyright notice and this permission notice shall be 331328a816SChen-Yu Tsai * included in all copies or substantial portions of the Software. 341328a816SChen-Yu Tsai * 351328a816SChen-Yu Tsai * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 361328a816SChen-Yu Tsai * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 371328a816SChen-Yu Tsai * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 381328a816SChen-Yu Tsai * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 391328a816SChen-Yu Tsai * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 401328a816SChen-Yu Tsai * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 411328a816SChen-Yu Tsai * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 421328a816SChen-Yu Tsai * OTHER DEALINGS IN THE SOFTWARE. 431328a816SChen-Yu Tsai */ 441328a816SChen-Yu Tsai 451328a816SChen-Yu Tsai/dts-v1/; 461328a816SChen-Yu Tsai#include "sun8i-a83t.dtsi" 471328a816SChen-Yu Tsai 48*0ca4d40cSJagan Teki#include <dt-bindings/gpio/gpio.h> 49*0ca4d40cSJagan Teki 501328a816SChen-Yu Tsai/ { 51*0ca4d40cSJagan Teki model = "Banana Pi BPI-M3"; 52*0ca4d40cSJagan Teki compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t"; 531328a816SChen-Yu Tsai 541328a816SChen-Yu Tsai aliases { 55*0ca4d40cSJagan Teki ethernet0 = &emac; 561328a816SChen-Yu Tsai serial0 = &uart0; 571328a816SChen-Yu Tsai }; 581328a816SChen-Yu Tsai 591328a816SChen-Yu Tsai chosen { 601328a816SChen-Yu Tsai stdout-path = "serial0:115200n8"; 611328a816SChen-Yu Tsai }; 62*0ca4d40cSJagan Teki 63*0ca4d40cSJagan Teki connector { 64*0ca4d40cSJagan Teki compatible = "hdmi-connector"; 65*0ca4d40cSJagan Teki type = "a"; 66*0ca4d40cSJagan Teki 67*0ca4d40cSJagan Teki port { 68*0ca4d40cSJagan Teki hdmi_con_in: endpoint { 69*0ca4d40cSJagan Teki remote-endpoint = <&hdmi_out_con>; 70*0ca4d40cSJagan Teki }; 71*0ca4d40cSJagan Teki }; 72*0ca4d40cSJagan Teki }; 73*0ca4d40cSJagan Teki 74*0ca4d40cSJagan Teki leds { 75*0ca4d40cSJagan Teki compatible = "gpio-leds"; 76*0ca4d40cSJagan Teki 77*0ca4d40cSJagan Teki blue { 78*0ca4d40cSJagan Teki label = "bananapi-m3:blue:usr"; 79*0ca4d40cSJagan Teki gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>; 80*0ca4d40cSJagan Teki }; 81*0ca4d40cSJagan Teki 82*0ca4d40cSJagan Teki green { 83*0ca4d40cSJagan Teki label = "bananapi-m3:green:usr"; 84*0ca4d40cSJagan Teki gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; 85*0ca4d40cSJagan Teki }; 86*0ca4d40cSJagan Teki }; 87*0ca4d40cSJagan Teki 88*0ca4d40cSJagan Teki reg_usb1_vbus: reg-usb1-vbus { 89*0ca4d40cSJagan Teki compatible = "regulator-fixed"; 90*0ca4d40cSJagan Teki regulator-name = "usb1-vbus"; 91*0ca4d40cSJagan Teki regulator-min-microvolt = <5000000>; 92*0ca4d40cSJagan Teki regulator-max-microvolt = <5000000>; 93*0ca4d40cSJagan Teki regulator-boot-on; 94*0ca4d40cSJagan Teki enable-active-high; 95*0ca4d40cSJagan Teki gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ 96*0ca4d40cSJagan Teki }; 97*0ca4d40cSJagan Teki 98*0ca4d40cSJagan Teki wifi_pwrseq: wifi_pwrseq { 99*0ca4d40cSJagan Teki compatible = "mmc-pwrseq-simple"; 100*0ca4d40cSJagan Teki clocks = <&ac100_rtc 1>; 101*0ca4d40cSJagan Teki clock-names = "ext_clock"; 102*0ca4d40cSJagan Teki /* The WiFi low power clock must be 32768 Hz */ 103*0ca4d40cSJagan Teki assigned-clocks = <&ac100_rtc 1>; 104*0ca4d40cSJagan Teki assigned-clock-rates = <32768>; 105*0ca4d40cSJagan Teki /* enables internal regulator and de-asserts reset */ 106*0ca4d40cSJagan Teki reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */ 107*0ca4d40cSJagan Teki }; 108*0ca4d40cSJagan Teki}; 109*0ca4d40cSJagan Teki 110*0ca4d40cSJagan Teki&de { 111*0ca4d40cSJagan Teki status = "okay"; 1121328a816SChen-Yu Tsai}; 1131328a816SChen-Yu Tsai 1141328a816SChen-Yu Tsai&ehci0 { 115*0ca4d40cSJagan Teki /* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */ 1161328a816SChen-Yu Tsai status = "okay"; 117*0ca4d40cSJagan Teki 118*0ca4d40cSJagan Teki /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */ 119*0ca4d40cSJagan Teki}; 120*0ca4d40cSJagan Teki 121*0ca4d40cSJagan Teki&emac { 122*0ca4d40cSJagan Teki pinctrl-names = "default"; 123*0ca4d40cSJagan Teki pinctrl-0 = <&emac_rgmii_pins>; 124*0ca4d40cSJagan Teki phy-supply = <®_sw>; 125*0ca4d40cSJagan Teki phy-handle = <&rgmii_phy>; 126*0ca4d40cSJagan Teki phy-mode = "rgmii"; 127*0ca4d40cSJagan Teki allwinner,rx-delay-ps = <700>; 128*0ca4d40cSJagan Teki allwinner,tx-delay-ps = <700>; 129*0ca4d40cSJagan Teki status = "okay"; 130*0ca4d40cSJagan Teki}; 131*0ca4d40cSJagan Teki 132*0ca4d40cSJagan Teki&hdmi { 133*0ca4d40cSJagan Teki status = "okay"; 134*0ca4d40cSJagan Teki}; 135*0ca4d40cSJagan Teki 136*0ca4d40cSJagan Teki&hdmi_out { 137*0ca4d40cSJagan Teki hdmi_out_con: endpoint { 138*0ca4d40cSJagan Teki remote-endpoint = <&hdmi_con_in>; 139*0ca4d40cSJagan Teki }; 140*0ca4d40cSJagan Teki}; 141*0ca4d40cSJagan Teki 142*0ca4d40cSJagan Teki&mdio { 143*0ca4d40cSJagan Teki rgmii_phy: ethernet-phy@1 { 144*0ca4d40cSJagan Teki compatible = "ethernet-phy-ieee802.3-c22"; 145*0ca4d40cSJagan Teki reg = <1>; 146*0ca4d40cSJagan Teki }; 147*0ca4d40cSJagan Teki}; 148*0ca4d40cSJagan Teki 149*0ca4d40cSJagan Teki&mmc0 { 150*0ca4d40cSJagan Teki pinctrl-names = "default"; 151*0ca4d40cSJagan Teki pinctrl-0 = <&mmc0_pins>; 152*0ca4d40cSJagan Teki vmmc-supply = <®_dcdc1>; 153*0ca4d40cSJagan Teki bus-width = <4>; 154*0ca4d40cSJagan Teki cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 155*0ca4d40cSJagan Teki status = "okay"; 156*0ca4d40cSJagan Teki}; 157*0ca4d40cSJagan Teki 158*0ca4d40cSJagan Teki&mmc1 { 159*0ca4d40cSJagan Teki vmmc-supply = <®_dldo1>; 160*0ca4d40cSJagan Teki vqmmc-supply = <®_dldo1>; 161*0ca4d40cSJagan Teki mmc-pwrseq = <&wifi_pwrseq>; 162*0ca4d40cSJagan Teki bus-width = <4>; 163*0ca4d40cSJagan Teki non-removable; 164*0ca4d40cSJagan Teki status = "okay"; 165*0ca4d40cSJagan Teki 166*0ca4d40cSJagan Teki brcmf: wifi@1 { 167*0ca4d40cSJagan Teki reg = <1>; 168*0ca4d40cSJagan Teki compatible = "brcm,bcm4329-fmac"; 169*0ca4d40cSJagan Teki interrupt-parent = <&r_pio>; 170*0ca4d40cSJagan Teki interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; 171*0ca4d40cSJagan Teki interrupt-names = "host-wake"; 172*0ca4d40cSJagan Teki }; 173*0ca4d40cSJagan Teki}; 174*0ca4d40cSJagan Teki 175*0ca4d40cSJagan Teki&mmc2 { 176*0ca4d40cSJagan Teki pinctrl-names = "default"; 177*0ca4d40cSJagan Teki pinctrl-0 = <&mmc2_8bit_emmc_pins>; 178*0ca4d40cSJagan Teki vmmc-supply = <®_dcdc1>; 179*0ca4d40cSJagan Teki vqmmc-supply = <®_dcdc1>; 180*0ca4d40cSJagan Teki bus-width = <8>; 181*0ca4d40cSJagan Teki non-removable; 182*0ca4d40cSJagan Teki cap-mmc-hw-reset; 183*0ca4d40cSJagan Teki status = "okay"; 184*0ca4d40cSJagan Teki}; 185*0ca4d40cSJagan Teki 186*0ca4d40cSJagan Teki&r_rsb { 187*0ca4d40cSJagan Teki status = "okay"; 188*0ca4d40cSJagan Teki 189*0ca4d40cSJagan Teki axp81x: pmic@3a3 { 190*0ca4d40cSJagan Teki compatible = "x-powers,axp813"; 191*0ca4d40cSJagan Teki reg = <0x3a3>; 192*0ca4d40cSJagan Teki interrupt-parent = <&r_intc>; 193*0ca4d40cSJagan Teki interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 194*0ca4d40cSJagan Teki eldoin-supply = <®_dcdc1>; 195*0ca4d40cSJagan Teki fldoin-supply = <®_dcdc5>; 196*0ca4d40cSJagan Teki swin-supply = <®_dcdc1>; 197*0ca4d40cSJagan Teki x-powers,drive-vbus-en; 198*0ca4d40cSJagan Teki }; 199*0ca4d40cSJagan Teki 200*0ca4d40cSJagan Teki ac100: codec@e89 { 201*0ca4d40cSJagan Teki compatible = "x-powers,ac100"; 202*0ca4d40cSJagan Teki reg = <0xe89>; 203*0ca4d40cSJagan Teki 204*0ca4d40cSJagan Teki ac100_codec: codec { 205*0ca4d40cSJagan Teki compatible = "x-powers,ac100-codec"; 206*0ca4d40cSJagan Teki interrupt-parent = <&r_pio>; 207*0ca4d40cSJagan Teki interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */ 208*0ca4d40cSJagan Teki #clock-cells = <0>; 209*0ca4d40cSJagan Teki clock-output-names = "4M_adda"; 210*0ca4d40cSJagan Teki }; 211*0ca4d40cSJagan Teki 212*0ca4d40cSJagan Teki ac100_rtc: rtc { 213*0ca4d40cSJagan Teki compatible = "x-powers,ac100-rtc"; 214*0ca4d40cSJagan Teki interrupt-parent = <&r_intc>; 215*0ca4d40cSJagan Teki interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 216*0ca4d40cSJagan Teki clocks = <&ac100_codec>; 217*0ca4d40cSJagan Teki #clock-cells = <1>; 218*0ca4d40cSJagan Teki clock-output-names = "cko1_rtc", 219*0ca4d40cSJagan Teki "cko2_rtc", 220*0ca4d40cSJagan Teki "cko3_rtc"; 221*0ca4d40cSJagan Teki }; 222*0ca4d40cSJagan Teki }; 223*0ca4d40cSJagan Teki}; 224*0ca4d40cSJagan Teki 225*0ca4d40cSJagan Teki#include "axp81x.dtsi" 226*0ca4d40cSJagan Teki 227*0ca4d40cSJagan Teki®_aldo1 { 228*0ca4d40cSJagan Teki regulator-always-on; 229*0ca4d40cSJagan Teki regulator-min-microvolt = <1800000>; 230*0ca4d40cSJagan Teki regulator-max-microvolt = <1800000>; 231*0ca4d40cSJagan Teki regulator-name = "vcc-1v8"; 232*0ca4d40cSJagan Teki}; 233*0ca4d40cSJagan Teki 234*0ca4d40cSJagan Teki®_aldo2 { 235*0ca4d40cSJagan Teki regulator-always-on; 236*0ca4d40cSJagan Teki regulator-min-microvolt = <1800000>; 237*0ca4d40cSJagan Teki regulator-max-microvolt = <1800000>; 238*0ca4d40cSJagan Teki regulator-name = "dram-pll"; 239*0ca4d40cSJagan Teki}; 240*0ca4d40cSJagan Teki 241*0ca4d40cSJagan Teki®_aldo3 { 242*0ca4d40cSJagan Teki regulator-always-on; 243*0ca4d40cSJagan Teki regulator-min-microvolt = <3000000>; 244*0ca4d40cSJagan Teki regulator-max-microvolt = <3000000>; 245*0ca4d40cSJagan Teki regulator-name = "avcc"; 246*0ca4d40cSJagan Teki}; 247*0ca4d40cSJagan Teki 248*0ca4d40cSJagan Teki®_dcdc1 { 249*0ca4d40cSJagan Teki /* schematics says 3.1V but FEX file says 3.3V */ 250*0ca4d40cSJagan Teki regulator-always-on; 251*0ca4d40cSJagan Teki regulator-min-microvolt = <3300000>; 252*0ca4d40cSJagan Teki regulator-max-microvolt = <3300000>; 253*0ca4d40cSJagan Teki regulator-name = "vcc-3v3"; 254*0ca4d40cSJagan Teki}; 255*0ca4d40cSJagan Teki 256*0ca4d40cSJagan Teki®_dcdc2 { 257*0ca4d40cSJagan Teki regulator-always-on; 258*0ca4d40cSJagan Teki regulator-min-microvolt = <700000>; 259*0ca4d40cSJagan Teki regulator-max-microvolt = <1100000>; 260*0ca4d40cSJagan Teki regulator-name = "vdd-cpua"; 261*0ca4d40cSJagan Teki}; 262*0ca4d40cSJagan Teki 263*0ca4d40cSJagan Teki®_dcdc3 { 264*0ca4d40cSJagan Teki regulator-always-on; 265*0ca4d40cSJagan Teki regulator-min-microvolt = <700000>; 266*0ca4d40cSJagan Teki regulator-max-microvolt = <1100000>; 267*0ca4d40cSJagan Teki regulator-name = "vdd-cpub"; 268*0ca4d40cSJagan Teki}; 269*0ca4d40cSJagan Teki 270*0ca4d40cSJagan Teki®_dcdc4 { 271*0ca4d40cSJagan Teki regulator-min-microvolt = <700000>; 272*0ca4d40cSJagan Teki regulator-max-microvolt = <1100000>; 273*0ca4d40cSJagan Teki regulator-name = "vdd-gpu"; 274*0ca4d40cSJagan Teki}; 275*0ca4d40cSJagan Teki 276*0ca4d40cSJagan Teki®_dcdc5 { 277*0ca4d40cSJagan Teki regulator-always-on; 278*0ca4d40cSJagan Teki regulator-min-microvolt = <1200000>; 279*0ca4d40cSJagan Teki regulator-max-microvolt = <1200000>; 280*0ca4d40cSJagan Teki regulator-name = "vcc-dram"; 281*0ca4d40cSJagan Teki}; 282*0ca4d40cSJagan Teki 283*0ca4d40cSJagan Teki®_dcdc6 { 284*0ca4d40cSJagan Teki regulator-always-on; 285*0ca4d40cSJagan Teki regulator-min-microvolt = <900000>; 286*0ca4d40cSJagan Teki regulator-max-microvolt = <900000>; 287*0ca4d40cSJagan Teki regulator-name = "vdd-sys"; 288*0ca4d40cSJagan Teki}; 289*0ca4d40cSJagan Teki 290*0ca4d40cSJagan Teki®_dldo1 { 291*0ca4d40cSJagan Teki /* 292*0ca4d40cSJagan Teki * This powers both the WiFi/BT module's main power, I/O supply, 293*0ca4d40cSJagan Teki * and external pull-ups on all the data lines. It should be set 294*0ca4d40cSJagan Teki * to the same voltage as the I/O supply (DCDC1 in this case) to 295*0ca4d40cSJagan Teki * avoid any leakage or mismatch. 296*0ca4d40cSJagan Teki */ 297*0ca4d40cSJagan Teki regulator-min-microvolt = <3300000>; 298*0ca4d40cSJagan Teki regulator-max-microvolt = <3300000>; 299*0ca4d40cSJagan Teki regulator-name = "vcc-wifi"; 300*0ca4d40cSJagan Teki}; 301*0ca4d40cSJagan Teki 302*0ca4d40cSJagan Teki®_dldo3 { 303*0ca4d40cSJagan Teki regulator-always-on; 304*0ca4d40cSJagan Teki regulator-min-microvolt = <2500000>; 305*0ca4d40cSJagan Teki regulator-max-microvolt = <2500000>; 306*0ca4d40cSJagan Teki regulator-name = "vcc-pd"; 307*0ca4d40cSJagan Teki}; 308*0ca4d40cSJagan Teki 309*0ca4d40cSJagan Teki®_drivevbus { 310*0ca4d40cSJagan Teki regulator-name = "usb0-vbus"; 311*0ca4d40cSJagan Teki status = "okay"; 312*0ca4d40cSJagan Teki}; 313*0ca4d40cSJagan Teki 314*0ca4d40cSJagan Teki®_fldo1 { 315*0ca4d40cSJagan Teki regulator-min-microvolt = <1080000>; 316*0ca4d40cSJagan Teki regulator-max-microvolt = <1320000>; 317*0ca4d40cSJagan Teki regulator-name = "vdd12-hsic"; 318*0ca4d40cSJagan Teki}; 319*0ca4d40cSJagan Teki 320*0ca4d40cSJagan Teki®_fldo2 { 321*0ca4d40cSJagan Teki /* 322*0ca4d40cSJagan Teki * Despite the embedded CPUs core not being used in any way, 323*0ca4d40cSJagan Teki * this must remain on or the system will hang. 324*0ca4d40cSJagan Teki */ 325*0ca4d40cSJagan Teki regulator-always-on; 326*0ca4d40cSJagan Teki regulator-min-microvolt = <700000>; 327*0ca4d40cSJagan Teki regulator-max-microvolt = <1100000>; 328*0ca4d40cSJagan Teki regulator-name = "vdd-cpus"; 329*0ca4d40cSJagan Teki}; 330*0ca4d40cSJagan Teki 331*0ca4d40cSJagan Teki®_rtc_ldo { 332*0ca4d40cSJagan Teki regulator-name = "vcc-rtc"; 333*0ca4d40cSJagan Teki}; 334*0ca4d40cSJagan Teki 335*0ca4d40cSJagan Teki®_sw { 336*0ca4d40cSJagan Teki /* 337*0ca4d40cSJagan Teki * The PHY requires 20ms after all voltages 338*0ca4d40cSJagan Teki * are applied until core logic is ready and 339*0ca4d40cSJagan Teki * 30ms after the reset pin is de-asserted. 340*0ca4d40cSJagan Teki * Set a 100ms delay to account for PMIC 341*0ca4d40cSJagan Teki * ramp time and board traces. 342*0ca4d40cSJagan Teki */ 343*0ca4d40cSJagan Teki regulator-enable-ramp-delay = <100000>; 344*0ca4d40cSJagan Teki regulator-name = "vcc-ephy"; 3451328a816SChen-Yu Tsai}; 3461328a816SChen-Yu Tsai 3471328a816SChen-Yu Tsai&uart0 { 3481328a816SChen-Yu Tsai pinctrl-names = "default"; 349*0ca4d40cSJagan Teki pinctrl-0 = <&uart0_pb_pins>; 3501328a816SChen-Yu Tsai status = "okay"; 3511328a816SChen-Yu Tsai}; 3521328a816SChen-Yu Tsai 3531328a816SChen-Yu Tsai&usb_otg { 3541328a816SChen-Yu Tsai status = "okay"; 3551328a816SChen-Yu Tsai}; 356*0ca4d40cSJagan Teki 357*0ca4d40cSJagan Teki&usbphy { 358*0ca4d40cSJagan Teki usb1_vbus-supply = <®_usb1_vbus>; 359*0ca4d40cSJagan Teki status = "okay"; 360*0ca4d40cSJagan Teki}; 361