1/* 2 * Copyright 2012 Maxime Ripard 3 * 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of the 14 * License, or (at your option) any later version. 15 * 16 * This library is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * Or, alternatively, 22 * 23 * b) Permission is hereby granted, free of charge, to any person 24 * obtaining a copy of this software and associated documentation 25 * files (the "Software"), to deal in the Software without 26 * restriction, including without limitation the rights to use, 27 * copy, modify, merge, publish, distribute, sublicense, and/or 28 * sell copies of the Software, and to permit persons to whom the 29 * Software is furnished to do so, subject to the following 30 * conditions: 31 * 32 * The above copyright notice and this permission notice shall be 33 * included in all copies or substantial portions of the Software. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42 * OTHER DEALINGS IN THE SOFTWARE. 43 */ 44 45#include "skeleton.dtsi" 46 47#include "sun5i.dtsi" 48 49#include <dt-bindings/pinctrl/sun4i-a10.h> 50#include <dt-bindings/thermal/thermal.h> 51 52/ { 53 interrupt-parent = <&intc>; 54 55 chosen { 56 #address-cells = <1>; 57 #size-cells = <1>; 58 ranges; 59 60 framebuffer@0 { 61 compatible = "allwinner,simple-framebuffer", 62 "simple-framebuffer"; 63 allwinner,pipeline = "de_be0-lcd0"; 64 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; 65 status = "disabled"; 66 }; 67 }; 68 69 thermal-zones { 70 cpu_thermal { 71 /* milliseconds */ 72 polling-delay-passive = <250>; 73 polling-delay = <1000>; 74 thermal-sensors = <&rtp>; 75 76 cooling-maps { 77 map0 { 78 trip = <&cpu_alert0>; 79 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 80 }; 81 }; 82 83 trips { 84 cpu_alert0: cpu_alert0 { 85 /* milliCelsius */ 86 temperature = <850000>; 87 hysteresis = <2000>; 88 type = "passive"; 89 }; 90 91 cpu_crit: cpu_crit { 92 /* milliCelsius */ 93 temperature = <100000>; 94 hysteresis = <2000>; 95 type = "critical"; 96 }; 97 }; 98 }; 99 }; 100 101 clocks { 102 ahb_gates: clk@01c20060 { 103 #clock-cells = <1>; 104 compatible = "allwinner,sun5i-a13-ahb-gates-clk"; 105 reg = <0x01c20060 0x8>; 106 clocks = <&ahb>; 107 clock-indices = <0>, <1>, 108 <2>, <5>, <6>, 109 <7>, <8>, <9>, 110 <10>, <13>, 111 <14>, <20>, 112 <21>, <22>, 113 <28>, <32>, <36>, 114 <40>, <44>, 115 <46>, <51>, 116 <52>; 117 clock-output-names = "ahb_usbotg", "ahb_ehci", 118 "ahb_ohci", "ahb_ss", "ahb_dma", 119 "ahb_bist", "ahb_mmc0", "ahb_mmc1", 120 "ahb_mmc2", "ahb_nand", 121 "ahb_sdram", "ahb_spi0", 122 "ahb_spi1", "ahb_spi2", 123 "ahb_stimer", "ahb_ve", "ahb_lcd", 124 "ahb_csi", "ahb_de_be", 125 "ahb_de_fe", "ahb_iep", 126 "ahb_mali400"; 127 }; 128 129 apb0_gates: clk@01c20068 { 130 #clock-cells = <1>; 131 compatible = "allwinner,sun5i-a13-apb0-gates-clk"; 132 reg = <0x01c20068 0x4>; 133 clocks = <&apb0>; 134 clock-indices = <0>, <5>, 135 <6>; 136 clock-output-names = "apb0_codec", "apb0_pio", 137 "apb0_ir"; 138 }; 139 140 apb1_gates: clk@01c2006c { 141 #clock-cells = <1>; 142 compatible = "allwinner,sun5i-a13-apb1-gates-clk"; 143 reg = <0x01c2006c 0x4>; 144 clocks = <&apb1>; 145 clock-indices = <0>, <1>, 146 <2>, <17>, 147 <19>; 148 clock-output-names = "apb1_i2c0", "apb1_i2c1", 149 "apb1_i2c2", "apb1_uart1", 150 "apb1_uart3"; 151 }; 152 }; 153 154 soc@01c00000 { 155 pwm: pwm@01c20e00 { 156 compatible = "allwinner,sun5i-a13-pwm"; 157 reg = <0x01c20e00 0xc>; 158 clocks = <&osc24M>; 159 #pwm-cells = <3>; 160 status = "disabled"; 161 }; 162 }; 163}; 164 165&cpu0 { 166 clock-latency = <244144>; /* 8 32k periods */ 167 operating-points = < 168 /* kHz uV */ 169 1008000 1400000 170 912000 1350000 171 864000 1300000 172 624000 1200000 173 576000 1200000 174 432000 1200000 175 >; 176 #cooling-cells = <2>; 177 cooling-min-level = <0>; 178 cooling-max-level = <5>; 179}; 180 181&pio { 182 compatible = "allwinner,sun5i-a13-pinctrl"; 183 184 uart1_pins_a: uart1@0 { 185 allwinner,pins = "PE10", "PE11"; 186 allwinner,function = "uart1"; 187 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 188 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 189 }; 190 191 uart1_pins_b: uart1@1 { 192 allwinner,pins = "PG3", "PG4"; 193 allwinner,function = "uart1"; 194 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 195 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 196 }; 197}; 198