xref: /openbmc/u-boot/arch/arm/dts/sun5i-a10s.dtsi (revision 62e92077)
1/*
2 * Copyright 2013 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 *  a) This library is free software; you can redistribute it and/or
12 *     modify it under the terms of the GNU General Public License as
13 *     published by the Free Software Foundation; either version 2 of the
14 *     License, or (at your option) any later version.
15 *
16 *     This library is distributed in the hope that it will be useful,
17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19 *     GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 *  b) Permission is hereby granted, free of charge, to any person
24 *     obtaining a copy of this software and associated documentation
25 *     files (the "Software"), to deal in the Software without
26 *     restriction, including without limitation the rights to use,
27 *     copy, modify, merge, publish, distribute, sublicense, and/or
28 *     sell copies of the Software, and to permit persons to whom the
29 *     Software is furnished to do so, subject to the following
30 *     conditions:
31 *
32 *     The above copyright notice and this permission notice shall be
33 *     included in all copies or substantial portions of the Software.
34 *
35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 *     OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45#include "skeleton.dtsi"
46
47#include "sun5i.dtsi"
48
49#include <dt-bindings/dma/sun4i-a10.h>
50#include <dt-bindings/pinctrl/sun4i-a10.h>
51
52/ {
53	interrupt-parent = <&intc>;
54
55	aliases {
56		ethernet0 = &emac;
57	};
58
59	chosen {
60		#address-cells = <1>;
61		#size-cells = <1>;
62		ranges;
63
64		framebuffer@0 {
65			compatible = "allwinner,simple-framebuffer",
66				     "simple-framebuffer";
67			allwinner,pipeline = "de_be0-lcd0-hdmi";
68			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
69				 <&ahb_gates 44>;
70			status = "disabled";
71		};
72
73		framebuffer@1 {
74			compatible = "allwinner,simple-framebuffer",
75				     "simple-framebuffer";
76			allwinner,pipeline = "de_be0-lcd0";
77			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
78			status = "disabled";
79		};
80
81		framebuffer@2 {
82			compatible = "allwinner,simple-framebuffer",
83				     "simple-framebuffer";
84			allwinner,pipeline = "de_be0-lcd0-tve0";
85			clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
86				 <&ahb_gates 44>;
87			status = "disabled";
88		};
89	};
90
91	clocks {
92		ahb_gates: clk@01c20060 {
93			#clock-cells = <1>;
94			compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
95			reg = <0x01c20060 0x8>;
96			clocks = <&ahb>;
97			clock-indices = <0>, <1>,
98					<2>, <5>, <6>,
99					<7>, <8>, <9>,
100					<10>, <13>,
101					<14>, <17>, <18>,
102					<20>, <21>, <22>,
103					<26>, <28>, <32>,
104					<34>, <36>, <40>,
105					<43>, <44>,
106					<46>, <51>,
107					<52>;
108			clock-output-names = "ahb_usbotg", "ahb_ehci",
109					     "ahb_ohci", "ahb_ss", "ahb_dma",
110					     "ahb_bist", "ahb_mmc0", "ahb_mmc1",
111					     "ahb_mmc2", "ahb_nand",
112					     "ahb_sdram", "ahb_emac", "ahb_ts",
113					     "ahb_spi0", "ahb_spi1", "ahb_spi2",
114					     "ahb_gps", "ahb_stimer", "ahb_ve",
115					     "ahb_tve", "ahb_lcd", "ahb_csi",
116					     "ahb_hdmi", "ahb_de_be",
117					     "ahb_de_fe", "ahb_iep",
118					     "ahb_mali400";
119		};
120
121		apb0_gates: clk@01c20068 {
122			#clock-cells = <1>;
123			compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
124			reg = <0x01c20068 0x4>;
125			clocks = <&apb0>;
126			clock-indices = <0>, <3>,
127					<5>, <6>,
128					<10>;
129			clock-output-names = "apb0_codec", "apb0_iis",
130					     "apb0_pio", "apb0_ir",
131					     "apb0_keypad";
132		};
133
134		apb1_gates: clk@01c2006c {
135			#clock-cells = <1>;
136			compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
137			reg = <0x01c2006c 0x4>;
138			clocks = <&apb1>;
139			clock-indices = <0>, <1>,
140					<2>, <16>,
141					<17>, <18>,
142					<19>;
143			clock-output-names = "apb1_i2c0", "apb1_i2c1",
144					     "apb1_i2c2", "apb1_uart0",
145					     "apb1_uart1", "apb1_uart2",
146					     "apb1_uart3";
147		};
148	};
149
150	soc@01c00000 {
151		emac: ethernet@01c0b000 {
152			compatible = "allwinner,sun4i-a10-emac";
153			reg = <0x01c0b000 0x1000>;
154			interrupts = <55>;
155			clocks = <&ahb_gates 17>;
156			allwinner,sram = <&emac_sram 1>;
157			status = "disabled";
158		};
159
160		mdio: mdio@01c0b080 {
161			compatible = "allwinner,sun4i-a10-mdio";
162			reg = <0x01c0b080 0x14>;
163			status = "disabled";
164			#address-cells = <1>;
165			#size-cells = <0>;
166		};
167
168		pwm: pwm@01c20e00 {
169			compatible = "allwinner,sun5i-a10s-pwm";
170			reg = <0x01c20e00 0xc>;
171			clocks = <&osc24M>;
172			#pwm-cells = <3>;
173			status = "disabled";
174		};
175
176		uart0: serial@01c28000 {
177			compatible = "snps,dw-apb-uart";
178			reg = <0x01c28000 0x400>;
179			interrupts = <1>;
180			reg-shift = <2>;
181			reg-io-width = <4>;
182			clocks = <&apb1_gates 16>;
183			status = "disabled";
184		};
185
186		uart2: serial@01c28800 {
187			compatible = "snps,dw-apb-uart";
188			reg = <0x01c28800 0x400>;
189			interrupts = <3>;
190			reg-shift = <2>;
191			reg-io-width = <4>;
192			clocks = <&apb1_gates 18>;
193			status = "disabled";
194		};
195	};
196};
197
198&pio {
199	compatible = "allwinner,sun5i-a10s-pinctrl";
200
201	uart0_pins_a: uart0@0 {
202		allwinner,pins = "PB19", "PB20";
203		allwinner,function = "uart0";
204		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
205		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
206	};
207
208	uart2_pins_a: uart2@0 {
209		allwinner,pins = "PC18", "PC19";
210		allwinner,function = "uart2";
211		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
212		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
213	};
214
215	emac_pins_a: emac0@0 {
216		allwinner,pins = "PA0", "PA1", "PA2",
217				"PA3", "PA4", "PA5", "PA6",
218				"PA7", "PA8", "PA9", "PA10",
219				"PA11", "PA12", "PA13", "PA14",
220				"PA15", "PA16";
221		allwinner,function = "emac";
222		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
223		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
224	};
225
226	emac_pins_b: emac0@1 {
227		allwinner,pins = "PD6", "PD7", "PD10",
228				"PD11", "PD12", "PD13", "PD14",
229				"PD15", "PD18", "PD19", "PD20",
230				"PD21", "PD22", "PD23", "PD24",
231				"PD25", "PD26", "PD27";
232		allwinner,function = "emac";
233		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
234		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
235	};
236
237	mmc1_pins_a: mmc1@0 {
238		allwinner,pins = "PG3", "PG4", "PG5",
239				 "PG6", "PG7", "PG8";
240		allwinner,function = "mmc1";
241		allwinner,drive = <SUN4I_PINCTRL_30_MA>;
242		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
243	};
244};
245
246&sram_a {
247	emac_sram: sram-section@8000 {
248		compatible = "allwinner,sun4i-a10-sram-a3-a4";
249		reg = <0x8000 0x4000>;
250		status = "disabled";
251	};
252};
253