xref: /openbmc/u-boot/arch/arm/dts/sun5i-a10s.dtsi (revision 53ab4af3)
1/*
2 * Copyright 2013 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 *  a) This library is free software; you can redistribute it and/or
12 *     modify it under the terms of the GNU General Public License as
13 *     published by the Free Software Foundation; either version 2 of the
14 *     License, or (at your option) any later version.
15 *
16 *     This library is distributed in the hope that it will be useful,
17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19 *     GNU General Public License for more details.
20 *
21 *     You should have received a copy of the GNU General Public
22 *     License along with this library; if not, write to the Free
23 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 *     MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 *  b) Permission is hereby granted, free of charge, to any person
29 *     obtaining a copy of this software and associated documentation
30 *     files (the "Software"), to deal in the Software without
31 *     restriction, including without limitation the rights to use,
32 *     copy, modify, merge, publish, distribute, sublicense, and/or
33 *     sell copies of the Software, and to permit persons to whom the
34 *     Software is furnished to do so, subject to the following
35 *     conditions:
36 *
37 *     The above copyright notice and this permission notice shall be
38 *     included in all copies or substantial portions of the Software.
39 *
40 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 *     OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50#include "skeleton.dtsi"
51
52#include "sun5i.dtsi"
53
54#include <dt-bindings/dma/sun4i-a10.h>
55#include <dt-bindings/pinctrl/sun4i-a10.h>
56
57/ {
58	interrupt-parent = <&intc>;
59
60	aliases {
61		ethernet0 = &emac;
62	};
63
64	chosen {
65		#address-cells = <1>;
66		#size-cells = <1>;
67		ranges;
68
69		framebuffer@0 {
70			compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
71			allwinner,pipeline = "de_be0-lcd0-hdmi";
72			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
73				 <&ahb_gates 44>;
74			status = "disabled";
75		};
76
77		framebuffer@1 {
78			compatible = "allwinner,simple-framebuffer",
79				     "simple-framebuffer";
80			allwinner,pipeline = "de_be0-lcd0";
81			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
82			status = "disabled";
83		};
84	};
85
86	clocks {
87		ahb_gates: clk@01c20060 {
88			#clock-cells = <1>;
89			compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
90			reg = <0x01c20060 0x8>;
91			clocks = <&ahb>;
92			clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci",
93				"ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
94				"ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram",
95				"ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1",
96				"ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve",
97				"ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi",
98				"ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400";
99		};
100
101		apb0_gates: clk@01c20068 {
102			#clock-cells = <1>;
103			compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
104			reg = <0x01c20068 0x4>;
105			clocks = <&apb0>;
106			clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio",
107				"apb0_ir", "apb0_keypad";
108		};
109
110		apb1_gates: clk@01c2006c {
111			#clock-cells = <1>;
112			compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
113			reg = <0x01c2006c 0x4>;
114			clocks = <&apb1>;
115			clock-output-names = "apb1_i2c0", "apb1_i2c1",
116				"apb1_i2c2", "apb1_uart0", "apb1_uart1",
117				"apb1_uart2", "apb1_uart3";
118		};
119	};
120
121	soc@01c00000 {
122		emac: ethernet@01c0b000 {
123			compatible = "allwinner,sun4i-a10-emac";
124			reg = <0x01c0b000 0x1000>;
125			interrupts = <55>;
126			clocks = <&ahb_gates 17>;
127			status = "disabled";
128		};
129
130		mdio: mdio@01c0b080 {
131			compatible = "allwinner,sun4i-a10-mdio";
132			reg = <0x01c0b080 0x14>;
133			status = "disabled";
134			#address-cells = <1>;
135			#size-cells = <0>;
136		};
137
138		uart0: serial@01c28000 {
139			compatible = "snps,dw-apb-uart";
140			reg = <0x01c28000 0x400>;
141			interrupts = <1>;
142			reg-shift = <2>;
143			reg-io-width = <4>;
144			clocks = <&apb1_gates 16>;
145			status = "disabled";
146		};
147
148		uart2: serial@01c28800 {
149			compatible = "snps,dw-apb-uart";
150			reg = <0x01c28800 0x400>;
151			interrupts = <3>;
152			reg-shift = <2>;
153			reg-io-width = <4>;
154			clocks = <&apb1_gates 18>;
155			status = "disabled";
156		};
157	};
158};
159
160&pio {
161	compatible = "allwinner,sun5i-a10s-pinctrl";
162
163	uart0_pins_a: uart0@0 {
164		allwinner,pins = "PB19", "PB20";
165		allwinner,function = "uart0";
166		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
167		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
168	};
169
170	uart2_pins_a: uart2@0 {
171		allwinner,pins = "PC18", "PC19";
172		allwinner,function = "uart2";
173		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
174		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
175	};
176
177	uart3_pins_a: uart3@0 {
178		allwinner,pins = "PG9", "PG10";
179		allwinner,function = "uart3";
180		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
181		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
182	};
183
184	emac_pins_a: emac0@0 {
185		allwinner,pins = "PA0", "PA1", "PA2",
186				"PA3", "PA4", "PA5", "PA6",
187				"PA7", "PA8", "PA9", "PA10",
188				"PA11", "PA12", "PA13", "PA14",
189				"PA15", "PA16";
190		allwinner,function = "emac";
191		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
192		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
193	};
194
195	mmc1_pins_a: mmc1@0 {
196		allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";
197		allwinner,function = "mmc1";
198		allwinner,drive = <SUN4I_PINCTRL_30_MA>;
199		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
200	};
201};
202