xref: /openbmc/u-boot/arch/arm/dts/sun5i-a10s.dtsi (revision 8b1ba941)
153ab4af3SHans de Goede/*
253ab4af3SHans de Goede * Copyright 2013 Maxime Ripard
353ab4af3SHans de Goede *
453ab4af3SHans de Goede * Maxime Ripard <maxime.ripard@free-electrons.com>
553ab4af3SHans de Goede *
653ab4af3SHans de Goede * This file is dual-licensed: you can use it either under the terms
753ab4af3SHans de Goede * of the GPL or the X11 license, at your option. Note that this dual
853ab4af3SHans de Goede * licensing only applies to this file, and not this project as a
953ab4af3SHans de Goede * whole.
1053ab4af3SHans de Goede *
1153ab4af3SHans de Goede *  a) This library is free software; you can redistribute it and/or
1253ab4af3SHans de Goede *     modify it under the terms of the GNU General Public License as
1353ab4af3SHans de Goede *     published by the Free Software Foundation; either version 2 of the
1453ab4af3SHans de Goede *     License, or (at your option) any later version.
1553ab4af3SHans de Goede *
1653ab4af3SHans de Goede *     This library is distributed in the hope that it will be useful,
1753ab4af3SHans de Goede *     but WITHOUT ANY WARRANTY; without even the implied warranty of
1853ab4af3SHans de Goede *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1953ab4af3SHans de Goede *     GNU General Public License for more details.
2053ab4af3SHans de Goede *
2153ab4af3SHans de Goede * Or, alternatively,
2253ab4af3SHans de Goede *
2353ab4af3SHans de Goede *  b) Permission is hereby granted, free of charge, to any person
2453ab4af3SHans de Goede *     obtaining a copy of this software and associated documentation
2553ab4af3SHans de Goede *     files (the "Software"), to deal in the Software without
2653ab4af3SHans de Goede *     restriction, including without limitation the rights to use,
2753ab4af3SHans de Goede *     copy, modify, merge, publish, distribute, sublicense, and/or
2853ab4af3SHans de Goede *     sell copies of the Software, and to permit persons to whom the
2953ab4af3SHans de Goede *     Software is furnished to do so, subject to the following
3053ab4af3SHans de Goede *     conditions:
3153ab4af3SHans de Goede *
3253ab4af3SHans de Goede *     The above copyright notice and this permission notice shall be
3353ab4af3SHans de Goede *     included in all copies or substantial portions of the Software.
3453ab4af3SHans de Goede *
3553ab4af3SHans de Goede *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3653ab4af3SHans de Goede *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3753ab4af3SHans de Goede *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3853ab4af3SHans de Goede *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3953ab4af3SHans de Goede *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4053ab4af3SHans de Goede *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4153ab4af3SHans de Goede *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4253ab4af3SHans de Goede *     OTHER DEALINGS IN THE SOFTWARE.
4353ab4af3SHans de Goede */
4453ab4af3SHans de Goede
4553ab4af3SHans de Goede#include "skeleton.dtsi"
4653ab4af3SHans de Goede
4753ab4af3SHans de Goede#include "sun5i.dtsi"
4853ab4af3SHans de Goede
4953ab4af3SHans de Goede#include <dt-bindings/dma/sun4i-a10.h>
5053ab4af3SHans de Goede#include <dt-bindings/pinctrl/sun4i-a10.h>
5153ab4af3SHans de Goede
5253ab4af3SHans de Goede/ {
5353ab4af3SHans de Goede	interrupt-parent = <&intc>;
5453ab4af3SHans de Goede
5553ab4af3SHans de Goede	aliases {
5653ab4af3SHans de Goede		ethernet0 = &emac;
5753ab4af3SHans de Goede	};
5853ab4af3SHans de Goede
5953ab4af3SHans de Goede	chosen {
6053ab4af3SHans de Goede		#address-cells = <1>;
6153ab4af3SHans de Goede		#size-cells = <1>;
6253ab4af3SHans de Goede		ranges;
6353ab4af3SHans de Goede
6453ab4af3SHans de Goede		framebuffer@0 {
65*8b1ba941SHans de Goede			compatible = "allwinner,simple-framebuffer",
66*8b1ba941SHans de Goede				     "simple-framebuffer";
6753ab4af3SHans de Goede			allwinner,pipeline = "de_be0-lcd0-hdmi";
6853ab4af3SHans de Goede			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
6953ab4af3SHans de Goede				 <&ahb_gates 44>;
7053ab4af3SHans de Goede			status = "disabled";
7153ab4af3SHans de Goede		};
7253ab4af3SHans de Goede
7353ab4af3SHans de Goede		framebuffer@1 {
7453ab4af3SHans de Goede			compatible = "allwinner,simple-framebuffer",
7553ab4af3SHans de Goede				     "simple-framebuffer";
7653ab4af3SHans de Goede			allwinner,pipeline = "de_be0-lcd0";
7753ab4af3SHans de Goede			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
7853ab4af3SHans de Goede			status = "disabled";
7953ab4af3SHans de Goede		};
8053ab4af3SHans de Goede	};
8153ab4af3SHans de Goede
8253ab4af3SHans de Goede	clocks {
8353ab4af3SHans de Goede		ahb_gates: clk@01c20060 {
8453ab4af3SHans de Goede			#clock-cells = <1>;
8553ab4af3SHans de Goede			compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
8653ab4af3SHans de Goede			reg = <0x01c20060 0x8>;
8753ab4af3SHans de Goede			clocks = <&ahb>;
88*8b1ba941SHans de Goede			clock-output-names = "ahb_usbotg", "ahb_ehci",
89*8b1ba941SHans de Goede					     "ahb_ohci", "ahb_ss", "ahb_dma",
90*8b1ba941SHans de Goede					     "ahb_bist", "ahb_mmc0", "ahb_mmc1",
91*8b1ba941SHans de Goede					     "ahb_mmc2", "ahb_nand",
92*8b1ba941SHans de Goede					     "ahb_sdram", "ahb_emac", "ahb_ts",
93*8b1ba941SHans de Goede					     "ahb_spi0", "ahb_spi1", "ahb_spi2",
94*8b1ba941SHans de Goede					     "ahb_gps", "ahb_stimer", "ahb_ve",
95*8b1ba941SHans de Goede					     "ahb_tve", "ahb_lcd", "ahb_csi",
96*8b1ba941SHans de Goede					     "ahb_hdmi", "ahb_de_be",
97*8b1ba941SHans de Goede					     "ahb_de_fe", "ahb_iep",
98*8b1ba941SHans de Goede					     "ahb_mali400";
9953ab4af3SHans de Goede		};
10053ab4af3SHans de Goede
10153ab4af3SHans de Goede		apb0_gates: clk@01c20068 {
10253ab4af3SHans de Goede			#clock-cells = <1>;
10353ab4af3SHans de Goede			compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
10453ab4af3SHans de Goede			reg = <0x01c20068 0x4>;
10553ab4af3SHans de Goede			clocks = <&apb0>;
106*8b1ba941SHans de Goede			clock-output-names = "apb0_codec", "apb0_iis",
107*8b1ba941SHans de Goede					     "apb0_pio", "apb0_ir",
108*8b1ba941SHans de Goede					     "apb0_keypad";
10953ab4af3SHans de Goede		};
11053ab4af3SHans de Goede
11153ab4af3SHans de Goede		apb1_gates: clk@01c2006c {
11253ab4af3SHans de Goede			#clock-cells = <1>;
11353ab4af3SHans de Goede			compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
11453ab4af3SHans de Goede			reg = <0x01c2006c 0x4>;
11553ab4af3SHans de Goede			clocks = <&apb1>;
11653ab4af3SHans de Goede			clock-output-names = "apb1_i2c0", "apb1_i2c1",
11753ab4af3SHans de Goede				"apb1_i2c2", "apb1_uart0", "apb1_uart1",
11853ab4af3SHans de Goede				"apb1_uart2", "apb1_uart3";
11953ab4af3SHans de Goede		};
12053ab4af3SHans de Goede	};
12153ab4af3SHans de Goede
12253ab4af3SHans de Goede	soc@01c00000 {
12353ab4af3SHans de Goede		emac: ethernet@01c0b000 {
12453ab4af3SHans de Goede			compatible = "allwinner,sun4i-a10-emac";
12553ab4af3SHans de Goede			reg = <0x01c0b000 0x1000>;
12653ab4af3SHans de Goede			interrupts = <55>;
12753ab4af3SHans de Goede			clocks = <&ahb_gates 17>;
128*8b1ba941SHans de Goede			allwinner,sram = <&emac_sram 1>;
12953ab4af3SHans de Goede			status = "disabled";
13053ab4af3SHans de Goede		};
13153ab4af3SHans de Goede
13253ab4af3SHans de Goede		mdio: mdio@01c0b080 {
13353ab4af3SHans de Goede			compatible = "allwinner,sun4i-a10-mdio";
13453ab4af3SHans de Goede			reg = <0x01c0b080 0x14>;
13553ab4af3SHans de Goede			status = "disabled";
13653ab4af3SHans de Goede			#address-cells = <1>;
13753ab4af3SHans de Goede			#size-cells = <0>;
13853ab4af3SHans de Goede		};
13953ab4af3SHans de Goede
14053ab4af3SHans de Goede		uart0: serial@01c28000 {
14153ab4af3SHans de Goede			compatible = "snps,dw-apb-uart";
14253ab4af3SHans de Goede			reg = <0x01c28000 0x400>;
14353ab4af3SHans de Goede			interrupts = <1>;
14453ab4af3SHans de Goede			reg-shift = <2>;
14553ab4af3SHans de Goede			reg-io-width = <4>;
14653ab4af3SHans de Goede			clocks = <&apb1_gates 16>;
14753ab4af3SHans de Goede			status = "disabled";
14853ab4af3SHans de Goede		};
14953ab4af3SHans de Goede
15053ab4af3SHans de Goede		uart2: serial@01c28800 {
15153ab4af3SHans de Goede			compatible = "snps,dw-apb-uart";
15253ab4af3SHans de Goede			reg = <0x01c28800 0x400>;
15353ab4af3SHans de Goede			interrupts = <3>;
15453ab4af3SHans de Goede			reg-shift = <2>;
15553ab4af3SHans de Goede			reg-io-width = <4>;
15653ab4af3SHans de Goede			clocks = <&apb1_gates 18>;
15753ab4af3SHans de Goede			status = "disabled";
15853ab4af3SHans de Goede		};
15953ab4af3SHans de Goede	};
16053ab4af3SHans de Goede};
16153ab4af3SHans de Goede
16253ab4af3SHans de Goede&pio {
16353ab4af3SHans de Goede	compatible = "allwinner,sun5i-a10s-pinctrl";
16453ab4af3SHans de Goede
16553ab4af3SHans de Goede	uart0_pins_a: uart0@0 {
16653ab4af3SHans de Goede		allwinner,pins = "PB19", "PB20";
16753ab4af3SHans de Goede		allwinner,function = "uart0";
16853ab4af3SHans de Goede		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
16953ab4af3SHans de Goede		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
17053ab4af3SHans de Goede	};
17153ab4af3SHans de Goede
17253ab4af3SHans de Goede	uart2_pins_a: uart2@0 {
17353ab4af3SHans de Goede		allwinner,pins = "PC18", "PC19";
17453ab4af3SHans de Goede		allwinner,function = "uart2";
17553ab4af3SHans de Goede		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
17653ab4af3SHans de Goede		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
17753ab4af3SHans de Goede	};
17853ab4af3SHans de Goede
17953ab4af3SHans de Goede	uart3_pins_a: uart3@0 {
18053ab4af3SHans de Goede		allwinner,pins = "PG9", "PG10";
18153ab4af3SHans de Goede		allwinner,function = "uart3";
18253ab4af3SHans de Goede		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
18353ab4af3SHans de Goede		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
18453ab4af3SHans de Goede	};
18553ab4af3SHans de Goede
18653ab4af3SHans de Goede	emac_pins_a: emac0@0 {
18753ab4af3SHans de Goede		allwinner,pins = "PA0", "PA1", "PA2",
18853ab4af3SHans de Goede				"PA3", "PA4", "PA5", "PA6",
18953ab4af3SHans de Goede				"PA7", "PA8", "PA9", "PA10",
19053ab4af3SHans de Goede				"PA11", "PA12", "PA13", "PA14",
19153ab4af3SHans de Goede				"PA15", "PA16";
19253ab4af3SHans de Goede		allwinner,function = "emac";
19353ab4af3SHans de Goede		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
19453ab4af3SHans de Goede		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
19553ab4af3SHans de Goede	};
19653ab4af3SHans de Goede
19753ab4af3SHans de Goede	mmc1_pins_a: mmc1@0 {
198*8b1ba941SHans de Goede		allwinner,pins = "PG3", "PG4", "PG5",
199*8b1ba941SHans de Goede				 "PG6", "PG7", "PG8";
20053ab4af3SHans de Goede		allwinner,function = "mmc1";
20153ab4af3SHans de Goede		allwinner,drive = <SUN4I_PINCTRL_30_MA>;
20253ab4af3SHans de Goede		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
20353ab4af3SHans de Goede	};
20453ab4af3SHans de Goede};
205*8b1ba941SHans de Goede
206*8b1ba941SHans de Goede&sram_a {
207*8b1ba941SHans de Goede	emac_sram: sram-section@8000 {
208*8b1ba941SHans de Goede		compatible = "allwinner,sun4i-a10-sram-a3-a4";
209*8b1ba941SHans de Goede		reg = <0x8000 0x4000>;
210*8b1ba941SHans de Goede		status = "disabled";
211*8b1ba941SHans de Goede	};
212*8b1ba941SHans de Goede};
213