1/* 2 * Copyright (c) 2016 ARM Ltd. 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43#include "sun8i-h3.dtsi" 44 45/ { 46 cpus { 47 cpu@0 { 48 compatible = "arm,cortex-a53", "arm,armv8"; 49 enable-method = "psci"; 50 }; 51 cpu@1 { 52 compatible = "arm,cortex-a53", "arm,armv8"; 53 enable-method = "psci"; 54 }; 55 cpu@2 { 56 compatible = "arm,cortex-a53", "arm,armv8"; 57 enable-method = "psci"; 58 }; 59 cpu@3 { 60 compatible = "arm,cortex-a53", "arm,armv8"; 61 enable-method = "psci"; 62 }; 63 }; 64 65 psci { 66 compatible = "arm,psci-0.2"; 67 method = "smc"; 68 }; 69 70 timer { 71 compatible = "arm,armv8-timer"; 72 }; 73}; 74 75&ccu { 76 compatible = "allwinner,sun50i-h5-ccu"; 77}; 78 79&gic { 80 compatible = "arm,gic-400"; 81}; 82 83&mmc0 { 84 compatible = "allwinner,sun50i-h5-mmc", 85 "allwinner,sun50i-a64-mmc"; 86 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; 87 clock-names = "ahb", "mmc"; 88}; 89 90&mmc1 { 91 compatible = "allwinner,sun50i-h5-mmc", 92 "allwinner,sun50i-a64-mmc"; 93 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; 94 clock-names = "ahb", "mmc"; 95}; 96 97&mmc2 { 98 compatible = "allwinner,sun50i-h5-emmc", 99 "allwinner,sun50i-a64-emmc"; 100 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; 101 clock-names = "ahb", "mmc"; 102}; 103 104&pio { 105 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 106 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 107 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 108 compatible = "allwinner,sun50i-h5-pinctrl"; 109}; 110